impyu.S revision 1.3 1 1.3 christos /* $NetBSD: impyu.S,v 1.3 2005/12/11 12:17:40 christos Exp $ */
2 1.1 fredette
3 1.1 fredette /* $OpenBSD: impyu.S,v 1.5 2001/03/29 03:58:18 mickey Exp $ */
4 1.1 fredette
5 1.1 fredette /*
6 1.1 fredette * Copyright 1996 1995 by Open Software Foundation, Inc.
7 1.1 fredette * All Rights Reserved
8 1.1 fredette *
9 1.1 fredette * Permission to use, copy, modify, and distribute this software and
10 1.1 fredette * its documentation for any purpose and without fee is hereby granted,
11 1.1 fredette * provided that the above copyright notice appears in all copies and
12 1.1 fredette * that both the copyright notice and this permission notice appear in
13 1.1 fredette * supporting documentation.
14 1.1 fredette *
15 1.1 fredette * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
16 1.1 fredette * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
17 1.1 fredette * FOR A PARTICULAR PURPOSE.
18 1.1 fredette *
19 1.1 fredette * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
20 1.1 fredette * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
21 1.1 fredette * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
22 1.1 fredette * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
23 1.1 fredette * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
24 1.1 fredette *
25 1.1 fredette */
26 1.1 fredette /*
27 1.1 fredette * pmk1.1
28 1.1 fredette */
29 1.1 fredette /*
30 1.1 fredette * (c) Copyright 1986 HEWLETT-PACKARD COMPANY
31 1.1 fredette *
32 1.1 fredette * To anyone who acknowledges that this file is provided "AS IS"
33 1.1 fredette * without any express or implied warranty:
34 1.1 fredette * permission to use, copy, modify, and distribute this file
35 1.1 fredette * for any purpose is hereby granted without fee, provided that
36 1.1 fredette * the above copyright notice and this notice appears in all
37 1.1 fredette * copies, and that the name of Hewlett-Packard Company not be
38 1.1 fredette * used in advertising or publicity pertaining to distribution
39 1.1 fredette * of the software without specific, written prior permission.
40 1.1 fredette * Hewlett-Packard Company makes no representations about the
41 1.1 fredette * suitability of this software for any purpose.
42 1.1 fredette */
43 1.1 fredette
44 1.1 fredette #include <machine/asm.h>
45 1.1 fredette
46 1.1 fredette /****************************************************************************
47 1.1 fredette *
48 1.1 fredette *Implement an integer multiply routine for 32-bit operands and 64-bit product
49 1.1 fredette * with operand values of zero (multiplicand only) and 2**32reated specially.
50 1.1 fredette * The algorithm uses the multiplier, four bits at a time, from right to left,
51 1.1 fredette * to generate partial product. Execution speed is more important than program
52 1.1 fredette * size in this implementation.
53 1.1 fredette *
54 1.1 fredette *****************************************************************************/
55 1.1 fredette ;
56 1.1 fredette ; Definitions - General registers
57 1.1 fredette ;
58 1.2 chs gr0: .equ 0 ; General register zero
59 1.2 chs pu: .equ 3 ; upper part of product
60 1.2 chs pl: .equ 4 ; lower part of product
61 1.2 chs op2: .equ 4 ; multiplier
62 1.2 chs op1: .equ 5 ; multiplicand
63 1.2 chs cnt: .equ 6 ; count in multiply
64 1.2 chs brindex:.equ 7 ; index into the br. table
65 1.2 chs saveop2:.equ 8 ; save op2 if high bit of multiplicand
66 1.1 fredette ; is set
67 1.2 chs pc: .equ 9 ; carry bit of product, = 00...01
68 1.2 chs pm: .equ 10 ; value of -1 used in shifting
69 1.2 chs temp: .equ 6
70 1.1 fredette
71 1.1 fredette ;****************************************************************************
72 1.1 fredette .export impyu,entry
73 1.1 fredette .text
74 1.1 fredette .align 4
75 1.1 fredette .proc
76 1.1 fredette .callinfo
77 1.1 fredette ;
78 1.1 fredette ;****************************************************************************
79 1.2 chs impyu: stws,ma pu,4(%sp) ; save registers on stack
80 1.2 chs stws,ma pl,4(%sp) ; save registers on stack
81 1.2 chs stws,ma op1,4(%sp) ; save registers on stack
82 1.2 chs stws,ma cnt,4(%sp) ; save registers on stack
83 1.2 chs stws,ma brindex,4(%sp) ; save registers on stack
84 1.2 chs stws,ma saveop2,4(%sp) ; save registers on stack
85 1.2 chs stws,ma pc,4(%sp) ; save registers on stack
86 1.2 chs stws,ma pm,4(%sp) ; save registers on stack
87 1.1 fredette ;
88 1.1 fredette ; Start multiply process
89 1.1 fredette ;
90 1.2 chs ldws 0(%arg0),op1 ; get multiplicand
91 1.2 chs ldws 0(%arg1),op2 ; get multiplier
92 1.1 fredette addib,= 0,op1,fini0 ; op1 = 0, product = 0
93 1.1 fredette addi 0,gr0,pu ; clear product
94 1.1 fredette bb,>= op1,0,mpy1 ; test msb of multiplicand
95 1.1 fredette addi 0,gr0,saveop2 ; clear saveop2
96 1.1 fredette ;
97 1.1 fredette ; msb of multiplicand is set so will save multiplier for a final
98 1.1 fredette ; addition into the result
99 1.1 fredette ;
100 1.1 fredette extru,= op1,31,31,op1 ; clear msb of multiplicand
101 1.1 fredette b mpy1 ; if op1 < 2**32, start multiply
102 1.1 fredette add op2,gr0,saveop2 ; save op2 in saveop2
103 1.1 fredette shd gr0,op2,1,pu ; shift op2 left 31 for result
104 1.1 fredette b fini ; go to finish
105 1.1 fredette shd op2,gr0,1,pl
106 1.1 fredette ;
107 1.2 chs mpy1: addi -1,gr0,pm ; initialize pm to 111...1
108 1.1 fredette addi 1,gr0,pc ; initialize pc to 00...01
109 1.1 fredette movib,tr 8,cnt,mloop ; set count for mpy loop
110 1.1 fredette extru op2,31,4,brindex ; 4 bits as index into table
111 1.1 fredette ;
112 1.1 fredette .align 8
113 1.1 fredette ;
114 1.1 fredette b sh4c ; br. if sign overflow
115 1.2 chs sh4n: shd pu,pl,4,pl ; shift product right 4 bits
116 1.1 fredette addib,<= -1,cnt,mulend ; reduce count by 1, exit if
117 1.1 fredette extru pu,27,28,pu ; <= zero
118 1.1 fredette ;
119 1.2 chs mloop: blr brindex,gr0 ; br. into table
120 1.1 fredette ; entries of 2 words
121 1.1 fredette extru op2,27,4,brindex ; next 4 bits into index
122 1.1 fredette ;
123 1.1 fredette ;
124 1.1 fredette ; branch table for the multiplication process with four multiplier bits
125 1.1 fredette ;
126 1.2 chs mtable: ; two words per entry
127 1.1 fredette ;
128 1.1 fredette ; ---- bits = 0000 ---- shift product 4 bits -------------------------------
129 1.1 fredette ;
130 1.1 fredette b sh4n+4 ; just shift partial
131 1.1 fredette shd pu,pl,4,pl ; product right 4 bits
132 1.1 fredette ;
133 1.1 fredette ; ---- bits = 0001 ---- add op1, then shift 4 bits
134 1.1 fredette ;
135 1.1 fredette addb,tr op1,pu,sh4n+4 ; add op1 to product, to shift
136 1.1 fredette shd pu,pl,4,pl ; product right 4 bits
137 1.1 fredette ;
138 1.1 fredette ; ---- bits = 0010 ---- add op1, add op1, then shift 4 bits
139 1.1 fredette ;
140 1.1 fredette addb,tr op1,pu,sh4n ; add 2*op1, to shift
141 1.1 fredette addb,uv op1,pu,sh4c ; product right 4 bits
142 1.1 fredette ;
143 1.1 fredette ; ---- bits = 0011 ---- add op1, add 2*op1, shift 4 bits
144 1.1 fredette ;
145 1.1 fredette addb,tr op1,pu,sh4n-4 ; add op1 & 2*op1, shift
146 1.2 chs sh1add,nuv op1,pu,pu ; product right 4 bits
147 1.1 fredette ;
148 1.1 fredette ; ---- bits = 0100 ---- shift 2, add op1, shift 2
149 1.1 fredette ;
150 1.1 fredette b sh2sa
151 1.1 fredette shd pu,pl,2,pl ; shift product 2 bits
152 1.1 fredette ;
153 1.1 fredette ; ---- bits = 0101 ---- add op1, shift 2, add op1, and shift 2 again
154 1.1 fredette ;
155 1.1 fredette addb,tr op1,pu,sh2us ; add op1 to product
156 1.1 fredette shd pu,pl,2,pl ; shift 2 bits
157 1.1 fredette ;
158 1.1 fredette ; ---- bits = 0110 ---- add op1, add op1, shift 2, add op1, and shift 2 again
159 1.1 fredette ;
160 1.1 fredette addb,tr op1,pu,sh2c ; add 2*op1, to shift 2 bits
161 1.1 fredette addb,nuv op1,pu,sh2us ; br. if not overflow
162 1.1 fredette ;
163 1.1 fredette ; ---- bits = 0111 ---- subtract op1, shift 3, add op1, and shift 1
164 1.1 fredette ;
165 1.1 fredette b sh3s
166 1.1 fredette sub pu,op1,pu ; subtract op1, br. to sh3s
167 1.1 fredette
168 1.1 fredette ;
169 1.1 fredette ; ---- bits = 1000 ---- shift 3, add op1, shift 1
170 1.1 fredette ;
171 1.1 fredette b sh3sa
172 1.1 fredette shd pu,pl,3,pl ; shift product right 3 bits
173 1.1 fredette ;
174 1.1 fredette ; ---- bits = 1001 ---- add op1, shift 3, add op1, shift 1
175 1.1 fredette ;
176 1.1 fredette addb,tr op1,pu,sh3us ; add op1, to shift 3, add op1,
177 1.1 fredette shd pu,pl,3,pl ; and shift 1
178 1.1 fredette ;
179 1.1 fredette ; ---- bits = 1010 ---- add op1, add op1, shift 3, add op1, shift 1
180 1.1 fredette ;
181 1.1 fredette addb,tr op1,pu,sh3c ; add 2*op1, to shift 3 bits
182 1.1 fredette addb,nuv op1,pu,sh3us ; br. if no overflow
183 1.1 fredette ;
184 1.1 fredette ; ---- bits = 1011 ---- add -op1, shift 2, add -op1, shift 2, inc. next index
185 1.1 fredette ;
186 1.1 fredette addib,tr 1,brindex,sh2s ; add 1 to index, subtract op1,
187 1.1 fredette sub pu,op1,pu ; shift 2 with minus sign
188 1.1 fredette ;
189 1.1 fredette ; ---- bits = 1100 ---- shift 2, subtract op1, shift 2, increment next index
190 1.1 fredette ;
191 1.1 fredette addib,tr 1,brindex,sh2sb ; add 1 to index, to shift
192 1.1 fredette shd pu,pl,2,pl ; shift right 2 bits signed
193 1.1 fredette ;
194 1.1 fredette ; ---- bits = 1101 ---- add op1, shift 2, add -op1, shift 2
195 1.1 fredette ;
196 1.1 fredette addb,tr op1,pu,sh2ns ; add op1, to shift 2
197 1.1 fredette shd pu,pl,2,pl ; right 2 unsigned, etc.
198 1.1 fredette ;
199 1.1 fredette ; ---- bits = 1110 ---- shift 1 signed, add -op1, shift 3 signed
200 1.1 fredette ;
201 1.1 fredette addib,tr 1,brindex,sh1sa ; add 1 to index, to shift
202 1.1 fredette shd pu,pl,1,pl ; shift 1 bit
203 1.1 fredette ;
204 1.1 fredette ; ---- bits = 1111 ---- add -op1, shift 4 signed
205 1.1 fredette ;
206 1.1 fredette addib,tr 1,brindex,sh4s ; add 1 to index, subtract op1,
207 1.1 fredette sub pu,op1,pu ; to shift 4 signed
208 1.1 fredette
209 1.1 fredette ;
210 1.1 fredette ; ---- bits = 10000 ---- shift 4 signed
211 1.1 fredette ;
212 1.2 chs addib,tr 1,brindex,sh4s+4 ; add 1 to index
213 1.1 fredette shd pu,pl,4,pl ; shift 4 signed
214 1.1 fredette ;
215 1.1 fredette ; ---- end of table ---------------------------------------------------------
216 1.1 fredette ;
217 1.2 chs sh4s: shd pu,pl,4,pl
218 1.1 fredette addib,> -1,cnt,mloop ; decrement count, loop if > 0
219 1.1 fredette shd pm,pu,4,pu ; shift 4, minus signed
220 1.1 fredette addb,tr op1,pu,lastadd ; do one more add, then finish
221 1.1 fredette addb,=,n saveop2,gr0,fini ; check saveop2
222 1.1 fredette ;
223 1.2 chs sh4c: addib,> -1,cnt,mloop ; decrement count, loop if > 0
224 1.1 fredette shd pc,pu,4,pu ; shift 4 with overflow
225 1.1 fredette b lastadd ; end of multiply
226 1.1 fredette addb,=,n saveop2,gr0,fini ; check saveop2
227 1.1 fredette ;
228 1.2 chs sh3c: shd pu,pl,3,pl ; shift product 3 bits
229 1.1 fredette shd pc,pu,3,pu ; shift 3 signed
230 1.1 fredette addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
231 1.1 fredette shd pu,pl,1,pl
232 1.1 fredette ;
233 1.2 chs sh3us: extru pu,28,29,pu ; shift 3 unsigned
234 1.1 fredette addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
235 1.1 fredette shd pu,pl,1,pl
236 1.1 fredette ;
237 1.2 chs sh3sa: extrs pu,28,29,pu ; shift 3 signed
238 1.1 fredette addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
239 1.1 fredette shd pu,pl,1,pl
240 1.1 fredette ;
241 1.2 chs sh3s: shd pu,pl,3,pl ; shift 3 minus signed
242 1.1 fredette shd pm,pu,3,pu
243 1.1 fredette addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
244 1.1 fredette shd pu,pl,1,pl
245 1.1 fredette ;
246 1.2 chs sh1: addib,> -1,cnt,mloop ; loop if count > 0
247 1.1 fredette extru pu,30,31,pu
248 1.1 fredette b lastadd ; end of multiply
249 1.1 fredette addb,=,n saveop2,gr0,fini ; check saveop2
250 1.1 fredette ;
251 1.2 chs sh2ns: addib,tr 1,brindex,sh2sb+4 ; increment index
252 1.1 fredette extru pu,29,30,pu ; shift unsigned
253 1.1 fredette ;
254 1.2 chs sh2s: shd pu,pl,2,pl ; shift with minus sign
255 1.1 fredette shd pm,pu,2,pu ;
256 1.1 fredette sub pu,op1,pu ; subtract op1
257 1.1 fredette shd pu,pl,2,pl ; shift with minus sign
258 1.1 fredette addib,> -1,cnt,mloop ; decrement count, loop if > 0
259 1.1 fredette shd pm,pu,2,pu ; shift with minus sign
260 1.1 fredette addb,tr op1,pu,lastadd ; do one more add, then finish
261 1.1 fredette addb,=,n saveop2,gr0,fini ; check saveop2
262 1.1 fredette ;
263 1.2 chs sh2sb: extrs pu,29,30,pu ; shift 2 signed
264 1.1 fredette sub pu,op1,pu ; subtract op1 from product
265 1.1 fredette shd pu,pl,2,pl ; shift with minus sign
266 1.1 fredette addib,> -1,cnt,mloop ; decrement count, loop if > 0
267 1.1 fredette shd pm,pu,2,pu ; shift with minus sign
268 1.1 fredette addb,tr op1,pu,lastadd ; do one more add, then finish
269 1.1 fredette addb,=,n saveop2,gr0,fini ; check saveop2
270 1.1 fredette ;
271 1.2 chs sh1sa: extrs pu,30,31,pu ; signed
272 1.1 fredette sub pu,op1,pu ; subtract op1 from product
273 1.1 fredette shd pu,pl,3,pl ; shift 3 with minus sign
274 1.1 fredette addib,> -1,cnt,mloop ; decrement count, loop if >0
275 1.1 fredette shd pm,pu,3,pu
276 1.1 fredette addb,tr op1,pu,lastadd ; do one more add, then finish
277 1.1 fredette addb,=,n saveop2,gr0,fini ; check saveop2
278 1.1 fredette ;
279 1.2 chs fini0: movib,tr 0,pl,fini ; product = 0 as op1 = 0
280 1.2 chs stws pu,0(%arg2) ; save high part of result
281 1.1 fredette ;
282 1.2 chs sh2us: extru pu,29,30,pu ; shift 2 unsigned
283 1.1 fredette addb,tr op1,pu,sh2a ; add op1
284 1.1 fredette shd pu,pl,2,pl ; shift 2 bits
285 1.1 fredette ;
286 1.2 chs sh2c: shd pu,pl,2,pl
287 1.1 fredette shd pc,pu,2,pu ; shift with carry
288 1.1 fredette addb,tr op1,pu,sh2a ; add op1 to product
289 1.1 fredette shd pu,pl,2,pl ; br. to sh2 to shift pu
290 1.1 fredette ;
291 1.2 chs sh2sa: extrs pu,29,30,pu ; shift with sign
292 1.1 fredette addb,tr op1,pu,sh2a ; add op1 to product
293 1.1 fredette shd pu,pl,2,pl ; br. to sh2 to shift pu
294 1.1 fredette ;
295 1.2 chs sh2a: addib,> -1,cnt,mloop ; loop if count > 0
296 1.1 fredette extru pu,29,30,pu
297 1.1 fredette ;
298 1.2 chs mulend: addb,=,n saveop2,gr0,fini ; check saveop2
299 1.2 chs lastadd:shd saveop2,gr0,1,temp ; if saveop2 <> 0, shift it
300 1.1 fredette shd gr0,saveop2,1,saveop2 ; left 31 and add to result
301 1.1 fredette add pl,temp,pl
302 1.1 fredette addc pu,saveop2,pu
303 1.1 fredette ;
304 1.1 fredette ; finish
305 1.1 fredette ;
306 1.2 chs fini: stws pu,0(%arg2) ; save high part of result
307 1.2 chs stws pl,4(%arg2) ; save low part of result
308 1.1 fredette
309 1.2 chs ldws,mb -4(%sp),pm ; restore registers
310 1.2 chs ldws,mb -4(%sp),pc ; restore registers
311 1.2 chs ldws,mb -4(%sp),saveop2 ; restore registers
312 1.2 chs ldws,mb -4(%sp),brindex ; restore registers
313 1.2 chs ldws,mb -4(%sp),cnt ; restore registers
314 1.2 chs ldws,mb -4(%sp),op1 ; restore registers
315 1.2 chs ldws,mb -4(%sp),pl ; restore registers
316 1.2 chs bv 0(%rp) ; return
317 1.2 chs ldws,mb -4(%sp),pu ; restore registers
318 1.1 fredette
319 1.1 fredette .procend
320 1.1 fredette .end
321