1 1.18 maxv /* $NetBSD: acpi_wakecode.S,v 1.18 2016/07/24 14:09:22 maxv Exp $ */ 2 1.1 tshiozak 3 1.1 tshiozak /*- 4 1.1 tshiozak * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 1.1 tshiozak * All rights reserved. 6 1.1 tshiozak * 7 1.1 tshiozak * This code is derived from software contributed to The NetBSD Foundation 8 1.1 tshiozak * by Takuya SHIOZAKI. 9 1.1 tshiozak * 10 1.1 tshiozak * Redistribution and use in source and binary forms, with or without 11 1.1 tshiozak * modification, are permitted provided that the following conditions 12 1.1 tshiozak * are met: 13 1.1 tshiozak * 1. Redistributions of source code must retain the above copyright 14 1.1 tshiozak * notice, this list of conditions and the following disclaimer. 15 1.1 tshiozak * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 tshiozak * notice, this list of conditions and the following disclaimer in the 17 1.1 tshiozak * documentation and/or other materials provided with the distribution. 18 1.1 tshiozak * 19 1.1 tshiozak * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 tshiozak * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 tshiozak * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 tshiozak * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 tshiozak * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 tshiozak * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 tshiozak * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 tshiozak * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 tshiozak * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 tshiozak * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 tshiozak * POSSIBILITY OF SUCH DAMAGE. 30 1.1 tshiozak */ 31 1.1 tshiozak 32 1.1 tshiozak /* 33 1.1 tshiozak * This code is derived from FreeBSD. Original copyrights: 34 1.1 tshiozak * 35 1.1 tshiozak * Copyright (c) 2001 Takanori Watanabe <takawata (at) jp.freebsd.org> 36 1.1 tshiozak * Copyright (c) 2001 Mitsuru IWASAKI <iwasaki (at) jp.freebsd.org> 37 1.1 tshiozak * All rights reserved. 38 1.1 tshiozak * 39 1.1 tshiozak * Redistribution and use in source and binary forms, with or without 40 1.1 tshiozak * modification, are permitted provided that the following conditions 41 1.1 tshiozak * are met: 42 1.1 tshiozak * 1. Redistributions of source code must retain the above copyright 43 1.1 tshiozak * notice, this list of conditions and the following disclaimer. 44 1.1 tshiozak * 2. Redistributions in binary form must reproduce the above copyright 45 1.1 tshiozak * notice, this list of conditions and the following disclaimer in the 46 1.1 tshiozak * documentation and/or other materials provided with the distribution. 47 1.1 tshiozak * 48 1.1 tshiozak * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 1.1 tshiozak * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 1.1 tshiozak * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 1.1 tshiozak * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 52 1.1 tshiozak * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 1.1 tshiozak * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 1.1 tshiozak * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 1.1 tshiozak * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 1.1 tshiozak * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 1.1 tshiozak * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 1.1 tshiozak * SUCH DAMAGE. 59 1.1 tshiozak * 60 1.1 tshiozak * FreeBSD: src/sys/i386/acpica/acpi_wakecode.S,v 1.1 2001/07/20 06:07:31 takawata Exp 61 1.1 tshiozak */ 62 1.1 tshiozak 63 1.4 jmcneill #define _LOCORE 64 1.1 tshiozak 65 1.1 tshiozak #include <machine/specialreg.h> 66 1.2 junyoung #include <machine/segments.h> 67 1.1 tshiozak 68 1.10 jmcneill #define ACPI_WAKEUP_ADDR 0x3000 69 1.10 jmcneill 70 1.10 jmcneill .text 71 1.1 tshiozak .code16 72 1.1 tshiozak .org 0 /* ACPI spec says: cs==(phys>>8), ip==(phys&0x000F) */ 73 1.10 jmcneill .globl wakeup_16 74 1.1 tshiozak wakeup_16: 75 1.1 tshiozak nop 76 1.1 tshiozak cli 77 1.4 jmcneill cld 78 1.1 tshiozak 79 1.1 tshiozak /* Set up segment registers for real mode */ 80 1.1 tshiozak movw %cs,%ax 81 1.1 tshiozak movw %ax,%ds 82 1.1 tshiozak movw %ax,%ss 83 1.1 tshiozak 84 1.7 jmcneill /* Small call stack */ 85 1.10 jmcneill mov $0x1000,%sp 86 1.7 jmcneill 87 1.7 jmcneill /* Clear flags */ 88 1.7 jmcneill pushl $0 89 1.7 jmcneill popfl 90 1.7 jmcneill 91 1.9 joerg /* Only beep on reset if machdep.acpi_beep_on_reset=1 */ 92 1.10 jmcneill cmpb $1,WAKEUP_beep_on_reset 93 1.10 jmcneill jne 1f 94 1.10 jmcneill movb $0xc0,%al 95 1.10 jmcneill outb %al,$0x42 96 1.10 jmcneill movb $0x04,%al 97 1.10 jmcneill outb %al,$0x42 98 1.10 jmcneill inb $0x61,%al 99 1.10 jmcneill orb $0x3,%al 100 1.10 jmcneill outb %al,$0x61 101 1.10 jmcneill 1: 102 1.7 jmcneill 103 1.8 jmcneill /* Only reset the VBIOS if machdep.acpi_vbios_reset=1 */ 104 1.10 jmcneill cmpb $1,WAKEUP_vbios_reset 105 1.10 jmcneill jne 1f 106 1.8 jmcneill 107 1.4 jmcneill /* Kick the VBIOS. */ 108 1.4 jmcneill lcall $0xc000,$3 109 1.4 jmcneill 110 1.4 jmcneill movw %cs,%ax 111 1.4 jmcneill movw %ax,%ds 112 1.4 jmcneill movw %ax,%ss 113 1.1 tshiozak 114 1.13 jmcneill /* If we need to restore a VESA VBE mode, do it now */ 115 1.13 jmcneill cmpb $0,WAKEUP_vesa_modenum 116 1.13 jmcneill je 1f 117 1.13 jmcneill movw WAKEUP_vesa_modenum,%bx 118 1.13 jmcneill orw $0x4000,%bx 119 1.13 jmcneill movw $0x4f02,%ax 120 1.13 jmcneill int $0x10 121 1.13 jmcneill 122 1.13 jmcneill movw %cs,%ax 123 1.13 jmcneill movw %ax,%ds 124 1.13 jmcneill movw %ax,%ss 125 1.13 jmcneill 1: 126 1.13 jmcneill 127 1.14 jmcneill /* Disable beep again if machdep.acpi_beep_on_reset=1 */ 128 1.14 jmcneill cmpb $1,WAKEUP_beep_on_reset 129 1.14 jmcneill jne 1f 130 1.14 jmcneill inb $0x61,%al 131 1.14 jmcneill andb $0xfc,%al 132 1.14 jmcneill outb %al,$0x61 133 1.14 jmcneill 1: 134 1.14 jmcneill 135 1.1 tshiozak /* Load GDT while non-paging */ 136 1.1 tshiozak lgdt tmp_gdt 137 1.1 tshiozak 138 1.17 maxv /* Enable protected mode without paging */ 139 1.1 tshiozak mov %cr0,%eax 140 1.1 tshiozak orl $(CR0_PE),%eax 141 1.1 tshiozak mov %eax,%cr0 142 1.1 tshiozak 143 1.1 tshiozak /* Switch to protected mode by intersegmental jump */ 144 1.17 maxv ljmpl $0x8,$wakeup_32 + ACPI_WAKEUP_ADDR 145 1.1 tshiozak 146 1.1 tshiozak .code32 147 1.1 tshiozak .align 16 148 1.1 tshiozak wakeup_32: 149 1.1 tshiozak /* 150 1.1 tshiozak * Switched to protected mode w/o paging 151 1.1 tshiozak */ 152 1.17 maxv nop 153 1.1 tshiozak 154 1.1 tshiozak /* Set up segment registers for protected mode */ 155 1.2 junyoung movw $GSEL(GDATA_SEL,SEL_KPL),%ax 156 1.1 tshiozak movw %ax,%ds 157 1.2 junyoung 158 1.17 maxv /* Enable potentially PSE and PAE */ 159 1.10 jmcneill movl WAKEUP_r_cr4 + ACPI_WAKEUP_ADDR,%eax 160 1.10 jmcneill movl %eax,%cr4 161 1.1 tshiozak 162 1.18 maxv /* 163 1.18 maxv * Load the correct MSR EFER value now to not depend on the 164 1.18 maxv * data segment register. After this point, no instruction is 165 1.18 maxv * allowed to clobber %ebx until wrmsr. 166 1.18 maxv */ 167 1.18 maxv movl WAKEUP_efer + ACPI_WAKEUP_ADDR,%ebx 168 1.18 maxv 169 1.17 maxv /* Load temporary page table, we will switch to full page table later */ 170 1.10 jmcneill movl WAKEUP_r_cr3 + ACPI_WAKEUP_ADDR,%eax 171 1.1 tshiozak movl %eax,%cr3 172 1.17 maxv 173 1.17 maxv /* Enable paging */ 174 1.11 joerg movl %cr0,%eax 175 1.16 dsl orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_MP|CR0_WP|CR0_AM),%eax 176 1.1 tshiozak movl %eax,%cr0 177 1.1 tshiozak 178 1.1 tshiozak /* Flush the prefetch queue */ 179 1.1 tshiozak jmp 1f 180 1.1 tshiozak 1: jmp 1f 181 1.1 tshiozak 1: 182 1.1 tshiozak 183 1.7 jmcneill nop 184 1.7 jmcneill 185 1.18 maxv /* 186 1.18 maxv * Load the normal system value of MSR EFER. This includes 187 1.18 maxv * enabling NXE (if supported). 188 1.18 maxv */ 189 1.18 maxv movl %ebx,%eax 190 1.18 maxv movl $0,%edx 191 1.18 maxv movl $MSR_EFER,%ecx 192 1.18 maxv wrmsr 193 1.18 maxv 194 1.10 jmcneill /* Restore registers */ 195 1.11 joerg movl WAKEUP_curcpu + ACPI_WAKEUP_ADDR,%edx 196 1.11 joerg movl WAKEUP_restorecpu + ACPI_WAKEUP_ADDR,%ebx 197 1.1 tshiozak 198 1.17 maxv /* Continue with wakeup in the high-level wakeup code */ 199 1.10 jmcneill jmp *%ebx 200 1.3 kochi 201 1.1 tshiozak .align 8 202 1.1 tshiozak tmp_gdt: 203 1.1 tshiozak .word 0xffff 204 1.10 jmcneill .long tmp_gdtable + ACPI_WAKEUP_ADDR 205 1.1 tshiozak 206 1.1 tshiozak .align 8, 0 207 1.1 tshiozak tmp_gdtable: 208 1.1 tshiozak /* null */ 209 1.1 tshiozak .word 0, 0 210 1.1 tshiozak .byte 0, 0, 0, 0 211 1.1 tshiozak /* code */ 212 1.1 tshiozak .word 0xffff, 0 213 1.1 tshiozak .byte 0, 0x9f, 0xcf, 0 214 1.1 tshiozak /* data */ 215 1.1 tshiozak .word 0xffff, 0 216 1.1 tshiozak .byte 0, 0x93, 0xcf, 0 217 1.1 tshiozak 218 1.1 tshiozak .align 16, 0 219 1.10 jmcneill .global WAKEUP_r_cr3 220 1.10 jmcneill WAKEUP_r_cr3: .long 0 221 1.10 jmcneill .global WAKEUP_r_cr4 222 1.10 jmcneill WAKEUP_r_cr4: .long 0 223 1.10 jmcneill 224 1.11 joerg .global WAKEUP_curcpu 225 1.11 joerg WAKEUP_curcpu: .long 0 226 1.10 jmcneill .global WAKEUP_restorecpu 227 1.10 jmcneill WAKEUP_restorecpu: .long 0 228 1.18 maxv .global WAKEUP_efer 229 1.18 maxv WAKEUP_efer: .long 0 230 1.10 jmcneill 231 1.10 jmcneill .global WAKEUP_vbios_reset 232 1.10 jmcneill WAKEUP_vbios_reset: .byte 0 233 1.13 jmcneill .global WAKEUP_vesa_modenum 234 1.13 jmcneill WAKEUP_vesa_modenum: .word 0 235 1.10 jmcneill .global WAKEUP_beep_on_reset 236 1.10 jmcneill WAKEUP_beep_on_reset: .byte 0 237