eisa_machdep.c revision 1.10.22.4 1 1.10.22.4 sommerfe /* $NetBSD: eisa_machdep.c,v 1.10.22.4 2001/01/07 22:12:40 sommerfeld Exp $ */
2 1.6 thorpej
3 1.6 thorpej /*-
4 1.7 thorpej * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 1.6 thorpej * All rights reserved.
6 1.6 thorpej *
7 1.6 thorpej * This code is derived from software contributed to The NetBSD Foundation
8 1.6 thorpej * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.6 thorpej * NASA Ames Research Center.
10 1.6 thorpej *
11 1.6 thorpej * Redistribution and use in source and binary forms, with or without
12 1.6 thorpej * modification, are permitted provided that the following conditions
13 1.6 thorpej * are met:
14 1.6 thorpej * 1. Redistributions of source code must retain the above copyright
15 1.6 thorpej * notice, this list of conditions and the following disclaimer.
16 1.6 thorpej * 2. Redistributions in binary form must reproduce the above copyright
17 1.6 thorpej * notice, this list of conditions and the following disclaimer in the
18 1.6 thorpej * documentation and/or other materials provided with the distribution.
19 1.6 thorpej * 3. All advertising materials mentioning features or use of this software
20 1.6 thorpej * must display the following acknowledgement:
21 1.6 thorpej * This product includes software developed by the NetBSD
22 1.6 thorpej * Foundation, Inc. and its contributors.
23 1.6 thorpej * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.6 thorpej * contributors may be used to endorse or promote products derived
25 1.6 thorpej * from this software without specific prior written permission.
26 1.6 thorpej *
27 1.6 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.6 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.6 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.6 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.6 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.6 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.6 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.6 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.6 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.6 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.6 thorpej * POSSIBILITY OF SUCH DAMAGE.
38 1.6 thorpej */
39 1.1 cgd
40 1.1 cgd /*
41 1.1 cgd * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
42 1.1 cgd *
43 1.1 cgd * Redistribution and use in source and binary forms, with or without
44 1.1 cgd * modification, are permitted provided that the following conditions
45 1.1 cgd * are met:
46 1.1 cgd * 1. Redistributions of source code must retain the above copyright
47 1.1 cgd * notice, this list of conditions and the following disclaimer.
48 1.1 cgd * 2. Redistributions in binary form must reproduce the above copyright
49 1.1 cgd * notice, this list of conditions and the following disclaimer in the
50 1.1 cgd * documentation and/or other materials provided with the distribution.
51 1.1 cgd * 3. All advertising materials mentioning features or use of this software
52 1.1 cgd * must display the following acknowledgement:
53 1.1 cgd * This product includes software developed by Christopher G. Demetriou
54 1.1 cgd * for the NetBSD Project.
55 1.1 cgd * 4. The name of the author may not be used to endorse or promote products
56 1.1 cgd * derived from this software without specific prior written permission
57 1.1 cgd *
58 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59 1.1 cgd * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
60 1.1 cgd * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
61 1.1 cgd * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
62 1.1 cgd * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
63 1.1 cgd * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
64 1.1 cgd * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
65 1.1 cgd * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
66 1.1 cgd * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
67 1.1 cgd * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68 1.1 cgd */
69 1.1 cgd
70 1.1 cgd /*
71 1.1 cgd * Machine-specific functions for EISA autoconfiguration.
72 1.1 cgd */
73 1.1 cgd
74 1.10.22.3 sommerfe #include "ioapic.h"
75 1.10.22.3 sommerfe
76 1.1 cgd #include <sys/types.h>
77 1.1 cgd #include <sys/param.h>
78 1.1 cgd #include <sys/time.h>
79 1.1 cgd #include <sys/systm.h>
80 1.1 cgd #include <sys/errno.h>
81 1.1 cgd #include <sys/device.h>
82 1.5 thorpej #include <sys/extent.h>
83 1.1 cgd
84 1.6 thorpej #define _I386_BUS_DMA_PRIVATE
85 1.6 thorpej #include <machine/bus.h>
86 1.6 thorpej
87 1.1 cgd #include <i386/isa/icu.h>
88 1.5 thorpej #include <dev/isa/isareg.h>
89 1.1 cgd #include <dev/isa/isavar.h>
90 1.1 cgd #include <dev/eisa/eisavar.h>
91 1.1 cgd
92 1.10.22.3 sommerfe #if NIOAPIC > 0
93 1.10.22.3 sommerfe #include <machine/i82093var.h>
94 1.10.22.3 sommerfe #include <machine/mpbiosvar.h>
95 1.10.22.3 sommerfe #endif
96 1.10.22.3 sommerfe
97 1.6 thorpej /*
98 1.6 thorpej * EISA doesn't have any special needs; just use the generic versions
99 1.6 thorpej * of these funcions.
100 1.6 thorpej */
101 1.6 thorpej struct i386_bus_dma_tag eisa_bus_dma_tag = {
102 1.10 thorpej 0, /* _bounce_thresh */
103 1.6 thorpej _bus_dmamap_create,
104 1.6 thorpej _bus_dmamap_destroy,
105 1.6 thorpej _bus_dmamap_load,
106 1.6 thorpej _bus_dmamap_load_mbuf,
107 1.6 thorpej _bus_dmamap_load_uio,
108 1.6 thorpej _bus_dmamap_load_raw,
109 1.6 thorpej _bus_dmamap_unload,
110 1.6 thorpej NULL, /* _dmamap_sync */
111 1.6 thorpej _bus_dmamem_alloc,
112 1.6 thorpej _bus_dmamem_free,
113 1.6 thorpej _bus_dmamem_map,
114 1.6 thorpej _bus_dmamem_unmap,
115 1.6 thorpej _bus_dmamem_mmap,
116 1.6 thorpej };
117 1.6 thorpej
118 1.1 cgd void
119 1.1 cgd eisa_attach_hook(parent, self, eba)
120 1.1 cgd struct device *parent, *self;
121 1.1 cgd struct eisabus_attach_args *eba;
122 1.1 cgd {
123 1.7 thorpej extern int eisa_has_been_seen;
124 1.1 cgd
125 1.7 thorpej /*
126 1.8 thorpej * Notify others that might need to know that the EISA bus
127 1.7 thorpej * has now been attached.
128 1.7 thorpej */
129 1.7 thorpej if (eisa_has_been_seen)
130 1.7 thorpej panic("eisaattach: EISA bus already seen!");
131 1.7 thorpej eisa_has_been_seen = 1;
132 1.1 cgd }
133 1.1 cgd
134 1.1 cgd int
135 1.1 cgd eisa_maxslots(ec)
136 1.1 cgd eisa_chipset_tag_t ec;
137 1.1 cgd {
138 1.1 cgd
139 1.1 cgd /*
140 1.1 cgd * Always try 16 slots.
141 1.1 cgd */
142 1.1 cgd return (16);
143 1.1 cgd }
144 1.1 cgd
145 1.1 cgd int
146 1.1 cgd eisa_intr_map(ec, irq, ihp)
147 1.1 cgd eisa_chipset_tag_t ec;
148 1.1 cgd u_int irq;
149 1.1 cgd eisa_intr_handle_t *ihp;
150 1.1 cgd {
151 1.10.22.1 sommerfe #if NIOAPIC > 0
152 1.10.22.1 sommerfe struct mp_intr_map *mip;
153 1.10.22.1 sommerfe #endif
154 1.1 cgd
155 1.1 cgd if (irq >= ICU_LEN) {
156 1.4 christos printf("eisa_intr_map: bad IRQ %d\n", irq);
157 1.1 cgd *ihp = -1;
158 1.1 cgd return 1;
159 1.1 cgd }
160 1.1 cgd if (irq == 2) {
161 1.4 christos printf("eisa_intr_map: changed IRQ 2 to IRQ 9\n");
162 1.1 cgd irq = 9;
163 1.1 cgd }
164 1.1 cgd
165 1.10.22.1 sommerfe #if NIOAPIC > 0
166 1.10.22.1 sommerfe if (mp_busses != NULL) {
167 1.10.22.3 sommerfe int bus = mp_eisa_bus;
168 1.10.22.3 sommerfe
169 1.10.22.3 sommerfe if (bus != -1) {
170 1.10.22.3 sommerfe for (mip = mp_busses[bus].mb_intrs; mip != NULL;
171 1.10.22.3 sommerfe mip=mip->next) {
172 1.10.22.3 sommerfe if (mip->bus_pin == irq) {
173 1.10.22.3 sommerfe *ihp = mip->ioapic_ih | irq;
174 1.10.22.3 sommerfe return 0;
175 1.10.22.3 sommerfe }
176 1.10.22.3 sommerfe }
177 1.10.22.3 sommerfe }
178 1.10.22.3 sommerfe
179 1.10.22.3 sommerfe bus = mp_isa_bus;
180 1.10.22.1 sommerfe
181 1.10.22.3 sommerfe if (bus != -1) {
182 1.10.22.3 sommerfe for (mip = mp_busses[bus].mb_intrs; mip != NULL;
183 1.10.22.3 sommerfe mip=mip->next) {
184 1.10.22.3 sommerfe if (mip->bus_pin == irq) {
185 1.10.22.3 sommerfe *ihp = mip->ioapic_ih | irq;
186 1.10.22.3 sommerfe return 0;
187 1.10.22.3 sommerfe }
188 1.10.22.1 sommerfe }
189 1.10.22.1 sommerfe }
190 1.10.22.3 sommerfe
191 1.10.22.3 sommerfe printf("eisa_intr_map: no MP mapping found\n");
192 1.10.22.1 sommerfe }
193 1.10.22.1 sommerfe #endif
194 1.10.22.1 sommerfe
195 1.10.22.1 sommerfe
196 1.1 cgd *ihp = irq;
197 1.1 cgd return 0;
198 1.1 cgd }
199 1.1 cgd
200 1.1 cgd const char *
201 1.1 cgd eisa_intr_string(ec, ih)
202 1.1 cgd eisa_chipset_tag_t ec;
203 1.1 cgd eisa_intr_handle_t ih;
204 1.1 cgd {
205 1.1 cgd static char irqstr[8]; /* 4 + 2 + NULL + sanity */
206 1.1 cgd
207 1.10.22.1 sommerfe if (ih == 0 || (ih & 0xff) >= ICU_LEN || ih == 2)
208 1.1 cgd panic("eisa_intr_string: bogus handle 0x%x\n", ih);
209 1.1 cgd
210 1.10.22.1 sommerfe #if NIOAPIC > 0
211 1.10.22.1 sommerfe if (ih & APIC_INT_VIA_APIC)
212 1.10.22.1 sommerfe sprintf(irqstr, "apic %d int %d (irq %d)",
213 1.10.22.1 sommerfe APIC_IRQ_APIC(ih),
214 1.10.22.1 sommerfe APIC_IRQ_PIN(ih),
215 1.10.22.1 sommerfe ih&0xff);
216 1.10.22.1 sommerfe else
217 1.10.22.1 sommerfe sprintf(irqstr, "irq %d", ih&0xff);
218 1.10.22.1 sommerfe #else
219 1.4 christos sprintf(irqstr, "irq %d", ih);
220 1.10.22.1 sommerfe #endif
221 1.1 cgd return (irqstr);
222 1.1 cgd
223 1.10.22.2 sommerfe }
224 1.10.22.2 sommerfe
225 1.10.22.2 sommerfe const struct evcnt *
226 1.10.22.2 sommerfe eisa_intr_evcnt(eisa_chipset_tag_t ec, eisa_intr_handle_t ih)
227 1.10.22.2 sommerfe {
228 1.10.22.2 sommerfe
229 1.10.22.2 sommerfe /* XXX for now, no evcnt parent reported */
230 1.10.22.2 sommerfe return NULL;
231 1.1 cgd }
232 1.1 cgd
233 1.1 cgd void *
234 1.1 cgd eisa_intr_establish(ec, ih, type, level, func, arg)
235 1.1 cgd eisa_chipset_tag_t ec;
236 1.1 cgd eisa_intr_handle_t ih;
237 1.1 cgd int type, level, (*func) __P((void *));
238 1.1 cgd void *arg;
239 1.1 cgd {
240 1.10.22.1 sommerfe if (ih != -1) {
241 1.10.22.1 sommerfe #if NIOAPIC > 0
242 1.10.22.1 sommerfe if (ih & APIC_INT_VIA_APIC) {
243 1.10.22.1 sommerfe return apic_intr_establish(ih, type, level,
244 1.10.22.1 sommerfe func, arg);
245 1.10.22.1 sommerfe }
246 1.10.22.1 sommerfe #endif
247 1.10.22.1 sommerfe }
248 1.1 cgd
249 1.1 cgd if (ih == 0 || ih >= ICU_LEN || ih == 2)
250 1.1 cgd panic("eisa_intr_establish: bogus handle 0x%x\n", ih);
251 1.1 cgd
252 1.2 cgd return isa_intr_establish(NULL, ih, type, level, func, arg);
253 1.1 cgd }
254 1.1 cgd
255 1.1 cgd void
256 1.1 cgd eisa_intr_disestablish(ec, cookie)
257 1.1 cgd eisa_chipset_tag_t ec;
258 1.1 cgd void *cookie;
259 1.1 cgd {
260 1.1 cgd
261 1.2 cgd return isa_intr_disestablish(NULL, cookie);
262 1.5 thorpej }
263 1.5 thorpej
264 1.5 thorpej int
265 1.5 thorpej eisa_mem_alloc(t, size, align, boundary, cacheable, addrp, bahp)
266 1.5 thorpej bus_space_tag_t t;
267 1.5 thorpej bus_size_t size, align;
268 1.5 thorpej bus_addr_t boundary;
269 1.5 thorpej int cacheable;
270 1.5 thorpej bus_addr_t *addrp;
271 1.5 thorpej bus_space_handle_t *bahp;
272 1.5 thorpej {
273 1.5 thorpej extern struct extent *iomem_ex;
274 1.5 thorpej
275 1.5 thorpej /*
276 1.5 thorpej * Allocate physical address space after the ISA hole.
277 1.5 thorpej */
278 1.5 thorpej return bus_space_alloc(t, IOM_END, iomem_ex->ex_end, size, align,
279 1.5 thorpej boundary, cacheable, addrp, bahp);
280 1.5 thorpej }
281 1.5 thorpej
282 1.5 thorpej void
283 1.5 thorpej eisa_mem_free(t, bah, size)
284 1.5 thorpej bus_space_tag_t t;
285 1.5 thorpej bus_space_handle_t bah;
286 1.5 thorpej bus_size_t size;
287 1.5 thorpej {
288 1.5 thorpej
289 1.5 thorpej bus_space_free(t, bah, size);
290 1.10.22.4 sommerfe }
291 1.10.22.4 sommerfe
292 1.10.22.4 sommerfe int
293 1.10.22.4 sommerfe eisa_conf_read_mem(ec, slot, func, entry, ecm)
294 1.10.22.4 sommerfe eisa_chipset_tag_t ec;
295 1.10.22.4 sommerfe int slot, func, entry;
296 1.10.22.4 sommerfe struct eisa_cfg_mem *ecm;
297 1.10.22.4 sommerfe {
298 1.10.22.4 sommerfe
299 1.10.22.4 sommerfe /* XXX XXX XXX */
300 1.10.22.4 sommerfe return (ENOENT);
301 1.10.22.4 sommerfe }
302 1.10.22.4 sommerfe
303 1.10.22.4 sommerfe int
304 1.10.22.4 sommerfe eisa_conf_read_irq(ec, slot, func, entry, eci)
305 1.10.22.4 sommerfe eisa_chipset_tag_t ec;
306 1.10.22.4 sommerfe int slot, func, entry;
307 1.10.22.4 sommerfe struct eisa_cfg_irq *eci;
308 1.10.22.4 sommerfe {
309 1.10.22.4 sommerfe
310 1.10.22.4 sommerfe /* XXX XXX XXX */
311 1.10.22.4 sommerfe return (ENOENT);
312 1.10.22.4 sommerfe }
313 1.10.22.4 sommerfe
314 1.10.22.4 sommerfe int
315 1.10.22.4 sommerfe eisa_conf_read_dma(ec, slot, func, entry, ecd)
316 1.10.22.4 sommerfe eisa_chipset_tag_t ec;
317 1.10.22.4 sommerfe int slot, func, entry;
318 1.10.22.4 sommerfe struct eisa_cfg_dma *ecd;
319 1.10.22.4 sommerfe {
320 1.10.22.4 sommerfe
321 1.10.22.4 sommerfe /* XXX XXX XXX */
322 1.10.22.4 sommerfe return (ENOENT);
323 1.10.22.4 sommerfe }
324 1.10.22.4 sommerfe
325 1.10.22.4 sommerfe int
326 1.10.22.4 sommerfe eisa_conf_read_io(ec, slot, func, entry, ecio)
327 1.10.22.4 sommerfe eisa_chipset_tag_t ec;
328 1.10.22.4 sommerfe int slot, func, entry;
329 1.10.22.4 sommerfe struct eisa_cfg_io *ecio;
330 1.10.22.4 sommerfe {
331 1.10.22.4 sommerfe
332 1.10.22.4 sommerfe /* XXX XXX XXX */
333 1.10.22.4 sommerfe return (ENOENT);
334 1.1 cgd }
335