cpu.h revision 1.101
1 /* $NetBSD: cpu.h,v 1.101 2003/05/20 22:53:35 kristerw Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 39 */ 40 41 #ifndef _I386_CPU_H_ 42 #define _I386_CPU_H_ 43 44 #if defined(_KERNEL_OPT) 45 #include "opt_multiprocessor.h" 46 #endif 47 48 /* 49 * Definitions unique to i386 cpu support. 50 */ 51 #include <machine/frame.h> 52 #include <machine/segments.h> 53 #include <machine/tss.h> 54 #include <machine/intrdefs.h> 55 #include <x86/cacheinfo.h> 56 57 #include <sys/device.h> 58 #include <sys/lock.h> /* will also get LOCKDEBUG */ 59 #include <sys/sched.h> 60 61 struct intrsource; 62 63 /* 64 * a bunch of this belongs in cpuvar.h; move it later.. 65 */ 66 67 struct cpu_info { 68 struct device *ci_dev; /* pointer to our device */ 69 struct cpu_info *ci_self; /* self-pointer */ 70 void *ci_tlog_base; /* Trap log base */ 71 int32_t ci_tlog_offset; /* Trap log current offset */ 72 struct schedstate_percpu ci_schedstate; /* scheduler state */ 73 struct cpu_info *ci_next; /* next cpu */ 74 75 /* 76 * Public members. 77 */ 78 struct lwp *ci_curlwp; /* current owner of the processor */ 79 struct simplelock ci_slock; /* lock on this data structure */ 80 cpuid_t ci_cpuid; /* our CPU ID */ 81 u_int ci_apicid; /* our APIC ID */ 82 u_long ci_spin_locks; /* # of spin locks held */ 83 u_long ci_simple_locks; /* # of simple locks held */ 84 85 /* 86 * Private members. 87 */ 88 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 89 int ci_fpsaving; /* save in progress */ 90 91 volatile u_int32_t ci_tlb_ipi_mask; 92 93 struct pcb *ci_curpcb; /* VA of current HW PCB */ 94 struct pcb *ci_idle_pcb; /* VA of current PCB */ 95 int ci_idle_tss_sel; /* TSS selector of idle PCB */ 96 97 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 98 u_int32_t ci_ipending; 99 int ci_ilevel; 100 int ci_idepth; 101 u_int32_t ci_imask[NIPL]; 102 u_int32_t ci_iunmask[NIPL]; 103 104 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */ 105 u_int32_t ci_flags; /* flags; see below */ 106 u_int32_t ci_ipis; /* interprocessor interrupts pending */ 107 int sc_apic_version; /* local APIC version */ 108 109 int32_t ci_cpuid_level; 110 u_int32_t ci_signature; /* X86 cpuid type */ 111 u_int32_t ci_feature_flags;/* X86 CPUID feature bits */ 112 u_int32_t ci_cpu_class; /* CPU class */ 113 u_int32_t ci_brand_id; /* Intel brand id */ 114 u_int32_t ci_vendor[4]; /* vendor string */ 115 u_int32_t ci_cpu_serial[3]; /* PIII serial number */ 116 u_int64_t ci_tsc_freq; /* cpu cycles/second */ 117 118 struct cpu_functions *ci_func; /* start/stop functions */ 119 void (*cpu_setup) __P((struct cpu_info *)); 120 /* proc-dependant init */ 121 void (*ci_info) __P((struct cpu_info *)); 122 123 int ci_want_resched; 124 int ci_astpending; 125 struct trapframe *ci_ddb_regs; 126 127 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 128 struct x86_cache_info ci_cinfo[CAI_COUNT]; 129 130 /* 131 * Variables used by cc_microtime(). 132 */ 133 struct timeval ci_cc_time; 134 int64_t ci_cc_cc; 135 int64_t ci_cc_ms_delta; 136 int64_t ci_cc_denom; 137 138 union descriptor *ci_gdt; 139 140 struct i386tss ci_doubleflt_tss; 141 struct i386tss ci_ddbipi_tss; 142 143 char *ci_doubleflt_stack; 144 char *ci_ddbipi_stack; 145 146 struct evcnt ci_ipi_events[X86_NIPI]; 147 }; 148 149 /* 150 * Processor flag notes: The "primary" CPU has certain MI-defined 151 * roles (mostly relating to hardclock handling); we distinguish 152 * betwen the processor which booted us, and the processor currently 153 * holding the "primary" role just to give us the flexibility later to 154 * change primaries should we be sufficiently twisted. 155 */ 156 157 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 158 #define CPUF_AP 0x0002 /* CPU is an AP */ 159 #define CPUF_SP 0x0004 /* CPU is only processor */ 160 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 161 162 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */ 163 164 #define CPUF_PRESENT 0x1000 /* CPU is present */ 165 #define CPUF_RUNNING 0x2000 /* CPU is running */ 166 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 167 #define CPUF_GO 0x8000 /* CPU should start running */ 168 169 /* 170 * We statically allocate the CPU info for the primary CPU (or, 171 * the only CPU on uniprocessors), and the primary CPU is the 172 * first CPU on the CPU info list. 173 */ 174 extern struct cpu_info cpu_info_primary; 175 extern struct cpu_info *cpu_info_list; 176 177 #define CPU_INFO_ITERATOR int 178 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 179 ci != NULL; ci = ci->ci_next 180 181 #if defined(MULTIPROCESSOR) 182 183 #define X86_MAXPROCS 32 /* because we use a bitmask */ 184 185 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 186 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 187 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 188 189 #define curcpu() ({struct cpu_info *__ci; \ 190 __asm __volatile("movl %%fs:4,%0":"=r" (__ci)); \ 191 __ci;}) 192 #define cpu_number() (curcpu()->ci_cpuid) 193 194 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 195 196 #if 0 197 #define x86_ipisend(ci) (((ci) != curcpu()) ? x86_send_ipi((ci),0) : 0) 198 #else 199 #define x86_ipisend(ci) 0 200 #endif 201 202 #define aston(p) ((p)->p_md.md_astpending = 1) 203 204 extern struct cpu_info *cpu_info[X86_MAXPROCS]; 205 206 void cpu_boot_secondary_processors __P((void)); 207 void cpu_init_idle_pcbs __P((void)); 208 209 /* 210 * Preempt the current process if in interrupt from user mode, 211 * or after the current trap/syscall if in system mode. 212 */ 213 extern void need_resched __P((struct cpu_info *)); 214 215 #else /* !MULTIPROCESSOR */ 216 217 #define X86_MAXPROCS 1 218 219 #ifdef _KERNEL 220 extern struct cpu_info cpu_info_primary; 221 222 #define curcpu() (&cpu_info_primary) 223 224 #endif 225 226 /* 227 * definitions of cpu-dependent requirements 228 * referenced in generic code 229 */ 230 #define cpu_number() 0 231 #define CPU_IS_PRIMARY(ci) 1 232 233 /* 234 * Preempt the current process if in interrupt from user mode, 235 * or after the current trap/syscall if in system mode. 236 */ 237 #define need_resched(ci) \ 238 do { \ 239 struct cpu_info *__ci = (ci); \ 240 __ci->ci_want_resched = 1; \ 241 if (__ci->ci_curlwp != NULL) \ 242 aston(__ci->ci_curlwp->l_proc); \ 243 } while (/*CONSTCOND*/0) 244 245 #define aston(p) ((p)->p_md.md_astpending = 1) 246 247 #endif 248 249 extern u_int32_t cpus_attached; 250 251 #define curpcb curcpu()->ci_curpcb 252 #define curlwp curcpu()->ci_curlwp 253 254 /* 255 * Arguments to hardclock, softclock and statclock 256 * encapsulate the previous machine state in an opaque 257 * clockframe; for now, use generic intrframe. 258 * 259 * Note: Since spllowersoftclock() does not actually unmask the currently 260 * running (hardclock) interrupt, CLKF_BASEPRI() *must* always be 0; otherwise 261 * we could stall hardclock ticks if another interrupt takes too long. 262 */ 263 #define clockframe intrframe 264 265 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_eflags) 266 #define CLKF_BASEPRI(frame) (0) 267 #define CLKF_PC(frame) ((frame)->if_eip) 268 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1) 269 270 /* 271 * This is used during profiling to integrate system time. It can safely 272 * assume that the process is resident. 273 */ 274 #define LWP_PC(l) ((l)->l_md.md_regs->tf_eip) 275 276 /* 277 * Give a profiling tick to the current process when the user profiling 278 * buffer pages are invalid. On the i386, request an ast to send us 279 * through trap(), marking the proc as needing a profiling tick. 280 */ 281 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, aston(p)) 282 283 /* 284 * Notify the current process (p) that it has a signal pending, 285 * process as soon as possible. 286 */ 287 #define signotify(p) aston(p) 288 289 /* 290 * We need a machine-independent name for this. 291 */ 292 extern void (*delay_func) __P((int)); 293 struct timeval; 294 extern void (*microtime_func) __P((struct timeval *)); 295 296 #define DELAY(x) (*delay_func)(x) 297 #define delay(x) (*delay_func)(x) 298 #define microtime(tv) (*microtime_func)(tv) 299 300 /* 301 * pull in #defines for kinds of processors 302 */ 303 #include <machine/cputypes.h> 304 305 struct cpu_nocpuid_nameclass { 306 int cpu_vendor; 307 const char *cpu_vendorname; 308 const char *cpu_name; 309 int cpu_class; 310 void (*cpu_setup) __P((struct cpu_info *)); 311 void (*cpu_cacheinfo) __P((struct cpu_info *)); 312 void (*cpu_info) __P((struct cpu_info *)); 313 }; 314 315 316 struct cpu_cpuid_nameclass { 317 const char *cpu_id; 318 int cpu_vendor; 319 const char *cpu_vendorname; 320 struct cpu_cpuid_family { 321 int cpu_class; 322 const char *cpu_models[CPU_MAXMODEL+2]; 323 void (*cpu_setup) __P((struct cpu_info *)); 324 void (*cpu_probe) __P((struct cpu_info *)); 325 void (*cpu_info) __P((struct cpu_info *)); 326 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1]; 327 }; 328 329 #ifdef _KERNEL 330 extern int biosbasemem; 331 extern int biosextmem; 332 extern int cpu_feature; 333 extern int cpu; 334 extern int cpu_class; 335 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[]; 336 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[]; 337 338 extern int i386_use_fxsave; 339 extern int i386_has_sse; 340 extern int i386_has_sse2; 341 342 /* machdep.c */ 343 void dumpconf __P((void)); 344 int cpu_maxproc __P((void)); 345 void cpu_reset __P((void)); 346 void i386_init_pcb_tss_ldt __P((struct cpu_info *)); 347 void i386_proc0_tss_ldt_init __P((void)); 348 void i386_bufinit __P((void)); 349 350 /* identcpu.c */ 351 extern int tmx86_has_longrun; 352 extern u_int crusoe_longrun; 353 extern u_int crusoe_frequency; 354 extern u_int crusoe_voltage; 355 extern u_int crusoe_percentage; 356 extern u_int tmx86_set_longrun_mode(u_int); 357 void tmx86_get_longrun_status_all(void); 358 u_int tmx86_get_longrun_mode(void); 359 void identifycpu __P((struct cpu_info *)); 360 361 /* vm_machdep.c */ 362 void cpu_proc_fork __P((struct proc *, struct proc *)); 363 364 /* locore.s */ 365 struct region_descriptor; 366 void lgdt __P((struct region_descriptor *)); 367 void fillw __P((short, void *, size_t)); 368 369 struct pcb; 370 void savectx __P((struct pcb *)); 371 void switch_exit __P((struct lwp *, void (*)(struct lwp *))); 372 void proc_trampoline __P((void)); 373 374 /* clock.c */ 375 void initrtclock __P((void)); 376 void startrtclock __P((void)); 377 void i8254_delay __P((int)); 378 void i8254_microtime __P((struct timeval *)); 379 void i8254_initclocks __P((void)); 380 381 /* kern_microtime.c */ 382 383 extern struct timeval cc_microset_time; 384 void cc_microtime __P((struct timeval *)); 385 void cc_microset __P((struct cpu_info *)); 386 387 /* cpu.c */ 388 389 void cpu_probe_features __P((struct cpu_info *)); 390 391 /* npx.c */ 392 void npxsave_lwp __P((struct lwp *, int)); 393 void npxsave_cpu __P((struct cpu_info *, int)); 394 395 /* vm_machdep.c */ 396 int kvtop __P((caddr_t)); 397 398 #if !defined(_LKM) 399 #include "opt_math_emulate.h" 400 #endif 401 #ifdef MATH_EMULATE 402 /* math_emulate.c */ 403 int math_emulate __P((struct trapframe *)); 404 #endif 405 406 #if !defined(_LKM) 407 #include "opt_user_ldt.h" 408 #endif 409 #ifdef USER_LDT 410 /* sys_machdep.h */ 411 int i386_get_ldt __P((struct lwp *, void *, register_t *)); 412 int i386_set_ldt __P((struct lwp *, void *, register_t *)); 413 #endif 414 415 /* isa_machdep.c */ 416 void isa_defaultirq __P((void)); 417 int isa_nmi __P((void)); 418 419 #if !defined(_LKM) 420 #include "opt_vm86.h" 421 #endif 422 #ifdef VM86 423 /* vm86.c */ 424 void vm86_gpfault __P((struct lwp *, int)); 425 #endif /* VM86 */ 426 427 /* consinit.c */ 428 void kgdb_port_init __P((void)); 429 430 /* bus_machdep.c */ 431 void x86_bus_space_init __P((void)); 432 void x86_bus_space_mallocok __P((void)); 433 434 #endif /* _KERNEL */ 435 436 #include <machine/psl.h> 437 438 /* 439 * CTL_MACHDEP definitions. 440 */ 441 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 442 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 443 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 444 #define CPU_NKPDE 4 /* int: number of kernel PDEs */ 445 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 446 #define CPU_DISKINFO 6 /* struct disklist *: 447 * disk geometry information */ 448 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 449 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 450 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 451 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 452 #define CPU_TMLR_MODE 11 /* int: longrun mode 453 * 0: minimum frequency 454 * 1: economy 455 * 2: performance 456 * 3: maximum frequency 457 */ 458 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 459 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 460 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 461 #define CPU_MAXID 15 /* number of valid machdep ids */ 462 463 #define CTL_MACHDEP_NAMES { \ 464 { 0, 0 }, \ 465 { "console_device", CTLTYPE_STRUCT }, \ 466 { "biosbasemem", CTLTYPE_INT }, \ 467 { "biosextmem", CTLTYPE_INT }, \ 468 { "nkpde", CTLTYPE_INT }, \ 469 { "booted_kernel", CTLTYPE_STRING }, \ 470 { "diskinfo", CTLTYPE_STRUCT }, \ 471 { "fpu_present", CTLTYPE_INT }, \ 472 { "osfxsr", CTLTYPE_INT }, \ 473 { "sse", CTLTYPE_INT }, \ 474 { "sse2", CTLTYPE_INT }, \ 475 { "tm_longrun_mode", CTLTYPE_INT }, \ 476 { "tm_longrun_frequency", CTLTYPE_INT }, \ 477 { "tm_longrun_voltage", CTLTYPE_INT }, \ 478 { "tm_longrun_percentage", CTLTYPE_INT }, \ 479 } 480 481 482 /* 483 * Structure for CPU_DISKINFO sysctl call. 484 * XXX this should be somewhere else. 485 */ 486 #define MAX_BIOSDISKS 16 487 488 struct disklist { 489 int dl_nbiosdisks; /* number of bios disks */ 490 struct biosdisk_info { 491 int bi_dev; /* BIOS device # (0x80 ..) */ 492 int bi_cyl; /* cylinders on disk */ 493 int bi_head; /* heads per track */ 494 int bi_sec; /* sectors per track */ 495 u_int64_t bi_lbasecs; /* total sec. (iff ext13) */ 496 #define BIFLAG_INVALID 0x01 497 #define BIFLAG_EXTINT13 0x02 498 int bi_flags; 499 } dl_biosdisks[MAX_BIOSDISKS]; 500 501 int dl_nnativedisks; /* number of native disks */ 502 struct nativedisk_info { 503 char ni_devname[16]; /* native device name */ 504 int ni_nmatches; /* # of matches w/ BIOS */ 505 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 506 } dl_nativedisks[1]; /* actually longer */ 507 }; 508 509 #endif /* !_I386_CPU_H_ */ 510
Indexes created Wed Sep 24 05:09:52 GMT 2025