cpu.h revision 1.104 1 /* $NetBSD: cpu.h,v 1.104 2003/09/06 22:05:49 christos Exp $ */
2
3 /*-
4 * Copyright (c) 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91
35 */
36
37 #ifndef _I386_CPU_H_
38 #define _I386_CPU_H_
39
40 #if defined(_KERNEL_OPT)
41 #include "opt_multiprocessor.h"
42 #endif
43
44 /*
45 * Definitions unique to i386 cpu support.
46 */
47 #include <machine/frame.h>
48 #include <machine/segments.h>
49 #include <machine/tss.h>
50 #include <machine/intrdefs.h>
51 #include <x86/cacheinfo.h>
52
53 #include <sys/device.h>
54 #include <sys/lock.h> /* will also get LOCKDEBUG */
55 #include <sys/sched.h>
56
57 struct intrsource;
58
59 /*
60 * a bunch of this belongs in cpuvar.h; move it later..
61 */
62
63 struct cpu_info {
64 struct device *ci_dev; /* pointer to our device */
65 struct cpu_info *ci_self; /* self-pointer */
66 void *ci_tlog_base; /* Trap log base */
67 int32_t ci_tlog_offset; /* Trap log current offset */
68 struct schedstate_percpu ci_schedstate; /* scheduler state */
69 struct cpu_info *ci_next; /* next cpu */
70
71 /*
72 * Public members.
73 */
74 struct lwp *ci_curlwp; /* current owner of the processor */
75 struct simplelock ci_slock; /* lock on this data structure */
76 cpuid_t ci_cpuid; /* our CPU ID */
77 u_int ci_apicid; /* our APIC ID */
78 u_long ci_spin_locks; /* # of spin locks held */
79 u_long ci_simple_locks; /* # of simple locks held */
80
81 /*
82 * Private members.
83 */
84 struct lwp *ci_fpcurlwp; /* current owner of the FPU */
85 int ci_fpsaving; /* save in progress */
86
87 volatile u_int32_t ci_tlb_ipi_mask;
88
89 struct pcb *ci_curpcb; /* VA of current HW PCB */
90 struct pcb *ci_idle_pcb; /* VA of current PCB */
91 int ci_idle_tss_sel; /* TSS selector of idle PCB */
92
93 struct intrsource *ci_isources[MAX_INTR_SOURCES];
94 u_int32_t ci_ipending;
95 int ci_ilevel;
96 int ci_idepth;
97 u_int32_t ci_imask[NIPL];
98 u_int32_t ci_iunmask[NIPL];
99
100 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */
101 u_int32_t ci_flags; /* flags; see below */
102 u_int32_t ci_ipis; /* interprocessor interrupts pending */
103 int sc_apic_version; /* local APIC version */
104
105 int32_t ci_cpuid_level;
106 u_int32_t ci_signature; /* X86 cpuid type */
107 u_int32_t ci_feature_flags;/* X86 CPUID feature bits */
108 u_int32_t ci_cpu_class; /* CPU class */
109 u_int32_t ci_brand_id; /* Intel brand id */
110 u_int32_t ci_vendor[4]; /* vendor string */
111 u_int32_t ci_cpu_serial[3]; /* PIII serial number */
112 u_int64_t ci_tsc_freq; /* cpu cycles/second */
113
114 struct cpu_functions *ci_func; /* start/stop functions */
115 void (*cpu_setup) __P((struct cpu_info *));
116 /* proc-dependant init */
117 void (*ci_info) __P((struct cpu_info *));
118
119 int ci_want_resched;
120 int ci_astpending;
121 struct trapframe *ci_ddb_regs;
122
123 u_int ci_cflush_lsize; /* CFLUSH insn line size */
124 struct x86_cache_info ci_cinfo[CAI_COUNT];
125
126 /*
127 * Variables used by cc_microtime().
128 */
129 struct timeval ci_cc_time;
130 int64_t ci_cc_cc;
131 int64_t ci_cc_ms_delta;
132 int64_t ci_cc_denom;
133
134 union descriptor *ci_gdt;
135
136 struct i386tss ci_doubleflt_tss;
137 struct i386tss ci_ddbipi_tss;
138
139 char *ci_doubleflt_stack;
140 char *ci_ddbipi_stack;
141
142 struct evcnt ci_ipi_events[X86_NIPI];
143 };
144
145 /*
146 * Processor flag notes: The "primary" CPU has certain MI-defined
147 * roles (mostly relating to hardclock handling); we distinguish
148 * betwen the processor which booted us, and the processor currently
149 * holding the "primary" role just to give us the flexibility later to
150 * change primaries should we be sufficiently twisted.
151 */
152
153 #define CPUF_BSP 0x0001 /* CPU is the original BSP */
154 #define CPUF_AP 0x0002 /* CPU is an AP */
155 #define CPUF_SP 0x0004 /* CPU is only processor */
156 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */
157
158 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */
159
160 #define CPUF_PRESENT 0x1000 /* CPU is present */
161 #define CPUF_RUNNING 0x2000 /* CPU is running */
162 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */
163 #define CPUF_GO 0x8000 /* CPU should start running */
164
165 /*
166 * We statically allocate the CPU info for the primary CPU (or,
167 * the only CPU on uniprocessors), and the primary CPU is the
168 * first CPU on the CPU info list.
169 */
170 extern struct cpu_info cpu_info_primary;
171 extern struct cpu_info *cpu_info_list;
172
173 #define CPU_INFO_ITERATOR int
174 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \
175 ci != NULL; ci = ci->ci_next
176
177 #if defined(MULTIPROCESSOR)
178
179 #define X86_MAXPROCS 32 /* because we use a bitmask */
180
181 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci))
182 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci))
183 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci))
184
185 #define curcpu() ({struct cpu_info *__ci; \
186 __asm __volatile("movl %%fs:4,%0":"=r" (__ci)); \
187 __ci;})
188 #define cpu_number() (curcpu()->ci_cpuid)
189
190 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY)
191
192 #if 0
193 #define x86_ipisend(ci) (((ci) != curcpu()) ? x86_send_ipi((ci),0) : 0)
194 #else
195 #define x86_ipisend(ci) 0
196 #endif
197
198 #define aston(p) ((p)->p_md.md_astpending = 1)
199
200 extern struct cpu_info *cpu_info[X86_MAXPROCS];
201
202 void cpu_boot_secondary_processors __P((void));
203 void cpu_init_idle_pcbs __P((void));
204
205 /*
206 * Preempt the current process if in interrupt from user mode,
207 * or after the current trap/syscall if in system mode.
208 */
209 extern void need_resched __P((struct cpu_info *));
210
211 #else /* !MULTIPROCESSOR */
212
213 #define X86_MAXPROCS 1
214
215 #ifdef _KERNEL
216
217 #define curcpu() (&cpu_info_primary)
218
219 #endif
220
221 /*
222 * definitions of cpu-dependent requirements
223 * referenced in generic code
224 */
225 #define cpu_number() 0
226 #define CPU_IS_PRIMARY(ci) 1
227
228 /*
229 * Preempt the current process if in interrupt from user mode,
230 * or after the current trap/syscall if in system mode.
231 */
232 #define need_resched(ci) \
233 do { \
234 struct cpu_info *__ci = (ci); \
235 __ci->ci_want_resched = 1; \
236 if (__ci->ci_curlwp != NULL) \
237 aston(__ci->ci_curlwp->l_proc); \
238 } while (/*CONSTCOND*/0)
239
240 #define aston(p) ((p)->p_md.md_astpending = 1)
241
242 #endif /* MULTIPROCESSOR */
243
244 extern u_int32_t cpus_attached;
245
246 #define curpcb curcpu()->ci_curpcb
247 #define curlwp curcpu()->ci_curlwp
248
249 /*
250 * Arguments to hardclock, softclock and statclock
251 * encapsulate the previous machine state in an opaque
252 * clockframe; for now, use generic intrframe.
253 *
254 * Note: Since spllowersoftclock() does not actually unmask the currently
255 * running (hardclock) interrupt, CLKF_BASEPRI() *must* always be 0; otherwise
256 * we could stall hardclock ticks if another interrupt takes too long.
257 */
258 #define clockframe intrframe
259
260 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_eflags)
261 #define CLKF_BASEPRI(frame) (0)
262 #define CLKF_PC(frame) ((frame)->if_eip)
263 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1)
264
265 /*
266 * This is used during profiling to integrate system time. It can safely
267 * assume that the process is resident.
268 */
269 #define LWP_PC(l) ((l)->l_md.md_regs->tf_eip)
270
271 /*
272 * Give a profiling tick to the current process when the user profiling
273 * buffer pages are invalid. On the i386, request an ast to send us
274 * through trap(), marking the proc as needing a profiling tick.
275 */
276 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, aston(p))
277
278 /*
279 * Notify the current process (p) that it has a signal pending,
280 * process as soon as possible.
281 */
282 #define signotify(p) aston(p)
283
284 /*
285 * We need a machine-independent name for this.
286 */
287 extern void (*delay_func) __P((int));
288 struct timeval;
289 extern void (*microtime_func) __P((struct timeval *));
290
291 #define DELAY(x) (*delay_func)(x)
292 #define delay(x) (*delay_func)(x)
293 #define microtime(tv) (*microtime_func)(tv)
294
295 /*
296 * pull in #defines for kinds of processors
297 */
298 #include <machine/cputypes.h>
299
300 struct cpu_nocpuid_nameclass {
301 int cpu_vendor;
302 const char *cpu_vendorname;
303 const char *cpu_name;
304 int cpu_class;
305 void (*cpu_setup) __P((struct cpu_info *));
306 void (*cpu_cacheinfo) __P((struct cpu_info *));
307 void (*cpu_info) __P((struct cpu_info *));
308 };
309
310
311 struct cpu_cpuid_nameclass {
312 const char *cpu_id;
313 int cpu_vendor;
314 const char *cpu_vendorname;
315 struct cpu_cpuid_family {
316 int cpu_class;
317 const char *cpu_models[CPU_MAXMODEL+2];
318 void (*cpu_setup) __P((struct cpu_info *));
319 void (*cpu_probe) __P((struct cpu_info *));
320 void (*cpu_info) __P((struct cpu_info *));
321 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1];
322 };
323
324 #ifdef _KERNEL
325 extern int biosbasemem;
326 extern int biosextmem;
327 extern unsigned int cpu_feature;
328 extern int cpu;
329 extern int cpu_class;
330 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[];
331 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[];
332
333 extern int i386_use_fxsave;
334 extern int i386_has_sse;
335 extern int i386_has_sse2;
336
337 /* machdep.c */
338 void dumpconf __P((void));
339 int cpu_maxproc __P((void));
340 void cpu_reset __P((void));
341 void i386_init_pcb_tss_ldt __P((struct cpu_info *));
342 void i386_proc0_tss_ldt_init __P((void));
343 void i386_bufinit __P((void));
344
345 /* identcpu.c */
346 extern int tmx86_has_longrun;
347 extern u_int crusoe_longrun;
348 extern u_int crusoe_frequency;
349 extern u_int crusoe_voltage;
350 extern u_int crusoe_percentage;
351 extern u_int tmx86_set_longrun_mode(u_int);
352 void tmx86_get_longrun_status_all(void);
353 u_int tmx86_get_longrun_mode(void);
354 void identifycpu __P((struct cpu_info *));
355
356 /* vm_machdep.c */
357 void cpu_proc_fork __P((struct proc *, struct proc *));
358
359 /* locore.s */
360 struct region_descriptor;
361 void lgdt __P((struct region_descriptor *));
362 void fillw __P((short, void *, size_t));
363
364 struct pcb;
365 void savectx __P((struct pcb *));
366 void switch_exit __P((struct lwp *, void (*)(struct lwp *)));
367 void proc_trampoline __P((void));
368
369 /* clock.c */
370 void initrtclock __P((void));
371 void startrtclock __P((void));
372 void i8254_delay __P((int));
373 void i8254_microtime __P((struct timeval *));
374 void i8254_initclocks __P((void));
375
376 /* kern_microtime.c */
377
378 extern struct timeval cc_microset_time;
379 void cc_microtime __P((struct timeval *));
380 void cc_microset __P((struct cpu_info *));
381
382 /* cpu.c */
383
384 void cpu_probe_features __P((struct cpu_info *));
385
386 /* npx.c */
387 void npxsave_lwp __P((struct lwp *, int));
388 void npxsave_cpu __P((struct cpu_info *, int));
389
390 /* vm_machdep.c */
391 int kvtop __P((caddr_t));
392
393 #if !defined(_LKM)
394 #include "opt_math_emulate.h"
395 #endif
396 #ifdef MATH_EMULATE
397 /* math_emulate.c */
398 int math_emulate __P((struct trapframe *, ksiginfo_t *));
399 #endif
400
401 #if !defined(_LKM)
402 #include "opt_user_ldt.h"
403 #endif
404 #ifdef USER_LDT
405 /* sys_machdep.h */
406 int i386_get_ldt __P((struct lwp *, void *, register_t *));
407 int i386_set_ldt __P((struct lwp *, void *, register_t *));
408 #endif
409
410 /* isa_machdep.c */
411 void isa_defaultirq __P((void));
412 int isa_nmi __P((void));
413
414 #if !defined(_LKM)
415 #include "opt_vm86.h"
416 #endif
417 #ifdef VM86
418 /* vm86.c */
419 void vm86_gpfault __P((struct lwp *, int));
420 #endif /* VM86 */
421
422 /* consinit.c */
423 void kgdb_port_init __P((void));
424
425 /* bus_machdep.c */
426 void x86_bus_space_init __P((void));
427 void x86_bus_space_mallocok __P((void));
428
429 #endif /* _KERNEL */
430
431 #include <machine/psl.h>
432
433 /*
434 * CTL_MACHDEP definitions.
435 */
436 #define CPU_CONSDEV 1 /* dev_t: console terminal device */
437 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */
438 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */
439 #define CPU_NKPDE 4 /* int: number of kernel PDEs */
440 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */
441 #define CPU_DISKINFO 6 /* struct disklist *:
442 * disk geometry information */
443 #define CPU_FPU_PRESENT 7 /* int: FPU is present */
444 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */
445 #define CPU_SSE 9 /* int: OS/CPU supports SSE */
446 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */
447 #define CPU_TMLR_MODE 11 /* int: longrun mode
448 * 0: minimum frequency
449 * 1: economy
450 * 2: performance
451 * 3: maximum frequency
452 */
453 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */
454 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */
455 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */
456 #define CPU_MAXID 15 /* number of valid machdep ids */
457
458 #define CTL_MACHDEP_NAMES { \
459 { 0, 0 }, \
460 { "console_device", CTLTYPE_STRUCT }, \
461 { "biosbasemem", CTLTYPE_INT }, \
462 { "biosextmem", CTLTYPE_INT }, \
463 { "nkpde", CTLTYPE_INT }, \
464 { "booted_kernel", CTLTYPE_STRING }, \
465 { "diskinfo", CTLTYPE_STRUCT }, \
466 { "fpu_present", CTLTYPE_INT }, \
467 { "osfxsr", CTLTYPE_INT }, \
468 { "sse", CTLTYPE_INT }, \
469 { "sse2", CTLTYPE_INT }, \
470 { "tm_longrun_mode", CTLTYPE_INT }, \
471 { "tm_longrun_frequency", CTLTYPE_INT }, \
472 { "tm_longrun_voltage", CTLTYPE_INT }, \
473 { "tm_longrun_percentage", CTLTYPE_INT }, \
474 }
475
476
477 /*
478 * Structure for CPU_DISKINFO sysctl call.
479 * XXX this should be somewhere else.
480 */
481 #define MAX_BIOSDISKS 16
482
483 struct disklist {
484 int dl_nbiosdisks; /* number of bios disks */
485 struct biosdisk_info {
486 int bi_dev; /* BIOS device # (0x80 ..) */
487 int bi_cyl; /* cylinders on disk */
488 int bi_head; /* heads per track */
489 int bi_sec; /* sectors per track */
490 u_int64_t bi_lbasecs; /* total sec. (iff ext13) */
491 #define BIFLAG_INVALID 0x01
492 #define BIFLAG_EXTINT13 0x02
493 int bi_flags;
494 } dl_biosdisks[MAX_BIOSDISKS];
495
496 int dl_nnativedisks; /* number of native disks */
497 struct nativedisk_info {
498 char ni_devname[16]; /* native device name */
499 int ni_nmatches; /* # of matches w/ BIOS */
500 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
501 } dl_nativedisks[1]; /* actually longer */
502 };
503
504 #endif /* !_I386_CPU_H_ */
505