cpu.h revision 1.108
1 /* $NetBSD: cpu.h,v 1.108 2003/10/10 13:02:34 simonb Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _I386_CPU_H_ 38 #define _I386_CPU_H_ 39 40 #ifdef _KERNEL 41 #if defined(_KERNEL_OPT) 42 #include "opt_multiprocessor.h" 43 #include "opt_math_emulate.h" 44 #include "opt_user_ldt.h" 45 #include "opt_vm86.h" 46 #endif 47 48 /* 49 * Definitions unique to i386 cpu support. 50 */ 51 #include <machine/frame.h> 52 #include <machine/segments.h> 53 #include <machine/tss.h> 54 #include <machine/intrdefs.h> 55 #include <x86/cacheinfo.h> 56 57 #include <sys/device.h> 58 #include <sys/lock.h> /* will also get LOCKDEBUG */ 59 #include <sys/sched.h> 60 61 #include <lib/libkern/libkern.h> /* offsetof */ 62 63 struct intrsource; 64 65 /* 66 * a bunch of this belongs in cpuvar.h; move it later.. 67 */ 68 69 struct cpu_info { 70 struct device *ci_dev; /* pointer to our device */ 71 struct cpu_info *ci_self; /* self-pointer */ 72 void *ci_tlog_base; /* Trap log base */ 73 int32_t ci_tlog_offset; /* Trap log current offset */ 74 struct schedstate_percpu ci_schedstate; /* scheduler state */ 75 struct cpu_info *ci_next; /* next cpu */ 76 77 /* 78 * Public members. 79 */ 80 struct lwp *ci_curlwp; /* current owner of the processor */ 81 struct simplelock ci_slock; /* lock on this data structure */ 82 cpuid_t ci_cpuid; /* our CPU ID */ 83 u_int ci_apicid; /* our APIC ID */ 84 u_long ci_spin_locks; /* # of spin locks held */ 85 u_long ci_simple_locks; /* # of simple locks held */ 86 87 /* 88 * Private members. 89 */ 90 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 91 int ci_fpsaving; /* save in progress */ 92 93 volatile u_int32_t ci_tlb_ipi_mask; 94 95 struct pcb *ci_curpcb; /* VA of current HW PCB */ 96 struct pcb *ci_idle_pcb; /* VA of current PCB */ 97 int ci_idle_tss_sel; /* TSS selector of idle PCB */ 98 99 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 100 u_int32_t ci_ipending; 101 int ci_ilevel; 102 int ci_idepth; 103 u_int32_t ci_imask[NIPL]; 104 u_int32_t ci_iunmask[NIPL]; 105 106 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */ 107 u_int32_t ci_flags; /* flags; see below */ 108 u_int32_t ci_ipis; /* interprocessor interrupts pending */ 109 int sc_apic_version; /* local APIC version */ 110 111 int32_t ci_cpuid_level; 112 u_int32_t ci_signature; /* X86 cpuid type */ 113 u_int32_t ci_feature_flags;/* X86 CPUID feature bits */ 114 u_int32_t ci_cpu_class; /* CPU class */ 115 u_int32_t ci_brand_id; /* Intel brand id */ 116 u_int32_t ci_vendor[4]; /* vendor string */ 117 u_int32_t ci_cpu_serial[3]; /* PIII serial number */ 118 u_int64_t ci_tsc_freq; /* cpu cycles/second */ 119 120 struct cpu_functions *ci_func; /* start/stop functions */ 121 void (*cpu_setup) __P((struct cpu_info *)); 122 /* proc-dependant init */ 123 void (*ci_info) __P((struct cpu_info *)); 124 125 int ci_want_resched; 126 int ci_astpending; 127 struct trapframe *ci_ddb_regs; 128 129 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 130 struct x86_cache_info ci_cinfo[CAI_COUNT]; 131 132 /* 133 * Variables used by cc_microtime(). 134 */ 135 struct timeval ci_cc_time; 136 int64_t ci_cc_cc; 137 int64_t ci_cc_ms_delta; 138 int64_t ci_cc_denom; 139 140 union descriptor *ci_gdt; 141 142 struct i386tss ci_doubleflt_tss; 143 struct i386tss ci_ddbipi_tss; 144 145 char *ci_doubleflt_stack; 146 char *ci_ddbipi_stack; 147 148 struct evcnt ci_ipi_events[X86_NIPI]; 149 }; 150 151 /* 152 * Processor flag notes: The "primary" CPU has certain MI-defined 153 * roles (mostly relating to hardclock handling); we distinguish 154 * betwen the processor which booted us, and the processor currently 155 * holding the "primary" role just to give us the flexibility later to 156 * change primaries should we be sufficiently twisted. 157 */ 158 159 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 160 #define CPUF_AP 0x0002 /* CPU is an AP */ 161 #define CPUF_SP 0x0004 /* CPU is only processor */ 162 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 163 164 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */ 165 166 #define CPUF_PRESENT 0x1000 /* CPU is present */ 167 #define CPUF_RUNNING 0x2000 /* CPU is running */ 168 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 169 #define CPUF_GO 0x8000 /* CPU should start running */ 170 171 /* 172 * We statically allocate the CPU info for the primary CPU (or, 173 * the only CPU on uniprocessors), and the primary CPU is the 174 * first CPU on the CPU info list. 175 */ 176 extern struct cpu_info cpu_info_primary; 177 extern struct cpu_info *cpu_info_list; 178 179 #define CPU_INFO_ITERATOR int 180 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 181 ci != NULL; ci = ci->ci_next 182 183 #if defined(MULTIPROCESSOR) 184 185 #define X86_MAXPROCS 32 /* because we use a bitmask */ 186 187 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 188 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 189 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 190 191 static struct cpu_info *curcpu(void); 192 193 __inline static struct cpu_info * __attribute__((__unused__)) 194 curcpu() 195 { 196 struct cpu_info *ci; 197 198 __asm __volatile("movl %%fs:%1, %0" : 199 "=r" (ci) : 200 "m" 201 (*(struct cpuinfo * const *)offsetof(struct cpu_info, ci_self))); 202 return ci; 203 } 204 205 #define cpu_number() (curcpu()->ci_cpuid) 206 207 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 208 209 #if 0 210 #define x86_ipisend(ci) (((ci) != curcpu()) ? x86_send_ipi((ci),0) : 0) 211 #else 212 #define x86_ipisend(ci) 0 213 #endif 214 215 #define aston(p) ((p)->p_md.md_astpending = 1) 216 217 extern struct cpu_info *cpu_info[X86_MAXPROCS]; 218 219 void cpu_boot_secondary_processors __P((void)); 220 void cpu_init_idle_pcbs __P((void)); 221 222 /* 223 * Preempt the current process if in interrupt from user mode, 224 * or after the current trap/syscall if in system mode. 225 */ 226 extern void need_resched __P((struct cpu_info *)); 227 228 #else /* !MULTIPROCESSOR */ 229 230 #define X86_MAXPROCS 1 231 #define curcpu() (&cpu_info_primary) 232 233 /* 234 * definitions of cpu-dependent requirements 235 * referenced in generic code 236 */ 237 #define cpu_number() 0 238 #define CPU_IS_PRIMARY(ci) 1 239 240 /* 241 * Preempt the current process if in interrupt from user mode, 242 * or after the current trap/syscall if in system mode. 243 */ 244 #define need_resched(ci) \ 245 do { \ 246 struct cpu_info *__ci = (ci); \ 247 __ci->ci_want_resched = 1; \ 248 if (__ci->ci_curlwp != NULL) \ 249 aston(__ci->ci_curlwp->l_proc); \ 250 } while (/*CONSTCOND*/0) 251 252 #define aston(p) ((p)->p_md.md_astpending = 1) 253 254 #endif /* MULTIPROCESSOR */ 255 256 extern u_int32_t cpus_attached; 257 258 #define curpcb curcpu()->ci_curpcb 259 #define curlwp curcpu()->ci_curlwp 260 261 /* 262 * Arguments to hardclock, softclock and statclock 263 * encapsulate the previous machine state in an opaque 264 * clockframe; for now, use generic intrframe. 265 * 266 * Note: Since spllowersoftclock() does not actually unmask the currently 267 * running (hardclock) interrupt, CLKF_BASEPRI() *must* always be 0; otherwise 268 * we could stall hardclock ticks if another interrupt takes too long. 269 */ 270 #define clockframe intrframe 271 272 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_eflags) 273 #define CLKF_BASEPRI(frame) (0) 274 #define CLKF_PC(frame) ((frame)->if_eip) 275 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1) 276 277 /* 278 * This is used during profiling to integrate system time. It can safely 279 * assume that the process is resident. 280 */ 281 #define LWP_PC(l) ((l)->l_md.md_regs->tf_eip) 282 283 /* 284 * Give a profiling tick to the current process when the user profiling 285 * buffer pages are invalid. On the i386, request an ast to send us 286 * through trap(), marking the proc as needing a profiling tick. 287 */ 288 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, aston(p)) 289 290 /* 291 * Notify the current process (p) that it has a signal pending, 292 * process as soon as possible. 293 */ 294 #define signotify(p) aston(p) 295 296 /* 297 * We need a machine-independent name for this. 298 */ 299 extern void (*delay_func) __P((int)); 300 struct timeval; 301 extern void (*microtime_func) __P((struct timeval *)); 302 303 #define DELAY(x) (*delay_func)(x) 304 #define delay(x) (*delay_func)(x) 305 #define microtime(tv) (*microtime_func)(tv) 306 307 /* 308 * pull in #defines for kinds of processors 309 */ 310 #include <machine/cputypes.h> 311 312 struct cpu_nocpuid_nameclass { 313 int cpu_vendor; 314 const char *cpu_vendorname; 315 const char *cpu_name; 316 int cpu_class; 317 void (*cpu_setup) __P((struct cpu_info *)); 318 void (*cpu_cacheinfo) __P((struct cpu_info *)); 319 void (*cpu_info) __P((struct cpu_info *)); 320 }; 321 322 323 struct cpu_cpuid_nameclass { 324 const char *cpu_id; 325 int cpu_vendor; 326 const char *cpu_vendorname; 327 struct cpu_cpuid_family { 328 int cpu_class; 329 const char *cpu_models[CPU_MAXMODEL+2]; 330 void (*cpu_setup) __P((struct cpu_info *)); 331 void (*cpu_probe) __P((struct cpu_info *)); 332 void (*cpu_info) __P((struct cpu_info *)); 333 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1]; 334 }; 335 336 extern int biosbasemem; 337 extern int biosextmem; 338 extern unsigned int cpu_feature; 339 extern int cpu; 340 extern int cpu_class; 341 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[]; 342 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[]; 343 344 extern int i386_use_fxsave; 345 extern int i386_has_sse; 346 extern int i386_has_sse2; 347 348 /* machdep.c */ 349 void dumpconf __P((void)); 350 int cpu_maxproc __P((void)); 351 void cpu_reset __P((void)); 352 void i386_init_pcb_tss_ldt __P((struct cpu_info *)); 353 void i386_proc0_tss_ldt_init __P((void)); 354 void i386_bufinit __P((void)); 355 356 /* identcpu.c */ 357 extern int tmx86_has_longrun; 358 extern u_int crusoe_longrun; 359 extern u_int crusoe_frequency; 360 extern u_int crusoe_voltage; 361 extern u_int crusoe_percentage; 362 extern u_int tmx86_set_longrun_mode(u_int); 363 void tmx86_get_longrun_status_all(void); 364 u_int tmx86_get_longrun_mode(void); 365 void identifycpu __P((struct cpu_info *)); 366 367 /* vm_machdep.c */ 368 void cpu_proc_fork __P((struct proc *, struct proc *)); 369 370 /* locore.s */ 371 struct region_descriptor; 372 void lgdt __P((struct region_descriptor *)); 373 void fillw __P((short, void *, size_t)); 374 375 struct pcb; 376 void savectx __P((struct pcb *)); 377 void switch_exit __P((struct lwp *, void (*)(struct lwp *))); 378 void proc_trampoline __P((void)); 379 380 /* clock.c */ 381 void initrtclock __P((void)); 382 void startrtclock __P((void)); 383 void i8254_delay __P((int)); 384 void i8254_microtime __P((struct timeval *)); 385 void i8254_initclocks __P((void)); 386 387 /* kern_microtime.c */ 388 389 extern struct timeval cc_microset_time; 390 void cc_microtime __P((struct timeval *)); 391 void cc_microset __P((struct cpu_info *)); 392 393 /* cpu.c */ 394 395 void cpu_probe_features __P((struct cpu_info *)); 396 397 /* npx.c */ 398 void npxsave_lwp __P((struct lwp *, int)); 399 void npxsave_cpu __P((struct cpu_info *, int)); 400 401 /* vm_machdep.c */ 402 int kvtop __P((caddr_t)); 403 404 #ifdef MATH_EMULATE 405 /* math_emulate.c */ 406 int math_emulate __P((struct trapframe *, ksiginfo_t *)); 407 #endif 408 409 #ifdef USER_LDT 410 /* sys_machdep.h */ 411 int i386_get_ldt __P((struct lwp *, void *, register_t *)); 412 int i386_set_ldt __P((struct lwp *, void *, register_t *)); 413 #endif 414 415 /* isa_machdep.c */ 416 void isa_defaultirq __P((void)); 417 int isa_nmi __P((void)); 418 419 #ifdef VM86 420 /* vm86.c */ 421 void vm86_gpfault __P((struct lwp *, int)); 422 #endif /* VM86 */ 423 424 /* consinit.c */ 425 void kgdb_port_init __P((void)); 426 427 /* bus_machdep.c */ 428 void x86_bus_space_init __P((void)); 429 void x86_bus_space_mallocok __P((void)); 430 431 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 432 433 #endif /* _KERNEL */ 434 435 /* 436 * CTL_MACHDEP definitions. 437 */ 438 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 439 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 440 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 441 #define CPU_NKPDE 4 /* int: number of kernel PDEs */ 442 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 443 #define CPU_DISKINFO 6 /* struct disklist *: 444 * disk geometry information */ 445 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 446 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 447 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 448 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 449 #define CPU_TMLR_MODE 11 /* int: longrun mode 450 * 0: minimum frequency 451 * 1: economy 452 * 2: performance 453 * 3: maximum frequency 454 */ 455 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 456 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 457 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 458 #define CPU_MAXID 15 /* number of valid machdep ids */ 459 460 #define CTL_MACHDEP_NAMES { \ 461 { 0, 0 }, \ 462 { "console_device", CTLTYPE_STRUCT }, \ 463 { "biosbasemem", CTLTYPE_INT }, \ 464 { "biosextmem", CTLTYPE_INT }, \ 465 { "nkpde", CTLTYPE_INT }, \ 466 { "booted_kernel", CTLTYPE_STRING }, \ 467 { "diskinfo", CTLTYPE_STRUCT }, \ 468 { "fpu_present", CTLTYPE_INT }, \ 469 { "osfxsr", CTLTYPE_INT }, \ 470 { "sse", CTLTYPE_INT }, \ 471 { "sse2", CTLTYPE_INT }, \ 472 { "tm_longrun_mode", CTLTYPE_INT }, \ 473 { "tm_longrun_frequency", CTLTYPE_INT }, \ 474 { "tm_longrun_voltage", CTLTYPE_INT }, \ 475 { "tm_longrun_percentage", CTLTYPE_INT }, \ 476 } 477 478 /* 479 * Structure for CPU_DISKINFO sysctl call. 480 * XXX this should be somewhere else. 481 */ 482 #define MAX_BIOSDISKS 16 483 484 struct disklist { 485 int dl_nbiosdisks; /* number of bios disks */ 486 struct biosdisk_info { 487 int bi_dev; /* BIOS device # (0x80 ..) */ 488 int bi_cyl; /* cylinders on disk */ 489 int bi_head; /* heads per track */ 490 int bi_sec; /* sectors per track */ 491 u_int64_t bi_lbasecs; /* total sec. (iff ext13) */ 492 #define BIFLAG_INVALID 0x01 493 #define BIFLAG_EXTINT13 0x02 494 int bi_flags; 495 } dl_biosdisks[MAX_BIOSDISKS]; 496 497 int dl_nnativedisks; /* number of native disks */ 498 struct nativedisk_info { 499 char ni_devname[16]; /* native device name */ 500 int ni_nmatches; /* # of matches w/ BIOS */ 501 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 502 } dl_nativedisks[1]; /* actually longer */ 503 }; 504 #endif /* !_I386_CPU_H_ */ 505
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