cpu.h revision 1.115
1 /* $NetBSD: cpu.h,v 1.115 2004/05/16 12:32:53 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _I386_CPU_H_ 38 #define _I386_CPU_H_ 39 40 #ifdef _KERNEL 41 #if defined(_KERNEL_OPT) 42 #include "opt_multiprocessor.h" 43 #include "opt_math_emulate.h" 44 #include "opt_user_ldt.h" 45 #include "opt_vm86.h" 46 #endif 47 48 /* 49 * Definitions unique to i386 cpu support. 50 */ 51 #include <machine/frame.h> 52 #include <machine/segments.h> 53 #include <machine/tss.h> 54 #include <machine/intrdefs.h> 55 #include <x86/cacheinfo.h> 56 57 #include <sys/device.h> 58 #include <sys/lock.h> /* will also get LOCKDEBUG */ 59 #include <sys/sched.h> 60 61 #include <lib/libkern/libkern.h> /* offsetof */ 62 63 struct intrsource; 64 struct pmap; 65 66 /* 67 * a bunch of this belongs in cpuvar.h; move it later.. 68 */ 69 70 struct cpu_info { 71 struct device *ci_dev; /* pointer to our device */ 72 struct cpu_info *ci_self; /* self-pointer */ 73 void *ci_tlog_base; /* Trap log base */ 74 int32_t ci_tlog_offset; /* Trap log current offset */ 75 struct schedstate_percpu ci_schedstate; /* scheduler state */ 76 struct cpu_info *ci_next; /* next cpu */ 77 78 /* 79 * Public members. 80 */ 81 struct lwp *ci_curlwp; /* current owner of the processor */ 82 struct simplelock ci_slock; /* lock on this data structure */ 83 cpuid_t ci_cpuid; /* our CPU ID */ 84 u_int ci_apicid; /* our APIC ID */ 85 u_long ci_spin_locks; /* # of spin locks held */ 86 u_long ci_simple_locks; /* # of simple locks held */ 87 88 /* 89 * Private members. 90 */ 91 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 92 int ci_fpsaving; /* save in progress */ 93 94 volatile u_int32_t ci_tlb_ipi_mask; 95 96 struct pmap *ci_pmap; /* current pmap */ 97 int ci_want_pmapload; /* pmap_load() is needed */ 98 int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 99 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 100 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 101 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 102 103 struct pcb *ci_curpcb; /* VA of current HW PCB */ 104 struct pcb *ci_idle_pcb; /* VA of current PCB */ 105 int ci_idle_tss_sel; /* TSS selector of idle PCB */ 106 107 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 108 u_int32_t ci_ipending; 109 int ci_ilevel; 110 int ci_idepth; 111 u_int32_t ci_imask[NIPL]; 112 u_int32_t ci_iunmask[NIPL]; 113 114 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */ 115 u_int32_t ci_flags; /* flags; see below */ 116 u_int32_t ci_ipis; /* interprocessor interrupts pending */ 117 int sc_apic_version; /* local APIC version */ 118 119 int32_t ci_cpuid_level; 120 u_int32_t ci_signature; /* X86 cpuid type */ 121 u_int32_t ci_feature_flags;/* X86 %edx CPUID feature bits */ 122 u_int32_t ci_feature2_flags;/* X86 %ecx CPUID feature bits */ 123 u_int32_t ci_cpu_class; /* CPU class */ 124 u_int32_t ci_brand_id; /* Intel brand id */ 125 u_int32_t ci_vendor[4]; /* vendor string */ 126 u_int32_t ci_cpu_serial[3]; /* PIII serial number */ 127 u_int64_t ci_tsc_freq; /* cpu cycles/second */ 128 129 struct cpu_functions *ci_func; /* start/stop functions */ 130 void (*cpu_setup)(struct cpu_info *); 131 /* proc-dependant init */ 132 void (*ci_info)(struct cpu_info *); 133 134 int ci_want_resched; 135 int ci_astpending; 136 struct trapframe *ci_ddb_regs; 137 138 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 139 struct x86_cache_info ci_cinfo[CAI_COUNT]; 140 141 /* 142 * Variables used by cc_microtime(). 143 */ 144 struct timeval ci_cc_time; 145 int64_t ci_cc_cc; 146 int64_t ci_cc_ms_delta; 147 int64_t ci_cc_denom; 148 149 union descriptor *ci_gdt; 150 151 struct i386tss ci_doubleflt_tss; 152 struct i386tss ci_ddbipi_tss; 153 154 char *ci_doubleflt_stack; 155 char *ci_ddbipi_stack; 156 157 struct evcnt ci_ipi_events[X86_NIPI]; 158 }; 159 160 /* 161 * Processor flag notes: The "primary" CPU has certain MI-defined 162 * roles (mostly relating to hardclock handling); we distinguish 163 * betwen the processor which booted us, and the processor currently 164 * holding the "primary" role just to give us the flexibility later to 165 * change primaries should we be sufficiently twisted. 166 */ 167 168 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 169 #define CPUF_AP 0x0002 /* CPU is an AP */ 170 #define CPUF_SP 0x0004 /* CPU is only processor */ 171 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 172 173 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */ 174 175 #define CPUF_PRESENT 0x1000 /* CPU is present */ 176 #define CPUF_RUNNING 0x2000 /* CPU is running */ 177 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 178 #define CPUF_GO 0x8000 /* CPU should start running */ 179 180 /* 181 * We statically allocate the CPU info for the primary CPU (or, 182 * the only CPU on uniprocessors), and the primary CPU is the 183 * first CPU on the CPU info list. 184 */ 185 extern struct cpu_info cpu_info_primary; 186 extern struct cpu_info *cpu_info_list; 187 188 #define CPU_INFO_ITERATOR int 189 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 190 ci != NULL; ci = ci->ci_next 191 192 #if defined(MULTIPROCESSOR) 193 194 #define X86_MAXPROCS 32 /* because we use a bitmask */ 195 196 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 197 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 198 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 199 200 static struct cpu_info *curcpu(void); 201 202 __inline static struct cpu_info * __attribute__((__unused__)) 203 curcpu() 204 { 205 struct cpu_info *ci; 206 207 __asm __volatile("movl %%fs:%1, %0" : 208 "=r" (ci) : 209 "m" 210 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); 211 return ci; 212 } 213 214 #define cpu_number() (curcpu()->ci_cpuid) 215 216 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 217 218 #define aston(p) ((p)->p_md.md_astpending = 1) 219 220 extern struct cpu_info *cpu_info[X86_MAXPROCS]; 221 222 void cpu_boot_secondary_processors(void); 223 void cpu_init_idle_pcbs(void); 224 225 /* 226 * Preempt the current process if in interrupt from user mode, 227 * or after the current trap/syscall if in system mode. 228 */ 229 extern void need_resched(struct cpu_info *); 230 231 #else /* !MULTIPROCESSOR */ 232 233 #define X86_MAXPROCS 1 234 #define curcpu() (&cpu_info_primary) 235 236 /* 237 * definitions of cpu-dependent requirements 238 * referenced in generic code 239 */ 240 #define cpu_number() 0 241 #define CPU_IS_PRIMARY(ci) 1 242 243 /* 244 * Preempt the current process if in interrupt from user mode, 245 * or after the current trap/syscall if in system mode. 246 */ 247 #define need_resched(ci) \ 248 do { \ 249 struct cpu_info *__ci = (ci); \ 250 __ci->ci_want_resched = 1; \ 251 if (__ci->ci_curlwp != NULL) \ 252 aston(__ci->ci_curlwp->l_proc); \ 253 } while (/*CONSTCOND*/0) 254 255 #define aston(p) ((p)->p_md.md_astpending = 1) 256 257 #endif /* MULTIPROCESSOR */ 258 259 extern u_int32_t cpus_attached; 260 261 #define curpcb curcpu()->ci_curpcb 262 #define curlwp curcpu()->ci_curlwp 263 264 /* 265 * Arguments to hardclock, softclock and statclock 266 * encapsulate the previous machine state in an opaque 267 * clockframe; for now, use generic intrframe. 268 * 269 * Note: Since spllowersoftclock() does not actually unmask the currently 270 * running (hardclock) interrupt, CLKF_BASEPRI() *must* always be 0; otherwise 271 * we could stall hardclock ticks if another interrupt takes too long. 272 */ 273 #define clockframe intrframe 274 275 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_eflags) 276 #define CLKF_BASEPRI(frame) (0) 277 #define CLKF_PC(frame) ((frame)->if_eip) 278 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1) 279 280 /* 281 * This is used during profiling to integrate system time. It can safely 282 * assume that the process is resident. 283 */ 284 #define LWP_PC(l) ((l)->l_md.md_regs->tf_eip) 285 286 /* 287 * Give a profiling tick to the current process when the user profiling 288 * buffer pages are invalid. On the i386, request an ast to send us 289 * through trap(), marking the proc as needing a profiling tick. 290 */ 291 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, aston(p)) 292 293 /* 294 * Notify the current process (p) that it has a signal pending, 295 * process as soon as possible. 296 */ 297 #define signotify(p) aston(p) 298 299 /* 300 * We need a machine-independent name for this. 301 */ 302 extern void (*delay_func)(int); 303 struct timeval; 304 extern void (*microtime_func)(struct timeval *); 305 306 #define DELAY(x) (*delay_func)(x) 307 #define delay(x) (*delay_func)(x) 308 #define microtime(tv) (*microtime_func)(tv) 309 310 /* 311 * pull in #defines for kinds of processors 312 */ 313 #include <machine/cputypes.h> 314 315 struct cpu_nocpuid_nameclass { 316 int cpu_vendor; 317 const char *cpu_vendorname; 318 const char *cpu_name; 319 int cpu_class; 320 void (*cpu_setup)(struct cpu_info *); 321 void (*cpu_cacheinfo)(struct cpu_info *); 322 void (*cpu_info)(struct cpu_info *); 323 }; 324 325 326 struct cpu_cpuid_nameclass { 327 const char *cpu_id; 328 int cpu_vendor; 329 const char *cpu_vendorname; 330 struct cpu_cpuid_family { 331 int cpu_class; 332 const char *cpu_models[CPU_MAXMODEL+2]; 333 void (*cpu_setup)(struct cpu_info *); 334 void (*cpu_probe)(struct cpu_info *); 335 void (*cpu_info)(struct cpu_info *); 336 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1]; 337 }; 338 339 extern int biosbasemem; 340 extern int biosextmem; 341 extern unsigned int cpu_feature; 342 extern unsigned int cpu_feature2; 343 extern int cpu; 344 extern int cpu_class; 345 extern char cpu_brand_string[]; 346 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[]; 347 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[]; 348 349 extern int i386_use_fxsave; 350 extern int i386_has_sse; 351 extern int i386_has_sse2; 352 353 /* machdep.c */ 354 void dumpconf(void); 355 int cpu_maxproc(void); 356 void cpu_reset(void); 357 void i386_init_pcb_tss_ldt(struct cpu_info *); 358 void i386_proc0_tss_ldt_init(void); 359 360 /* identcpu.c */ 361 extern int tmx86_has_longrun; 362 extern u_int crusoe_longrun; 363 extern u_int crusoe_frequency; 364 extern u_int crusoe_voltage; 365 extern u_int crusoe_percentage; 366 extern u_int tmx86_set_longrun_mode(u_int); 367 void tmx86_get_longrun_status_all(void); 368 u_int tmx86_get_longrun_mode(void); 369 void identifycpu(struct cpu_info *); 370 371 /* vm_machdep.c */ 372 void cpu_proc_fork(struct proc *, struct proc *); 373 374 /* locore.s */ 375 struct region_descriptor; 376 void lgdt(struct region_descriptor *); 377 void fillw(short, void *, size_t); 378 379 struct pcb; 380 void savectx(struct pcb *); 381 void proc_trampoline(void); 382 383 /* clock.c */ 384 void initrtclock(void); 385 void startrtclock(void); 386 void i8254_delay(int); 387 void i8254_microtime(struct timeval *); 388 void i8254_initclocks(void); 389 390 /* kern_microtime.c */ 391 392 extern struct timeval cc_microset_time; 393 void cc_microtime(struct timeval *); 394 void cc_microset(struct cpu_info *); 395 396 /* cpu.c */ 397 398 void cpu_probe_features(struct cpu_info *); 399 400 /* npx.c */ 401 void npxsave_lwp(struct lwp *, int); 402 void npxsave_cpu(struct cpu_info *, int); 403 404 /* vm_machdep.c */ 405 int kvtop(caddr_t); 406 407 #ifdef MATH_EMULATE 408 /* math_emulate.c */ 409 int math_emulate(struct trapframe *, ksiginfo_t *); 410 #endif 411 412 #ifdef USER_LDT 413 /* sys_machdep.h */ 414 int i386_get_ldt(struct lwp *, void *, register_t *); 415 int i386_set_ldt(struct lwp *, void *, register_t *); 416 #endif 417 418 /* isa_machdep.c */ 419 void isa_defaultirq(void); 420 int isa_nmi(void); 421 422 #ifdef VM86 423 /* vm86.c */ 424 void vm86_gpfault(struct lwp *, int); 425 #endif /* VM86 */ 426 427 /* consinit.c */ 428 void kgdb_port_init(void); 429 430 /* bus_machdep.c */ 431 void x86_bus_space_init(void); 432 void x86_bus_space_mallocok(void); 433 434 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 435 436 /* est.c */ 437 void est_init(struct cpu_info *); 438 439 #endif /* _KERNEL */ 440 441 /* 442 * CTL_MACHDEP definitions. 443 */ 444 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 445 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 446 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 447 #define CPU_NKPDE 4 /* int: number of kernel PDEs */ 448 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 449 #define CPU_DISKINFO 6 /* struct disklist *: 450 * disk geometry information */ 451 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 452 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 453 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 454 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 455 #define CPU_TMLR_MODE 11 /* int: longrun mode 456 * 0: minimum frequency 457 * 1: economy 458 * 2: performance 459 * 3: maximum frequency 460 */ 461 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 462 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 463 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 464 #define CPU_MAXID 15 /* number of valid machdep ids */ 465 466 #define CTL_MACHDEP_NAMES { \ 467 { 0, 0 }, \ 468 { "console_device", CTLTYPE_STRUCT }, \ 469 { "biosbasemem", CTLTYPE_INT }, \ 470 { "biosextmem", CTLTYPE_INT }, \ 471 { "nkpde", CTLTYPE_INT }, \ 472 { "booted_kernel", CTLTYPE_STRING }, \ 473 { "diskinfo", CTLTYPE_STRUCT }, \ 474 { "fpu_present", CTLTYPE_INT }, \ 475 { "osfxsr", CTLTYPE_INT }, \ 476 { "sse", CTLTYPE_INT }, \ 477 { "sse2", CTLTYPE_INT }, \ 478 { "tm_longrun_mode", CTLTYPE_INT }, \ 479 { "tm_longrun_frequency", CTLTYPE_INT }, \ 480 { "tm_longrun_voltage", CTLTYPE_INT }, \ 481 { "tm_longrun_percentage", CTLTYPE_INT }, \ 482 } 483 484 /* 485 * Structure for CPU_DISKINFO sysctl call. 486 * XXX this should be somewhere else. 487 */ 488 #define MAX_BIOSDISKS 16 489 490 struct disklist { 491 int dl_nbiosdisks; /* number of bios disks */ 492 struct biosdisk_info { 493 int bi_dev; /* BIOS device # (0x80 ..) */ 494 int bi_cyl; /* cylinders on disk */ 495 int bi_head; /* heads per track */ 496 int bi_sec; /* sectors per track */ 497 u_int64_t bi_lbasecs; /* total sec. (iff ext13) */ 498 #define BIFLAG_INVALID 0x01 499 #define BIFLAG_EXTINT13 0x02 500 int bi_flags; 501 } dl_biosdisks[MAX_BIOSDISKS]; 502 503 int dl_nnativedisks; /* number of native disks */ 504 struct nativedisk_info { 505 char ni_devname[16]; /* native device name */ 506 int ni_nmatches; /* # of matches w/ BIOS */ 507 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 508 } dl_nativedisks[1]; /* actually longer */ 509 }; 510 #endif /* !_I386_CPU_H_ */ 511
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