cpu.h revision 1.116 1 /* $NetBSD: cpu.h,v 1.116 2004/09/22 11:32:02 yamt Exp $ */
2
3 /*-
4 * Copyright (c) 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91
35 */
36
37 #ifndef _I386_CPU_H_
38 #define _I386_CPU_H_
39
40 #ifdef _KERNEL
41 #if defined(_KERNEL_OPT)
42 #include "opt_multiprocessor.h"
43 #include "opt_math_emulate.h"
44 #include "opt_user_ldt.h"
45 #include "opt_vm86.h"
46 #endif
47
48 /*
49 * Definitions unique to i386 cpu support.
50 */
51 #include <machine/frame.h>
52 #include <machine/segments.h>
53 #include <machine/tss.h>
54 #include <machine/intrdefs.h>
55 #include <x86/cacheinfo.h>
56
57 #include <sys/device.h>
58 #include <sys/lock.h> /* will also get LOCKDEBUG */
59 #include <sys/cpu_data.h>
60 #include <sys/cc_microtime.h>
61
62 #include <lib/libkern/libkern.h> /* offsetof */
63
64 struct intrsource;
65 struct pmap;
66
67 /*
68 * a bunch of this belongs in cpuvar.h; move it later..
69 */
70
71 struct cpu_info {
72 struct device *ci_dev; /* pointer to our device */
73 struct cpu_info *ci_self; /* self-pointer */
74 void *ci_tlog_base; /* Trap log base */
75 int32_t ci_tlog_offset; /* Trap log current offset */
76 struct cpu_info *ci_next; /* next cpu */
77
78 /*
79 * Public members.
80 */
81 struct lwp *ci_curlwp; /* current owner of the processor */
82 struct simplelock ci_slock; /* lock on this data structure */
83 cpuid_t ci_cpuid; /* our CPU ID */
84 u_int ci_apicid; /* our APIC ID */
85 struct cpu_data ci_data; /* MI per-cpu data */
86 struct cc_microtime_state ci_cc;/* cc_microtime state */
87
88 /*
89 * Private members.
90 */
91 struct lwp *ci_fpcurlwp; /* current owner of the FPU */
92 int ci_fpsaving; /* save in progress */
93
94 volatile u_int32_t ci_tlb_ipi_mask;
95
96 struct pmap *ci_pmap; /* current pmap */
97 int ci_want_pmapload; /* pmap_load() is needed */
98 int ci_tlbstate; /* one of TLBSTATE_ states. see below */
99 #define TLBSTATE_VALID 0 /* all user tlbs are valid */
100 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */
101 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */
102
103 struct pcb *ci_curpcb; /* VA of current HW PCB */
104 struct pcb *ci_idle_pcb; /* VA of current PCB */
105 int ci_idle_tss_sel; /* TSS selector of idle PCB */
106
107 struct intrsource *ci_isources[MAX_INTR_SOURCES];
108 u_int32_t ci_ipending;
109 int ci_ilevel;
110 int ci_idepth;
111 u_int32_t ci_imask[NIPL];
112 u_int32_t ci_iunmask[NIPL];
113
114 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */
115 u_int32_t ci_flags; /* flags; see below */
116 u_int32_t ci_ipis; /* interprocessor interrupts pending */
117 int sc_apic_version; /* local APIC version */
118
119 int32_t ci_cpuid_level;
120 u_int32_t ci_signature; /* X86 cpuid type */
121 u_int32_t ci_feature_flags;/* X86 %edx CPUID feature bits */
122 u_int32_t ci_feature2_flags;/* X86 %ecx CPUID feature bits */
123 u_int32_t ci_cpu_class; /* CPU class */
124 u_int32_t ci_brand_id; /* Intel brand id */
125 u_int32_t ci_vendor[4]; /* vendor string */
126 u_int32_t ci_cpu_serial[3]; /* PIII serial number */
127 u_int64_t ci_tsc_freq; /* cpu cycles/second */
128
129 struct cpu_functions *ci_func; /* start/stop functions */
130 void (*cpu_setup)(struct cpu_info *);
131 /* proc-dependant init */
132 void (*ci_info)(struct cpu_info *);
133
134 int ci_want_resched;
135 int ci_astpending;
136 struct trapframe *ci_ddb_regs;
137
138 u_int ci_cflush_lsize; /* CFLUSH insn line size */
139 struct x86_cache_info ci_cinfo[CAI_COUNT];
140
141 union descriptor *ci_gdt;
142
143 struct i386tss ci_doubleflt_tss;
144 struct i386tss ci_ddbipi_tss;
145
146 char *ci_doubleflt_stack;
147 char *ci_ddbipi_stack;
148
149 struct evcnt ci_ipi_events[X86_NIPI];
150 };
151
152 /*
153 * Processor flag notes: The "primary" CPU has certain MI-defined
154 * roles (mostly relating to hardclock handling); we distinguish
155 * betwen the processor which booted us, and the processor currently
156 * holding the "primary" role just to give us the flexibility later to
157 * change primaries should we be sufficiently twisted.
158 */
159
160 #define CPUF_BSP 0x0001 /* CPU is the original BSP */
161 #define CPUF_AP 0x0002 /* CPU is an AP */
162 #define CPUF_SP 0x0004 /* CPU is only processor */
163 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */
164
165 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */
166
167 #define CPUF_PRESENT 0x1000 /* CPU is present */
168 #define CPUF_RUNNING 0x2000 /* CPU is running */
169 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */
170 #define CPUF_GO 0x8000 /* CPU should start running */
171
172 /*
173 * We statically allocate the CPU info for the primary CPU (or,
174 * the only CPU on uniprocessors), and the primary CPU is the
175 * first CPU on the CPU info list.
176 */
177 extern struct cpu_info cpu_info_primary;
178 extern struct cpu_info *cpu_info_list;
179
180 #define CPU_INFO_ITERATOR int
181 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \
182 ci != NULL; ci = ci->ci_next
183
184 #if defined(MULTIPROCESSOR)
185
186 #define X86_MAXPROCS 32 /* because we use a bitmask */
187
188 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci))
189 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci))
190 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci))
191
192 static struct cpu_info *curcpu(void);
193
194 __inline static struct cpu_info * __attribute__((__unused__))
195 curcpu()
196 {
197 struct cpu_info *ci;
198
199 __asm __volatile("movl %%fs:%1, %0" :
200 "=r" (ci) :
201 "m"
202 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self)));
203 return ci;
204 }
205
206 #define cpu_number() (curcpu()->ci_cpuid)
207
208 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY)
209
210 #define aston(p) ((p)->p_md.md_astpending = 1)
211
212 extern struct cpu_info *cpu_info[X86_MAXPROCS];
213
214 void cpu_boot_secondary_processors(void);
215 void cpu_init_idle_pcbs(void);
216
217 /*
218 * Preempt the current process if in interrupt from user mode,
219 * or after the current trap/syscall if in system mode.
220 */
221 extern void need_resched(struct cpu_info *);
222
223 #else /* !MULTIPROCESSOR */
224
225 #define X86_MAXPROCS 1
226 #define curcpu() (&cpu_info_primary)
227
228 /*
229 * definitions of cpu-dependent requirements
230 * referenced in generic code
231 */
232 #define cpu_number() 0
233 #define CPU_IS_PRIMARY(ci) 1
234
235 /*
236 * Preempt the current process if in interrupt from user mode,
237 * or after the current trap/syscall if in system mode.
238 */
239 #define need_resched(ci) \
240 do { \
241 struct cpu_info *__ci = (ci); \
242 __ci->ci_want_resched = 1; \
243 if (__ci->ci_curlwp != NULL) \
244 aston(__ci->ci_curlwp->l_proc); \
245 } while (/*CONSTCOND*/0)
246
247 #define aston(p) ((p)->p_md.md_astpending = 1)
248
249 #endif /* MULTIPROCESSOR */
250
251 extern u_int32_t cpus_attached;
252
253 #define curpcb curcpu()->ci_curpcb
254 #define curlwp curcpu()->ci_curlwp
255
256 /*
257 * Arguments to hardclock, softclock and statclock
258 * encapsulate the previous machine state in an opaque
259 * clockframe; for now, use generic intrframe.
260 *
261 * Note: Since spllowersoftclock() does not actually unmask the currently
262 * running (hardclock) interrupt, CLKF_BASEPRI() *must* always be 0; otherwise
263 * we could stall hardclock ticks if another interrupt takes too long.
264 */
265 #define clockframe intrframe
266
267 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_eflags)
268 #define CLKF_BASEPRI(frame) (0)
269 #define CLKF_PC(frame) ((frame)->if_eip)
270 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1)
271
272 /*
273 * This is used during profiling to integrate system time. It can safely
274 * assume that the process is resident.
275 */
276 #define LWP_PC(l) ((l)->l_md.md_regs->tf_eip)
277
278 /*
279 * Give a profiling tick to the current process when the user profiling
280 * buffer pages are invalid. On the i386, request an ast to send us
281 * through trap(), marking the proc as needing a profiling tick.
282 */
283 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, aston(p))
284
285 /*
286 * Notify the current process (p) that it has a signal pending,
287 * process as soon as possible.
288 */
289 #define signotify(p) aston(p)
290
291 /*
292 * We need a machine-independent name for this.
293 */
294 extern void (*delay_func)(int);
295 struct timeval;
296 extern void (*microtime_func)(struct timeval *);
297
298 #define DELAY(x) (*delay_func)(x)
299 #define delay(x) (*delay_func)(x)
300 #define microtime(tv) (*microtime_func)(tv)
301
302 /*
303 * pull in #defines for kinds of processors
304 */
305 #include <machine/cputypes.h>
306
307 struct cpu_nocpuid_nameclass {
308 int cpu_vendor;
309 const char *cpu_vendorname;
310 const char *cpu_name;
311 int cpu_class;
312 void (*cpu_setup)(struct cpu_info *);
313 void (*cpu_cacheinfo)(struct cpu_info *);
314 void (*cpu_info)(struct cpu_info *);
315 };
316
317
318 struct cpu_cpuid_nameclass {
319 const char *cpu_id;
320 int cpu_vendor;
321 const char *cpu_vendorname;
322 struct cpu_cpuid_family {
323 int cpu_class;
324 const char *cpu_models[CPU_MAXMODEL+2];
325 void (*cpu_setup)(struct cpu_info *);
326 void (*cpu_probe)(struct cpu_info *);
327 void (*cpu_info)(struct cpu_info *);
328 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1];
329 };
330
331 extern int biosbasemem;
332 extern int biosextmem;
333 extern unsigned int cpu_feature;
334 extern unsigned int cpu_feature2;
335 extern int cpu;
336 extern int cpu_class;
337 extern char cpu_brand_string[];
338 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[];
339 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[];
340
341 extern int i386_use_fxsave;
342 extern int i386_has_sse;
343 extern int i386_has_sse2;
344
345 /* machdep.c */
346 void dumpconf(void);
347 int cpu_maxproc(void);
348 void cpu_reset(void);
349 void i386_init_pcb_tss_ldt(struct cpu_info *);
350 void i386_proc0_tss_ldt_init(void);
351
352 /* identcpu.c */
353 extern int tmx86_has_longrun;
354 extern u_int crusoe_longrun;
355 extern u_int crusoe_frequency;
356 extern u_int crusoe_voltage;
357 extern u_int crusoe_percentage;
358 extern u_int tmx86_set_longrun_mode(u_int);
359 void tmx86_get_longrun_status_all(void);
360 u_int tmx86_get_longrun_mode(void);
361 void identifycpu(struct cpu_info *);
362
363 /* vm_machdep.c */
364 void cpu_proc_fork(struct proc *, struct proc *);
365
366 /* locore.s */
367 struct region_descriptor;
368 void lgdt(struct region_descriptor *);
369 void fillw(short, void *, size_t);
370
371 struct pcb;
372 void savectx(struct pcb *);
373 void proc_trampoline(void);
374
375 /* clock.c */
376 void initrtclock(void);
377 void startrtclock(void);
378 void i8254_delay(int);
379 void i8254_microtime(struct timeval *);
380 void i8254_initclocks(void);
381
382 /* cpu.c */
383
384 void cpu_probe_features(struct cpu_info *);
385
386 /* npx.c */
387 void npxsave_lwp(struct lwp *, int);
388 void npxsave_cpu(struct cpu_info *, int);
389
390 /* vm_machdep.c */
391 int kvtop(caddr_t);
392
393 #ifdef MATH_EMULATE
394 /* math_emulate.c */
395 int math_emulate(struct trapframe *, ksiginfo_t *);
396 #endif
397
398 #ifdef USER_LDT
399 /* sys_machdep.h */
400 int i386_get_ldt(struct lwp *, void *, register_t *);
401 int i386_set_ldt(struct lwp *, void *, register_t *);
402 #endif
403
404 /* isa_machdep.c */
405 void isa_defaultirq(void);
406 int isa_nmi(void);
407
408 #ifdef VM86
409 /* vm86.c */
410 void vm86_gpfault(struct lwp *, int);
411 #endif /* VM86 */
412
413 /* consinit.c */
414 void kgdb_port_init(void);
415
416 /* bus_machdep.c */
417 void x86_bus_space_init(void);
418 void x86_bus_space_mallocok(void);
419
420 #include <machine/psl.h> /* Must be after struct cpu_info declaration */
421
422 /* est.c */
423 void est_init(struct cpu_info *);
424
425 #endif /* _KERNEL */
426
427 /*
428 * CTL_MACHDEP definitions.
429 */
430 #define CPU_CONSDEV 1 /* dev_t: console terminal device */
431 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */
432 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */
433 #define CPU_NKPDE 4 /* int: number of kernel PDEs */
434 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */
435 #define CPU_DISKINFO 6 /* struct disklist *:
436 * disk geometry information */
437 #define CPU_FPU_PRESENT 7 /* int: FPU is present */
438 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */
439 #define CPU_SSE 9 /* int: OS/CPU supports SSE */
440 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */
441 #define CPU_TMLR_MODE 11 /* int: longrun mode
442 * 0: minimum frequency
443 * 1: economy
444 * 2: performance
445 * 3: maximum frequency
446 */
447 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */
448 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */
449 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */
450 #define CPU_MAXID 15 /* number of valid machdep ids */
451
452 #define CTL_MACHDEP_NAMES { \
453 { 0, 0 }, \
454 { "console_device", CTLTYPE_STRUCT }, \
455 { "biosbasemem", CTLTYPE_INT }, \
456 { "biosextmem", CTLTYPE_INT }, \
457 { "nkpde", CTLTYPE_INT }, \
458 { "booted_kernel", CTLTYPE_STRING }, \
459 { "diskinfo", CTLTYPE_STRUCT }, \
460 { "fpu_present", CTLTYPE_INT }, \
461 { "osfxsr", CTLTYPE_INT }, \
462 { "sse", CTLTYPE_INT }, \
463 { "sse2", CTLTYPE_INT }, \
464 { "tm_longrun_mode", CTLTYPE_INT }, \
465 { "tm_longrun_frequency", CTLTYPE_INT }, \
466 { "tm_longrun_voltage", CTLTYPE_INT }, \
467 { "tm_longrun_percentage", CTLTYPE_INT }, \
468 }
469
470 /*
471 * Structure for CPU_DISKINFO sysctl call.
472 * XXX this should be somewhere else.
473 */
474 #define MAX_BIOSDISKS 16
475
476 struct disklist {
477 int dl_nbiosdisks; /* number of bios disks */
478 struct biosdisk_info {
479 int bi_dev; /* BIOS device # (0x80 ..) */
480 int bi_cyl; /* cylinders on disk */
481 int bi_head; /* heads per track */
482 int bi_sec; /* sectors per track */
483 u_int64_t bi_lbasecs; /* total sec. (iff ext13) */
484 #define BIFLAG_INVALID 0x01
485 #define BIFLAG_EXTINT13 0x02
486 int bi_flags;
487 } dl_biosdisks[MAX_BIOSDISKS];
488
489 int dl_nnativedisks; /* number of native disks */
490 struct nativedisk_info {
491 char ni_devname[16]; /* native device name */
492 int ni_nmatches; /* # of matches w/ BIOS */
493 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
494 } dl_nativedisks[1]; /* actually longer */
495 };
496 #endif /* !_I386_CPU_H_ */
497