cpu.h revision 1.144
1 /* $NetBSD: cpu.h,v 1.144 2007/08/29 23:38:04 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _I386_CPU_H_ 38 #define _I386_CPU_H_ 39 40 #ifdef _KERNEL 41 #if defined(_KERNEL_OPT) 42 #include "opt_multiprocessor.h" 43 #include "opt_math_emulate.h" 44 #include "opt_user_ldt.h" 45 #include "opt_vm86.h" 46 #endif 47 48 /* 49 * Definitions unique to i386 cpu support. 50 */ 51 #include <machine/frame.h> 52 #include <machine/segments.h> 53 #include <machine/tss.h> 54 #include <machine/intrdefs.h> 55 #include <x86/cacheinfo.h> 56 #include <x86/via_padlock.h> 57 58 #include <sys/device.h> 59 #include <sys/cpu_data.h> 60 #include <sys/cc_microtime.h> 61 62 #include <lib/libkern/libkern.h> /* offsetof */ 63 64 struct intrsource; 65 struct pmap; 66 67 /* 68 * a bunch of this belongs in cpuvar.h; move it later.. 69 */ 70 71 struct cpu_info { 72 struct device *ci_dev; /* pointer to our device */ 73 struct cpu_info *ci_self; /* self-pointer */ 74 void *ci_tlog_base; /* Trap log base */ 75 int32_t ci_tlog_offset; /* Trap log current offset */ 76 77 /* 78 * Will be accessed by other CPUs. 79 */ 80 struct cpu_info *ci_next; /* next cpu */ 81 struct lwp *ci_curlwp; /* current owner of the processor */ 82 struct pmap_cpu *ci_pmap_cpu; /* per-CPU pmap data */ 83 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 84 int ci_fpsaving; /* save in progress */ 85 cpuid_t ci_cpuid; /* our CPU ID */ 86 int ci_cpumask; /* (1 << CPU ID) */ 87 u_int ci_apicid; /* our APIC ID */ 88 struct cpu_data ci_data; /* MI per-cpu data */ 89 struct cc_microtime_state ci_cc;/* cc_microtime state */ 90 91 /* 92 * Private members. 93 */ 94 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 95 struct pmap *ci_pmap; /* current pmap */ 96 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 97 int ci_want_pmapload; /* pmap_load() is needed */ 98 int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 99 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 100 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 101 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 102 103 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 104 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 105 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 106 107 /* The following must be aligned for cmpxchg8b. */ 108 struct { 109 uint32_t ipending; 110 int ilevel; 111 } ci_istate __aligned(8); 112 #define ci_ipending ci_istate.ipending 113 #define ci_ilevel ci_istate.ilevel 114 115 int ci_idepth; 116 void * ci_intrstack; 117 uint32_t ci_imask[NIPL]; 118 uint32_t ci_iunmask[NIPL]; 119 120 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */ 121 uint32_t ci_flags; /* flags; see below */ 122 uint32_t ci_ipis; /* interprocessor interrupts pending */ 123 int sc_apic_version; /* local APIC version */ 124 125 int32_t ci_cpuid_level; 126 uint32_t ci_signature; /* X86 cpuid type */ 127 uint32_t ci_feature_flags;/* X86 %edx CPUID feature bits */ 128 uint32_t ci_feature2_flags;/* X86 %ecx CPUID feature bits */ 129 uint32_t ci_feature3_flags;/* X86 extended feature bits */ 130 uint32_t ci_padlock_flags;/* VIA PadLock feature bits */ 131 uint32_t ci_cpu_class; /* CPU class */ 132 uint32_t ci_brand_id; /* Intel brand id */ 133 uint32_t ci_vendor[4]; /* vendor string */ 134 uint32_t ci_cpu_serial[3]; /* PIII serial number */ 135 uint64_t ci_tsc_freq; /* cpu cycles/second */ 136 137 const struct cpu_functions *ci_func; /* start/stop functions */ 138 void (*cpu_setup)(struct cpu_info *); 139 /* proc-dependant init */ 140 void (*ci_info)(struct cpu_info *); 141 142 int ci_want_resched; 143 int ci_astpending; 144 struct trapframe *ci_ddb_regs; 145 146 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 147 struct x86_cache_info ci_cinfo[CAI_COUNT]; 148 149 union descriptor *ci_gdt; 150 151 struct i386tss ci_doubleflt_tss; 152 struct i386tss ci_ddbipi_tss; 153 154 char *ci_doubleflt_stack; 155 char *ci_ddbipi_stack; 156 157 struct evcnt ci_ipi_events[X86_NIPI]; 158 159 struct via_padlock ci_vp; /* VIA PadLock private storage */ 160 }; 161 162 /* 163 * Processor flag notes: The "primary" CPU has certain MI-defined 164 * roles (mostly relating to hardclock handling); we distinguish 165 * betwen the processor which booted us, and the processor currently 166 * holding the "primary" role just to give us the flexibility later to 167 * change primaries should we be sufficiently twisted. 168 */ 169 170 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 171 #define CPUF_AP 0x0002 /* CPU is an AP */ 172 #define CPUF_SP 0x0004 /* CPU is only processor */ 173 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 174 175 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */ 176 177 #define CPUF_PRESENT 0x1000 /* CPU is present */ 178 #define CPUF_RUNNING 0x2000 /* CPU is running */ 179 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 180 #define CPUF_GO 0x8000 /* CPU should start running */ 181 182 /* 183 * We statically allocate the CPU info for the primary CPU (or, 184 * the only CPU on uniprocessors), and the primary CPU is the 185 * first CPU on the CPU info list. 186 */ 187 extern struct cpu_info cpu_info_primary; 188 extern struct cpu_info *cpu_info_list; 189 190 #define CPU_INFO_ITERATOR int 191 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 192 ci != NULL; ci = ci->ci_next 193 194 #if defined(MULTIPROCESSOR) 195 196 #define X86_MAXPROCS 32 /* because we use a bitmask */ 197 198 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 199 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 200 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 201 202 static struct cpu_info *curcpu(void); 203 204 __inline static struct cpu_info * __attribute__((__unused__)) 205 curcpu() 206 { 207 struct cpu_info *ci; 208 209 __asm volatile("movl %%fs:%1, %0" : 210 "=r" (ci) : 211 "m" 212 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); 213 return ci; 214 } 215 216 #define cpu_number() (curcpu()->ci_cpuid) 217 218 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 219 220 #define aston(l) ((l)->l_md.md_astpending = 1) 221 222 extern struct cpu_info *cpu_info[X86_MAXPROCS]; 223 224 void cpu_boot_secondary_processors(void); 225 void cpu_init_idle_lwps(void); 226 227 #else /* !MULTIPROCESSOR */ 228 229 #define X86_MAXPROCS 1 230 #define curcpu() (&cpu_info_primary) 231 232 /* 233 * definitions of cpu-dependent requirements 234 * referenced in generic code 235 */ 236 #define cpu_number() 0 237 #define CPU_IS_PRIMARY(ci) 1 238 239 #define aston(l) ((l)->l_md.md_astpending = 1) 240 241 #endif /* MULTIPROCESSOR */ 242 243 extern uint32_t cpus_attached; 244 245 #define curlwp curcpu()->ci_curlwp 246 #define curpcb (&curlwp->l_addr->u_pcb) 247 248 /* 249 * Arguments to hardclock, softclock and statclock 250 * encapsulate the previous machine state in an opaque 251 * clockframe; for now, use generic intrframe. 252 */ 253 struct clockframe { 254 struct intrframe cf_if; 255 }; 256 257 #define CLKF_USERMODE(frame) USERMODE((frame)->cf_if.if_cs, (frame)->cf_if.if_eflags) 258 #define CLKF_PC(frame) ((frame)->cf_if.if_eip) 259 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 0) 260 261 /* 262 * This is used during profiling to integrate system time. It can safely 263 * assume that the process is resident. 264 */ 265 #define LWP_PC(l) ((l)->l_md.md_regs->tf_eip) 266 267 /* 268 * Give a profiling tick to the current process when the user profiling 269 * buffer pages are invalid. On the i386, request an ast to send us 270 * through trap(), marking the proc as needing a profiling tick. 271 */ 272 extern void cpu_need_proftick(struct lwp *l); 273 274 /* 275 * Notify the LWP l that it has a signal pending, process as soon as 276 * possible. 277 */ 278 extern void cpu_signotify(struct lwp *); 279 280 /* 281 * We need a machine-independent name for this. 282 */ 283 extern void (*delay_func)(int); 284 struct timeval; 285 286 #define DELAY(x) (*delay_func)(x) 287 #define delay(x) (*delay_func)(x) 288 289 /* 290 * pull in #defines for kinds of processors 291 */ 292 #include <machine/cputypes.h> 293 294 struct cpu_nocpuid_nameclass { 295 int cpu_vendor; 296 const char *cpu_vendorname; 297 const char *cpu_name; 298 int cpu_class; 299 void (*cpu_setup)(struct cpu_info *); 300 void (*cpu_cacheinfo)(struct cpu_info *); 301 void (*cpu_info)(struct cpu_info *); 302 }; 303 304 305 struct cpu_cpuid_nameclass { 306 const char *cpu_id; 307 int cpu_vendor; 308 const char *cpu_vendorname; 309 struct cpu_cpuid_family { 310 int cpu_class; 311 const char *cpu_models[CPU_MAXMODEL+2]; 312 void (*cpu_setup)(struct cpu_info *); 313 void (*cpu_probe)(struct cpu_info *); 314 void (*cpu_info)(struct cpu_info *); 315 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1]; 316 }; 317 318 extern int biosbasemem; 319 extern int biosextmem; 320 extern unsigned int cpu_feature; 321 extern unsigned int cpu_feature2; 322 extern unsigned int cpu_feature_padlock; 323 extern int cpu; 324 extern int cpu_class; 325 extern char cpu_brand_string[]; 326 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[]; 327 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[]; 328 329 extern int i386_use_fxsave; 330 extern int i386_has_sse; 331 extern int i386_has_sse2; 332 333 /* machdep.c */ 334 void dumpconf(void); 335 int cpu_maxproc(void); 336 void cpu_reset(void); 337 void i386_proc0_tss_ldt_init(void); 338 339 extern int tmx86_has_longrun; 340 extern u_int crusoe_longrun; 341 extern u_int crusoe_frequency; 342 extern u_int crusoe_voltage; 343 extern u_int crusoe_percentage; 344 extern u_int tmx86_set_longrun_mode(u_int); 345 void tmx86_get_longrun_status_all(void); 346 u_int tmx86_get_longrun_mode(void); 347 void identifycpu(struct cpu_info *); 348 349 /* vm_machdep.c */ 350 void cpu_proc_fork(struct proc *, struct proc *); 351 352 /* locore.s */ 353 struct region_descriptor; 354 void lgdt(struct region_descriptor *); 355 void fillw(short, void *, size_t); 356 357 struct pcb; 358 void savectx(struct pcb *); 359 void lwp_trampoline(void); 360 361 /* clock.c */ 362 void initrtclock(u_long); 363 void startrtclock(void); 364 void i8254_delay(int); 365 void i8254_microtime(struct timeval *); 366 void i8254_initclocks(void); 367 368 /* cpu.c */ 369 370 void cpu_probe_features(struct cpu_info *); 371 372 /* npx.c */ 373 void npxsave_lwp(struct lwp *, int); 374 void npxsave_cpu(struct cpu_info *, int); 375 376 /* vm_machdep.c */ 377 int kvtop(void *); 378 379 #ifdef MATH_EMULATE 380 /* math_emulate.c */ 381 int math_emulate(struct trapframe *, ksiginfo_t *); 382 #endif 383 384 #ifdef USER_LDT 385 /* sys_machdep.h */ 386 int x86_get_ldt(struct lwp *, void *, register_t *); 387 int x86_set_ldt(struct lwp *, void *, register_t *); 388 #endif 389 390 /* isa_machdep.c */ 391 void isa_defaultirq(void); 392 int isa_nmi(void); 393 394 #ifdef VM86 395 /* vm86.c */ 396 void vm86_gpfault(struct lwp *, int); 397 #endif /* VM86 */ 398 399 /* consinit.c */ 400 void kgdb_port_init(void); 401 402 /* bus_machdep.c */ 403 void x86_bus_space_init(void); 404 void x86_bus_space_mallocok(void); 405 406 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 407 408 #endif /* _KERNEL */ 409 410 /* 411 * CTL_MACHDEP definitions. 412 */ 413 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 414 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 415 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 416 #define CPU_NKPDE 4 /* int: number of kernel PDEs */ 417 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 418 #define CPU_DISKINFO 6 /* struct disklist *: 419 * disk geometry information */ 420 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 421 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 422 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 423 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 424 #define CPU_TMLR_MODE 11 /* int: longrun mode 425 * 0: minimum frequency 426 * 1: economy 427 * 2: performance 428 * 3: maximum frequency 429 */ 430 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 431 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 432 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 433 #define CPU_MAXID 15 /* number of valid machdep ids */ 434 435 #define CTL_MACHDEP_NAMES { \ 436 { 0, 0 }, \ 437 { "console_device", CTLTYPE_STRUCT }, \ 438 { "biosbasemem", CTLTYPE_INT }, \ 439 { "biosextmem", CTLTYPE_INT }, \ 440 { "nkpde", CTLTYPE_INT }, \ 441 { "booted_kernel", CTLTYPE_STRING }, \ 442 { "diskinfo", CTLTYPE_STRUCT }, \ 443 { "fpu_present", CTLTYPE_INT }, \ 444 { "osfxsr", CTLTYPE_INT }, \ 445 { "sse", CTLTYPE_INT }, \ 446 { "sse2", CTLTYPE_INT }, \ 447 { "tm_longrun_mode", CTLTYPE_INT }, \ 448 { "tm_longrun_frequency", CTLTYPE_INT }, \ 449 { "tm_longrun_voltage", CTLTYPE_INT }, \ 450 { "tm_longrun_percentage", CTLTYPE_INT }, \ 451 } 452 453 /* 454 * Structure for CPU_DISKINFO sysctl call. 455 * XXX this should be somewhere else. 456 */ 457 #define MAX_BIOSDISKS 16 458 459 struct disklist { 460 int dl_nbiosdisks; /* number of bios disks */ 461 struct biosdisk_info { 462 int bi_dev; /* BIOS device # (0x80 ..) */ 463 int bi_cyl; /* cylinders on disk */ 464 int bi_head; /* heads per track */ 465 int bi_sec; /* sectors per track */ 466 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 467 #define BIFLAG_INVALID 0x01 468 #define BIFLAG_EXTINT13 0x02 469 int bi_flags; 470 } dl_biosdisks[MAX_BIOSDISKS]; 471 472 int dl_nnativedisks; /* number of native disks */ 473 struct nativedisk_info { 474 char ni_devname[16]; /* native device name */ 475 int ni_nmatches; /* # of matches w/ BIOS */ 476 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 477 } dl_nativedisks[1]; /* actually longer */ 478 }; 479 #endif /* !_I386_CPU_H_ */ 480
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