cpu.h revision 1.153
1 /* $NetBSD: cpu.h,v 1.153 2007/12/25 18:33:33 perry Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _I386_CPU_H_ 38 #define _I386_CPU_H_ 39 40 #ifdef _KERNEL 41 #if defined(_KERNEL_OPT) 42 #include "opt_multiprocessor.h" 43 #include "opt_math_emulate.h" 44 #include "opt_user_ldt.h" 45 #include "opt_vm86.h" 46 #endif 47 48 /* 49 * Definitions unique to i386 cpu support. 50 */ 51 #include <machine/frame.h> 52 #include <machine/segments.h> 53 #include <machine/tss.h> 54 #include <machine/intrdefs.h> 55 #include <x86/cacheinfo.h> 56 #include <x86/via_padlock.h> 57 58 #include <sys/device.h> 59 #include <sys/cpu_data.h> 60 #include <sys/cc_microtime.h> 61 62 #include <lib/libkern/libkern.h> /* offsetof */ 63 64 struct intrsource; 65 struct pmap; 66 67 /* 68 * a bunch of this belongs in cpuvar.h; move it later.. 69 */ 70 71 struct cpu_info { 72 struct device *ci_dev; /* pointer to our device */ 73 struct cpu_info *ci_self; /* self-pointer */ 74 void *ci_tlog_base; /* Trap log base */ 75 int32_t ci_tlog_offset; /* Trap log current offset */ 76 77 /* 78 * Will be accessed by other CPUs. 79 */ 80 struct cpu_info *ci_next; /* next cpu */ 81 struct lwp *ci_curlwp; /* current owner of the processor */ 82 struct pmap_cpu *ci_pmap_cpu; /* per-CPU pmap data */ 83 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 84 int ci_fpsaving; /* save in progress */ 85 cpuid_t ci_cpuid; /* our CPU ID */ 86 int ci_cpumask; /* (1 << CPU ID) */ 87 u_int ci_apicid; /* our APIC ID */ 88 struct cpu_data ci_data; /* MI per-cpu data */ 89 struct cc_microtime_state ci_cc;/* cc_microtime state */ 90 91 /* 92 * Private members. 93 */ 94 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 95 struct pmap *ci_pmap; /* current pmap */ 96 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 97 int ci_want_pmapload; /* pmap_load() is needed */ 98 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 99 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 100 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 101 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 102 103 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 104 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 105 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 106 107 /* The following must be aligned for cmpxchg8b. */ 108 struct { 109 uint32_t ipending; 110 int ilevel; 111 } ci_istate __aligned(8); 112 #define ci_ipending ci_istate.ipending 113 #define ci_ilevel ci_istate.ilevel 114 115 int ci_idepth; 116 void * ci_intrstack; 117 uint32_t ci_imask[NIPL]; 118 uint32_t ci_iunmask[NIPL]; 119 120 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */ 121 uint32_t ci_flags; /* flags; see below */ 122 uint32_t ci_ipis; /* interprocessor interrupts pending */ 123 int sc_apic_version; /* local APIC version */ 124 125 int32_t ci_cpuid_level; 126 uint32_t ci_signature; /* X86 cpuid type */ 127 uint32_t ci_feature_flags;/* X86 %edx CPUID feature bits */ 128 uint32_t ci_feature2_flags;/* X86 %ecx CPUID feature bits */ 129 uint32_t ci_feature3_flags;/* X86 extended feature bits */ 130 uint32_t ci_padlock_flags;/* VIA PadLock feature bits */ 131 uint32_t ci_cpu_class; /* CPU class */ 132 uint32_t ci_brand_id; /* Intel brand id */ 133 uint32_t ci_vendor[4]; /* vendor string */ 134 uint32_t ci_cpu_serial[3]; /* PIII serial number */ 135 uint64_t ci_tsc_freq; /* cpu cycles/second */ 136 volatile uint32_t ci_lapic_counter; 137 138 const struct cpu_functions *ci_func; /* start/stop functions */ 139 void (*cpu_setup)(struct cpu_info *); 140 /* proc-dependant init */ 141 void (*ci_info)(struct cpu_info *); 142 143 int ci_want_resched; 144 struct trapframe *ci_ddb_regs; 145 146 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 147 struct x86_cache_info ci_cinfo[CAI_COUNT]; 148 149 union descriptor *ci_gdt; 150 151 struct i386tss ci_doubleflt_tss; 152 struct i386tss ci_ddbipi_tss; 153 154 char *ci_doubleflt_stack; 155 char *ci_ddbipi_stack; 156 157 struct evcnt ci_ipi_events[X86_NIPI]; 158 159 struct via_padlock ci_vp; /* VIA PadLock private storage */ 160 161 /* 162 * The following two are actually region_descriptors, 163 * but that would pollute the namespace. 164 */ 165 uint32_t ci_suspend_gdt; 166 uint16_t ci_suspend_gdt_padding; 167 uint32_t ci_suspend_idt; 168 uint16_t ci_suspend_idt_padding; 169 170 uint16_t ci_suspend_tr; 171 uint16_t ci_suspend_ldt; 172 uint16_t ci_suspend_fs; 173 uint16_t ci_suspend_gs; 174 uint32_t ci_suspend_ebx; 175 uint32_t ci_suspend_esi; 176 uint32_t ci_suspend_edi; 177 uint32_t ci_suspend_ebp; 178 uint32_t ci_suspend_esp; 179 uint32_t ci_suspend_efl; 180 uint32_t ci_suspend_cr0; 181 uint32_t ci_suspend_cr2; 182 uint32_t ci_suspend_cr3; 183 uint32_t ci_suspend_cr4; 184 }; 185 186 /* 187 * Processor flag notes: The "primary" CPU has certain MI-defined 188 * roles (mostly relating to hardclock handling); we distinguish 189 * betwen the processor which booted us, and the processor currently 190 * holding the "primary" role just to give us the flexibility later to 191 * change primaries should we be sufficiently twisted. 192 */ 193 194 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 195 #define CPUF_AP 0x0002 /* CPU is an AP */ 196 #define CPUF_SP 0x0004 /* CPU is only processor */ 197 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 198 199 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */ 200 201 #define CPUF_PRESENT 0x1000 /* CPU is present */ 202 #define CPUF_RUNNING 0x2000 /* CPU is running */ 203 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 204 #define CPUF_GO 0x8000 /* CPU should start running */ 205 206 /* 207 * We statically allocate the CPU info for the primary CPU (or, 208 * the only CPU on uniprocessors), and the primary CPU is the 209 * first CPU on the CPU info list. 210 */ 211 extern struct cpu_info cpu_info_primary; 212 extern struct cpu_info *cpu_info_list; 213 214 #define CPU_INFO_ITERATOR int 215 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 216 ci != NULL; ci = ci->ci_next 217 218 #define X86_MAXPROCS 32 /* because we use a bitmask */ 219 220 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 221 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 222 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 223 224 #if defined(__GNUC__) && defined(_KERNEL) 225 static struct cpu_info *x86_curcpu(void); 226 static lwp_t *x86_curlwp(void); 227 228 __inline static struct cpu_info * __unused 229 x86_curcpu(void) 230 { 231 struct cpu_info *ci; 232 233 __asm volatile("movl %%fs:%1, %0" : 234 "=r" (ci) : 235 "m" 236 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); 237 return ci; 238 } 239 240 __inline static lwp_t * __unused 241 x86_curlwp(void) 242 { 243 lwp_t *l; 244 245 __asm volatile("movl %%fs:%1, %0" : 246 "=r" (l) : 247 "m" 248 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp))); 249 return l; 250 } 251 #else /* __GNUC__ && _KERNEL */ 252 /* For non-GCC and LKMs */ 253 struct cpu_info *x86_curcpu(void); 254 lwp_t *x86_curlwp(void); 255 #endif /* __GNUC__ && _KERNEL */ 256 257 #define cpu_number() (curcpu()->ci_cpuid) 258 259 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 260 261 #define aston(l) ((l)->l_md.md_astpending = 1) 262 263 extern struct cpu_info *cpu_info[X86_MAXPROCS]; 264 265 void cpu_boot_secondary_processors(void); 266 void cpu_init_idle_lwps(void); 267 268 extern uint32_t cpus_attached; 269 270 #define curcpu() x86_curcpu() 271 #define curlwp x86_curlwp() 272 #define curpcb (&curlwp->l_addr->u_pcb) 273 274 /* 275 * Arguments to hardclock, softclock and statclock 276 * encapsulate the previous machine state in an opaque 277 * clockframe; for now, use generic intrframe. 278 */ 279 struct clockframe { 280 struct intrframe cf_if; 281 }; 282 283 #define CLKF_USERMODE(frame) USERMODE((frame)->cf_if.if_cs, (frame)->cf_if.if_eflags) 284 #define CLKF_PC(frame) ((frame)->cf_if.if_eip) 285 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 0) 286 287 /* 288 * This is used during profiling to integrate system time. It can safely 289 * assume that the process is resident. 290 */ 291 #define LWP_PC(l) ((l)->l_md.md_regs->tf_eip) 292 293 /* 294 * Give a profiling tick to the current process when the user profiling 295 * buffer pages are invalid. On the i386, request an ast to send us 296 * through trap(), marking the proc as needing a profiling tick. 297 */ 298 extern void cpu_need_proftick(struct lwp *l); 299 300 /* 301 * Notify the LWP l that it has a signal pending, process as soon as 302 * possible. 303 */ 304 extern void cpu_signotify(struct lwp *); 305 306 /* 307 * We need a machine-independent name for this. 308 */ 309 extern void (*delay_func)(unsigned int); 310 struct timeval; 311 312 #define DELAY(x) (*delay_func)(x) 313 #define delay(x) (*delay_func)(x) 314 315 /* 316 * pull in #defines for kinds of processors 317 */ 318 #include <machine/cputypes.h> 319 320 struct cpu_nocpuid_nameclass { 321 int cpu_vendor; 322 const char *cpu_vendorname; 323 const char *cpu_name; 324 int cpu_class; 325 void (*cpu_setup)(struct cpu_info *); 326 void (*cpu_cacheinfo)(struct cpu_info *); 327 void (*cpu_info)(struct cpu_info *); 328 }; 329 330 331 struct cpu_cpuid_nameclass { 332 const char *cpu_id; 333 int cpu_vendor; 334 const char *cpu_vendorname; 335 struct cpu_cpuid_family { 336 int cpu_class; 337 const char *cpu_models[CPU_MAXMODEL+2]; 338 void (*cpu_setup)(struct cpu_info *); 339 void (*cpu_probe)(struct cpu_info *); 340 void (*cpu_info)(struct cpu_info *); 341 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1]; 342 }; 343 344 extern int biosbasemem; 345 extern int biosextmem; 346 extern unsigned int cpu_feature; 347 extern unsigned int cpu_feature2; 348 extern unsigned int cpu_feature_padlock; 349 extern int cpu; 350 extern int cpu_class; 351 extern char cpu_brand_string[]; 352 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[]; 353 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[]; 354 355 extern int i386_use_fxsave; 356 extern int i386_has_sse; 357 extern int i386_has_sse2; 358 359 /* machdep.c */ 360 void dumpconf(void); 361 int cpu_maxproc(void); 362 void cpu_reset(void); 363 void i386_proc0_tss_ldt_init(void); 364 365 extern int tmx86_has_longrun; 366 extern u_int crusoe_longrun; 367 extern u_int crusoe_frequency; 368 extern u_int crusoe_voltage; 369 extern u_int crusoe_percentage; 370 extern u_int tmx86_set_longrun_mode(u_int); 371 void tmx86_get_longrun_status_all(void); 372 u_int tmx86_get_longrun_mode(void); 373 void identifycpu(struct cpu_info *); 374 375 /* vm_machdep.c */ 376 void cpu_proc_fork(struct proc *, struct proc *); 377 378 /* locore.s */ 379 struct region_descriptor; 380 void lgdt(struct region_descriptor *); 381 void fillw(short, void *, size_t); 382 383 struct pcb; 384 void savectx(struct pcb *); 385 void lwp_trampoline(void); 386 387 /* clock.c */ 388 void initrtclock(u_long); 389 void startrtclock(void); 390 void i8254_delay(unsigned int); 391 void i8254_microtime(struct timeval *); 392 void i8254_initclocks(void); 393 394 /* cpu.c */ 395 396 void cpu_probe_features(struct cpu_info *); 397 398 /* npx.c */ 399 void npxsave_lwp(struct lwp *, int); 400 void npxsave_cpu(struct cpu_info *, int); 401 402 /* vm_machdep.c */ 403 int kvtop(void *); 404 405 #ifdef MATH_EMULATE 406 /* math_emulate.c */ 407 int math_emulate(struct trapframe *, ksiginfo_t *); 408 #endif 409 410 #ifdef USER_LDT 411 /* sys_machdep.h */ 412 int x86_get_ldt(struct lwp *, void *, register_t *); 413 int x86_set_ldt(struct lwp *, void *, register_t *); 414 #endif 415 416 /* isa_machdep.c */ 417 void isa_defaultirq(void); 418 int isa_nmi(void); 419 420 #ifdef VM86 421 /* vm86.c */ 422 void vm86_gpfault(struct lwp *, int); 423 #endif /* VM86 */ 424 425 /* consinit.c */ 426 void kgdb_port_init(void); 427 428 /* bus_machdep.c */ 429 void x86_bus_space_init(void); 430 void x86_bus_space_mallocok(void); 431 432 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 433 434 #endif /* _KERNEL */ 435 436 /* 437 * CTL_MACHDEP definitions. 438 */ 439 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 440 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 441 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 442 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 443 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 444 #define CPU_DISKINFO 6 /* struct disklist *: 445 * disk geometry information */ 446 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 447 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 448 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 449 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 450 #define CPU_TMLR_MODE 11 /* int: longrun mode 451 * 0: minimum frequency 452 * 1: economy 453 * 2: performance 454 * 3: maximum frequency 455 */ 456 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 457 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 458 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 459 #define CPU_MAXID 15 /* number of valid machdep ids */ 460 461 #define CTL_MACHDEP_NAMES { \ 462 { 0, 0 }, \ 463 { "console_device", CTLTYPE_STRUCT }, \ 464 { "biosbasemem", CTLTYPE_INT }, \ 465 { "biosextmem", CTLTYPE_INT }, \ 466 { "booted_kernel", CTLTYPE_STRING }, \ 467 { "diskinfo", CTLTYPE_STRUCT }, \ 468 { "fpu_present", CTLTYPE_INT }, \ 469 { "osfxsr", CTLTYPE_INT }, \ 470 { "sse", CTLTYPE_INT }, \ 471 { "sse2", CTLTYPE_INT }, \ 472 { "tm_longrun_mode", CTLTYPE_INT }, \ 473 { "tm_longrun_frequency", CTLTYPE_INT }, \ 474 { "tm_longrun_voltage", CTLTYPE_INT }, \ 475 { "tm_longrun_percentage", CTLTYPE_INT }, \ 476 } 477 478 /* 479 * Structure for CPU_DISKINFO sysctl call. 480 * XXX this should be somewhere else. 481 */ 482 #define MAX_BIOSDISKS 16 483 484 struct disklist { 485 int dl_nbiosdisks; /* number of bios disks */ 486 struct biosdisk_info { 487 int bi_dev; /* BIOS device # (0x80 ..) */ 488 int bi_cyl; /* cylinders on disk */ 489 int bi_head; /* heads per track */ 490 int bi_sec; /* sectors per track */ 491 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 492 #define BIFLAG_INVALID 0x01 493 #define BIFLAG_EXTINT13 0x02 494 int bi_flags; 495 } dl_biosdisks[MAX_BIOSDISKS]; 496 497 int dl_nnativedisks; /* number of native disks */ 498 struct nativedisk_info { 499 char ni_devname[16]; /* native device name */ 500 int ni_nmatches; /* # of matches w/ BIOS */ 501 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 502 } dl_nativedisks[1]; /* actually longer */ 503 }; 504 #endif /* !_I386_CPU_H_ */ 505
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