cpu.h revision 1.82 1 /* $NetBSD: cpu.h,v 1.82 2002/10/01 12:57:04 fvdl Exp $ */
2
3 /*-
4 * Copyright (c) 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * @(#)cpu.h 5.4 (Berkeley) 5/9/91
39 */
40
41 #ifndef _I386_CPU_H_
42 #define _I386_CPU_H_
43
44 #if defined(_KERNEL_OPT)
45 #include "opt_multiprocessor.h"
46 #endif
47
48 /*
49 * Definitions unique to i386 cpu support.
50 */
51 #include <machine/frame.h>
52 #include <machine/segments.h>
53
54 #include <sys/device.h>
55 #include <sys/lock.h> /* will also get LOCKDEBUG */
56 #include <sys/sched.h>
57
58 struct i386_cache_info {
59 uint8_t cai_index;
60 uint8_t cai_desc;
61 uint8_t cai_associativity;
62 u_int cai_totalsize; /* #entries for TLB, bytes for cache */
63 u_int cai_linesize; /* or page size for TLB */
64 const char *cai_string;
65 };
66
67 #define CAI_ITLB 0 /* Instruction TLB (4K pages) */
68 #define CAI_ITLB2 1 /* Instruction TLB (2/4M pages) */
69 #define CAI_DTLB 2 /* Data TLB (4K pages) */
70 #define CAI_DTLB2 3 /* Data TLB (2/4M pages) */
71 #define CAI_ICACHE 4 /* Instruction cache */
72 #define CAI_DCACHE 5 /* Data cache */
73 #define CAI_L2CACHE 6 /* Level 2 cache */
74
75 #define CAI_COUNT 7
76
77 /*
78 * a bunch of this belongs in cpuvar.h; move it later..
79 */
80
81 struct cpu_info {
82 struct device *ci_dev; /* pointer to our device */
83 struct cpu_info *ci_self; /* self-pointer */
84 void *ci_tlog_base; /* Trap log base */
85 int32_t ci_tlog_offset; /* Trap log current offset */
86 struct schedstate_percpu ci_schedstate; /* scheduler state */
87 struct cpu_info *ci_next; /* next cpu */
88
89 /*
90 * Public members.
91 */
92 struct proc *ci_curproc; /* current owner of the processor */
93 struct simplelock ci_slock; /* lock on this data structure */
94 cpuid_t ci_cpuid; /* our CPU ID */
95 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
96 u_long ci_spin_locks; /* # of spin locks held */
97 u_long ci_simple_locks; /* # of simple locks held */
98 #endif
99
100 /*
101 * Private members.
102 */
103 struct proc *ci_fpcurproc; /* current owner of the FPU */
104 int ci_fpsaving; /* save in progress */
105
106 struct pcb *ci_curpcb; /* VA of current HW PCB */
107 struct pcb *ci_idle_pcb; /* VA of current PCB */
108 int ci_idle_tss_sel; /* TSS selector of idle PCB */
109
110 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */
111 u_int32_t ci_flags; /* flags; see below */
112 u_int32_t ci_ipis; /* interprocessor interrupts pending */
113 int sc_apic_version; /* local APIC version */
114
115 int32_t ci_cpuid_level;
116 u_int32_t ci_signature; /* X86 cpuid type */
117 u_int32_t ci_feature_flags;/* X86 CPUID feature bits */
118 u_int32_t ci_cpu_class; /* CPU class */
119 u_int32_t ci_brand_id; /* Intel brand id */
120 u_int32_t ci_vendor[4]; /* vendor string */
121 u_int32_t ci_cpu_serial[3]; /* PIII serial number */
122 u_int64_t ci_tsc_freq; /* cpu cycles/second */
123
124 struct cpu_functions *ci_func; /* start/stop functions */
125 void (*cpu_setup) __P((struct cpu_info *));
126 /* proc-dependant init */
127 void (*ci_info) __P((struct cpu_info *));
128
129 int ci_want_resched;
130 int ci_astpending;
131 struct trapframe *ci_ddb_regs;
132
133 u_int ci_cflush_lsize; /* CFLUSH insn line size */
134 struct i386_cache_info ci_cinfo[CAI_COUNT];
135
136 /*
137 * Variables used by tsc_microtime().
138 */
139 struct timeval ci_tsc_time;
140 int64_t ci_tsc_tsc;
141 int64_t ci_tsc_ms_delta;
142 int64_t ci_tsc_denom;
143
144 union descriptor *ci_gdt;
145 };
146
147 /*
148 * Processor flag notes: The "primary" CPU has certain MI-defined
149 * roles (mostly relating to hardclock handling); we distinguish
150 * betwen the processor which booted us, and the processor currently
151 * holding the "primary" role just to give us the flexibility later to
152 * change primaries should we be sufficiently twisted.
153 */
154
155 #define CPUF_BSP 0x0001 /* CPU is the original BSP */
156 #define CPUF_AP 0x0002 /* CPU is an AP */
157 #define CPUF_SP 0x0004 /* CPU is only processor */
158 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */
159
160 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */
161
162 #define CPUF_PRESENT 0x1000 /* CPU is present */
163 #define CPUF_RUNNING 0x2000 /* CPU is running */
164 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */
165 #define CPUF_GO 0x8000 /* CPU should start running */
166
167 /*
168 * We statically allocate the CPU info for the primary CPU (or,
169 * the only CPU on uniprocessors), and the primary CPU is the
170 * first CPU on the CPU info list.
171 */
172 extern struct cpu_info cpu_info_primary;
173 extern struct cpu_info *cpu_info_list;
174
175 #define CPU_INFO_ITERATOR int
176 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \
177 ci != NULL; ci = ci->ci_next
178
179 #if defined(MULTIPROCESSOR)
180
181 #define I386_MAXPROCS 32 /* because we use a bitmask */
182
183 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci))
184 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci))
185 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci))
186
187 #define curcpu() ({struct cpu_info *ci; \
188 asm volatile("movl %%fs:4,%0" : "=r" (ci)); \
189 ci;})
190 #define cpu_number() (curcpu()->ci_cpuid)
191
192 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY)
193
194 #if 0
195 #define i386_ipisend(ci) (((ci) != curcpu()) ? i386_send_ipi((ci),0) : 0)
196 #else
197 #define i386_ipisend(ci) 0
198 #endif
199
200 #define aston(ci) ((ci)->ci_astpending = 1, i386_ipisend(ci))
201
202 extern struct cpu_info *cpu_info[I386_MAXPROCS];
203
204 void cpu_boot_secondary_processors __P((void));
205 void cpu_init_idle_pcbs __P((void));
206
207 /*
208 * Preempt the current process if in interrupt from user mode,
209 * or after the current trap/syscall if in system mode.
210 */
211 extern void need_resched __P((struct cpu_info *));
212
213 #else /* !MULTIPROCESSOR */
214
215 #define I386_MAXPROCS 1
216
217 #ifdef _KERNEL
218 extern struct cpu_info cpu_info_primary;
219
220 #define curcpu() (&cpu_info_primary)
221 #endif
222
223 /*
224 * definitions of cpu-dependent requirements
225 * referenced in generic code
226 */
227 #define cpu_number() 0
228
229 /*
230 * Preempt the current process if in interrupt from user mode,
231 * or after the current trap/syscall if in system mode.
232 */
233 #define need_resched(ci) \
234 do { \
235 struct cpu_info *__ci = (ci); \
236 __ci->ci_want_resched = 1; \
237 aston(__ci); \
238 } while (0)
239
240 #define aston(ci) (curcpu()->ci_astpending = 1)
241
242 #endif
243
244 #define curpcb curcpu()->ci_curpcb
245 #define curproc curcpu()->ci_curproc
246
247 #define cpu_swapin(p) /* nothing */
248
249 /*
250 * Arguments to hardclock, softclock and statclock
251 * encapsulate the previous machine state in an opaque
252 * clockframe; for now, use generic intrframe.
253 *
254 * Note: Since spllowersoftclock() does not actually unmask the currently
255 * running (hardclock) interrupt, CLKF_BASEPRI() *must* always be 0; otherwise
256 * we could stall hardclock ticks if another interrupt takes too long.
257 */
258 #define clockframe intrframe
259
260 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_eflags)
261 #define CLKF_BASEPRI(frame) (0)
262 #define CLKF_PC(frame) ((frame)->if_eip)
263 #define CLKF_INTR(frame) ((frame)->if_ppl & (1 << IPL_TAGINTR))
264
265 /*
266 * This is used during profiling to integrate system time. It can safely
267 * assume that the process is resident.
268 */
269 #define PROC_PC(p) ((p)->p_md.md_regs->tf_eip)
270
271 /*
272 * Give a profiling tick to the current process when the user profiling
273 * buffer pages are invalid. On the i386, request an ast to send us
274 * through trap(), marking the proc as needing a profiling tick.
275 */
276 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, aston(p->p_cpu))
277
278 /*
279 * Notify the current process (p) that it has a signal pending,
280 * process as soon as possible.
281 */
282 #define signotify(p) aston(p->p_cpu)
283
284 /*
285 * We need a machine-independent name for this.
286 */
287 extern void (*delay_func) __P((int));
288 struct timeval;
289 extern void (*microtime_func) __P((struct timeval *));
290
291 #define DELAY(x) (*delay_func)(x)
292 #define delay(x) (*delay_func)(x)
293 #define microtime(tv) (*microtime_func)(tv)
294
295 /*
296 * pull in #defines for kinds of processors
297 */
298 #include <machine/cputypes.h>
299
300 struct cpu_nocpuid_nameclass {
301 int cpu_vendor;
302 const char *cpu_vendorname;
303 const char *cpu_name;
304 int cpu_class;
305 void (*cpu_setup) __P((struct cpu_info *));
306 void (*cpu_cacheinfo) __P((struct cpu_info *));
307 void (*cpu_info) __P((struct cpu_info *));
308 };
309
310
311 struct cpu_cpuid_nameclass {
312 const char *cpu_id;
313 int cpu_vendor;
314 const char *cpu_vendorname;
315 struct cpu_cpuid_family {
316 int cpu_class;
317 const char *cpu_models[CPU_MAXMODEL+2];
318 void (*cpu_setup) __P((struct cpu_info *));
319 void (*cpu_probe) __P((struct cpu_info *));
320 void (*cpu_info) __P((struct cpu_info *));
321 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1];
322 };
323
324 #ifdef _KERNEL
325 extern int biosbasemem;
326 extern int biosextmem;
327 extern int cpu_feature;
328 extern int cpu;
329 extern int cpu_class;
330 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[];
331 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[];
332
333 extern int i386_use_fxsave;
334 extern int i386_has_sse;
335 extern int i386_has_sse2;
336
337 /* machdep.c */
338 void dumpconf __P((void));
339 void cpu_reset __P((void));
340 void i386_init_pcb_tss_ldt __P((struct cpu_info *));
341 void i386_proc0_tss_ldt_init __P((void));
342 void i386_bufinit __P((void));
343
344 /* locore.s */
345 struct region_descriptor;
346 void lgdt __P((struct region_descriptor *));
347 void fillw __P((short, void *, size_t));
348
349 struct pcb;
350 void savectx __P((struct pcb *));
351 void switch_exit __P((struct proc *));
352 void proc_trampoline __P((void));
353
354 /* clock.c */
355 void initrtclock __P((void));
356 void startrtclock __P((void));
357 void i8254_delay __P((int));
358 void i8254_microtime __P((struct timeval *));
359 void i8254_initclocks __P((void));
360
361 /* tsc_microtime.c */
362
363 void tsc_microtime __P((struct timeval *));
364 void tsc_microset __P((struct cpu_info *));
365
366 /* cpu.c */
367
368 void cpu_probe_features __P((struct cpu_info *));
369
370 /* npx.c */
371 void npxsave_proc __P((struct proc *, int));
372 void npxsave_cpu __P((struct cpu_info *, int));
373
374 /* vm_machdep.c */
375 int kvtop __P((caddr_t));
376
377 #if !defined(_LKM)
378 #include "opt_math_emulate.h"
379 #endif
380 #ifdef MATH_EMULATE
381 /* math_emulate.c */
382 int math_emulate __P((struct trapframe *));
383 #endif
384
385 #if !defined(_LKM)
386 #include "opt_user_ldt.h"
387 #endif
388 #ifdef USER_LDT
389 /* sys_machdep.h */
390 int i386_get_ldt __P((struct proc *, void *, register_t *));
391 int i386_set_ldt __P((struct proc *, void *, register_t *));
392 #endif
393
394 /* isa_machdep.c */
395 void isa_defaultirq __P((void));
396 int isa_nmi __P((void));
397
398 #if !defined(_LKM)
399 #include "opt_vm86.h"
400 #endif
401 #ifdef VM86
402 /* vm86.c */
403 void vm86_gpfault __P((struct proc *, int));
404 #endif /* VM86 */
405
406 /* consinit.c */
407 void kgdb_port_init __P((void));
408
409 /* bus_machdep.c */
410 void i386_bus_space_init __P((void));
411 void i386_bus_space_mallocok __P((void));
412
413 #endif /* _KERNEL */
414
415 #include <machine/psl.h>
416
417 /*
418 * CTL_MACHDEP definitions.
419 */
420 #define CPU_CONSDEV 1 /* dev_t: console terminal device */
421 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */
422 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */
423 #define CPU_NKPDE 4 /* int: number of kernel PDEs */
424 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */
425 #define CPU_DISKINFO 6 /* struct disklist *:
426 * disk geometry information */
427 #define CPU_FPU_PRESENT 7 /* int: FPU is present */
428 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */
429 #define CPU_SSE 9 /* int: OS/CPU supports SSE */
430 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */
431 #define CPU_TMLR_MODE 11 /* int: longrun mode
432 * 0: minimum frequency
433 * 1: economy
434 * 2: performance
435 * 3: maximum frequency
436 */
437 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */
438 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */
439 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */
440 #define CPU_MAXID 15 /* number of valid machdep ids */
441
442 #define CTL_MACHDEP_NAMES { \
443 { 0, 0 }, \
444 { "console_device", CTLTYPE_STRUCT }, \
445 { "biosbasemem", CTLTYPE_INT }, \
446 { "biosextmem", CTLTYPE_INT }, \
447 { "nkpde", CTLTYPE_INT }, \
448 { "booted_kernel", CTLTYPE_STRING }, \
449 { "diskinfo", CTLTYPE_STRUCT }, \
450 { "fpu_present", CTLTYPE_INT }, \
451 { "osfxsr", CTLTYPE_INT }, \
452 { "sse", CTLTYPE_INT }, \
453 { "sse2", CTLTYPE_INT }, \
454 { "tm_longrun_mode", CTLTYPE_INT }, \
455 { "tm_longrun_frequency", CTLTYPE_INT }, \
456 { "tm_longrun_voltage", CTLTYPE_INT }, \
457 { "tm_longrun_percentage", CTLTYPE_INT }, \
458 }
459
460
461 /*
462 * Structure for CPU_DISKINFO sysctl call.
463 * XXX this should be somewhere else.
464 */
465 #define MAX_BIOSDISKS 16
466
467 struct disklist {
468 int dl_nbiosdisks; /* number of bios disks */
469 struct biosdisk_info {
470 int bi_dev; /* BIOS device # (0x80 ..) */
471 int bi_cyl; /* cylinders on disk */
472 int bi_head; /* heads per track */
473 int bi_sec; /* sectors per track */
474 u_int64_t bi_lbasecs; /* total sec. (iff ext13) */
475 #define BIFLAG_INVALID 0x01
476 #define BIFLAG_EXTINT13 0x02
477 int bi_flags;
478 } dl_biosdisks[MAX_BIOSDISKS];
479
480 int dl_nnativedisks; /* number of native disks */
481 struct nativedisk_info {
482 char ni_devname[16]; /* native device name */
483 int ni_nmatches; /* # of matches w/ BIOS */
484 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
485 } dl_nativedisks[1]; /* actually longer */
486 };
487
488 #endif /* !_I386_CPU_H_ */
489