cpu.h revision 1.85
1 /* $NetBSD: cpu.h,v 1.85 2002/10/06 14:28:17 fvdl Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 39 */ 40 41 #ifndef _I386_CPU_H_ 42 #define _I386_CPU_H_ 43 44 #if defined(_KERNEL_OPT) 45 #include "opt_multiprocessor.h" 46 #endif 47 48 /* 49 * Definitions unique to i386 cpu support. 50 */ 51 #include <machine/frame.h> 52 #include <machine/segments.h> 53 #include <machine/tss.h> 54 55 #include <sys/device.h> 56 #include <sys/lock.h> /* will also get LOCKDEBUG */ 57 #include <sys/sched.h> 58 59 struct i386_cache_info { 60 uint8_t cai_index; 61 uint8_t cai_desc; 62 uint8_t cai_associativity; 63 u_int cai_totalsize; /* #entries for TLB, bytes for cache */ 64 u_int cai_linesize; /* or page size for TLB */ 65 const char *cai_string; 66 }; 67 68 #define CAI_ITLB 0 /* Instruction TLB (4K pages) */ 69 #define CAI_ITLB2 1 /* Instruction TLB (2/4M pages) */ 70 #define CAI_DTLB 2 /* Data TLB (4K pages) */ 71 #define CAI_DTLB2 3 /* Data TLB (2/4M pages) */ 72 #define CAI_ICACHE 4 /* Instruction cache */ 73 #define CAI_DCACHE 5 /* Data cache */ 74 #define CAI_L2CACHE 6 /* Level 2 cache */ 75 76 #define CAI_COUNT 7 77 78 struct mp_intr_map; 79 80 /* 81 * a bunch of this belongs in cpuvar.h; move it later.. 82 */ 83 84 struct cpu_info { 85 struct device *ci_dev; /* pointer to our device */ 86 struct cpu_info *ci_self; /* self-pointer */ 87 void *ci_tlog_base; /* Trap log base */ 88 int32_t ci_tlog_offset; /* Trap log current offset */ 89 struct schedstate_percpu ci_schedstate; /* scheduler state */ 90 struct cpu_info *ci_next; /* next cpu */ 91 92 /* 93 * Public members. 94 */ 95 struct proc *ci_curproc; /* current owner of the processor */ 96 struct simplelock ci_slock; /* lock on this data structure */ 97 cpuid_t ci_cpuid; /* our CPU ID */ 98 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 99 u_long ci_spin_locks; /* # of spin locks held */ 100 u_long ci_simple_locks; /* # of simple locks held */ 101 #endif 102 103 /* 104 * Private members. 105 */ 106 struct proc *ci_fpcurproc; /* current owner of the FPU */ 107 int ci_fpsaving; /* save in progress */ 108 109 struct pcb *ci_curpcb; /* VA of current HW PCB */ 110 struct pcb *ci_idle_pcb; /* VA of current PCB */ 111 int ci_idle_tss_sel; /* TSS selector of idle PCB */ 112 113 paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */ 114 u_int32_t ci_flags; /* flags; see below */ 115 u_int32_t ci_ipis; /* interprocessor interrupts pending */ 116 int sc_apic_version; /* local APIC version */ 117 118 int32_t ci_cpuid_level; 119 u_int32_t ci_signature; /* X86 cpuid type */ 120 u_int32_t ci_feature_flags;/* X86 CPUID feature bits */ 121 u_int32_t ci_cpu_class; /* CPU class */ 122 u_int32_t ci_brand_id; /* Intel brand id */ 123 u_int32_t ci_vendor[4]; /* vendor string */ 124 u_int32_t ci_cpu_serial[3]; /* PIII serial number */ 125 u_int64_t ci_tsc_freq; /* cpu cycles/second */ 126 127 struct cpu_functions *ci_func; /* start/stop functions */ 128 void (*cpu_setup) __P((struct cpu_info *)); 129 /* proc-dependant init */ 130 void (*ci_info) __P((struct cpu_info *)); 131 132 int ci_want_resched; 133 int ci_astpending; 134 struct trapframe *ci_ddb_regs; 135 136 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 137 struct i386_cache_info ci_cinfo[CAI_COUNT]; 138 139 /* 140 * Variables used by tsc_microtime(). 141 */ 142 struct timeval ci_tsc_time; 143 int64_t ci_tsc_tsc; 144 int64_t ci_tsc_ms_delta; 145 int64_t ci_tsc_denom; 146 147 union descriptor *ci_gdt; 148 149 volatile u_int32_t ci_tlb_ipi_mask; 150 151 struct i386tss ci_doubleflt_tss; 152 struct i386tss ci_ddbipi_tss; 153 154 char *ci_doubleflt_stack; 155 char *ci_ddbipi_stack; 156 157 struct mp_intr_map *ci_lapic_ints[2]; 158 }; 159 160 /* 161 * Processor flag notes: The "primary" CPU has certain MI-defined 162 * roles (mostly relating to hardclock handling); we distinguish 163 * betwen the processor which booted us, and the processor currently 164 * holding the "primary" role just to give us the flexibility later to 165 * change primaries should we be sufficiently twisted. 166 */ 167 168 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 169 #define CPUF_AP 0x0002 /* CPU is an AP */ 170 #define CPUF_SP 0x0004 /* CPU is only processor */ 171 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 172 173 #define CPUF_APIC_CD 0x0010 /* CPU has apic configured */ 174 175 #define CPUF_PRESENT 0x1000 /* CPU is present */ 176 #define CPUF_RUNNING 0x2000 /* CPU is running */ 177 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 178 #define CPUF_GO 0x8000 /* CPU should start running */ 179 180 /* 181 * We statically allocate the CPU info for the primary CPU (or, 182 * the only CPU on uniprocessors), and the primary CPU is the 183 * first CPU on the CPU info list. 184 */ 185 extern struct cpu_info cpu_info_primary; 186 extern struct cpu_info *cpu_info_list; 187 188 #define CPU_INFO_ITERATOR int 189 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 190 ci != NULL; ci = ci->ci_next 191 192 #if defined(MULTIPROCESSOR) 193 194 #define I386_MAXPROCS 32 /* because we use a bitmask */ 195 196 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 197 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 198 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 199 200 #define curcpu() ({struct cpu_info *ci; \ 201 asm volatile("movl %%fs:4,%0" : "=r" (ci)); \ 202 ci;}) 203 #define cpu_number() (curcpu()->ci_cpuid) 204 205 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 206 207 #if 0 208 #define i386_ipisend(ci) (((ci) != curcpu()) ? i386_send_ipi((ci),0) : 0) 209 #else 210 #define i386_ipisend(ci) 0 211 #endif 212 213 #define aston(ci) ((ci)->ci_astpending = 1, i386_ipisend(ci)) 214 215 extern struct cpu_info *cpu_info[I386_MAXPROCS]; 216 217 void cpu_boot_secondary_processors __P((void)); 218 void cpu_init_idle_pcbs __P((void)); 219 220 /* 221 * Preempt the current process if in interrupt from user mode, 222 * or after the current trap/syscall if in system mode. 223 */ 224 extern void need_resched __P((struct cpu_info *)); 225 226 #else /* !MULTIPROCESSOR */ 227 228 #define I386_MAXPROCS 1 229 230 #ifdef _KERNEL 231 extern struct cpu_info cpu_info_primary; 232 233 #define curcpu() (&cpu_info_primary) 234 #endif 235 236 /* 237 * definitions of cpu-dependent requirements 238 * referenced in generic code 239 */ 240 #define cpu_number() 0 241 242 /* 243 * Preempt the current process if in interrupt from user mode, 244 * or after the current trap/syscall if in system mode. 245 */ 246 #define need_resched(ci) \ 247 do { \ 248 struct cpu_info *__ci = (ci); \ 249 __ci->ci_want_resched = 1; \ 250 aston(__ci); \ 251 } while (0) 252 253 #define aston(ci) (curcpu()->ci_astpending = 1) 254 255 #endif 256 257 #define curpcb curcpu()->ci_curpcb 258 #define curproc curcpu()->ci_curproc 259 260 /* 261 * Arguments to hardclock, softclock and statclock 262 * encapsulate the previous machine state in an opaque 263 * clockframe; for now, use generic intrframe. 264 * 265 * Note: Since spllowersoftclock() does not actually unmask the currently 266 * running (hardclock) interrupt, CLKF_BASEPRI() *must* always be 0; otherwise 267 * we could stall hardclock ticks if another interrupt takes too long. 268 */ 269 #define clockframe intrframe 270 271 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_eflags) 272 #define CLKF_BASEPRI(frame) (0) 273 #define CLKF_PC(frame) ((frame)->if_eip) 274 #define CLKF_INTR(frame) ((frame)->if_ppl & (1 << IPL_TAGINTR)) 275 276 /* 277 * This is used during profiling to integrate system time. It can safely 278 * assume that the process is resident. 279 */ 280 #define PROC_PC(p) ((p)->p_md.md_regs->tf_eip) 281 282 /* 283 * Give a profiling tick to the current process when the user profiling 284 * buffer pages are invalid. On the i386, request an ast to send us 285 * through trap(), marking the proc as needing a profiling tick. 286 */ 287 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, aston(p->p_cpu)) 288 289 /* 290 * Notify the current process (p) that it has a signal pending, 291 * process as soon as possible. 292 */ 293 #define signotify(p) aston(p->p_cpu) 294 295 /* 296 * We need a machine-independent name for this. 297 */ 298 extern void (*delay_func) __P((int)); 299 struct timeval; 300 extern void (*microtime_func) __P((struct timeval *)); 301 302 #define DELAY(x) (*delay_func)(x) 303 #define delay(x) (*delay_func)(x) 304 #define microtime(tv) (*microtime_func)(tv) 305 306 /* 307 * pull in #defines for kinds of processors 308 */ 309 #include <machine/cputypes.h> 310 311 struct cpu_nocpuid_nameclass { 312 int cpu_vendor; 313 const char *cpu_vendorname; 314 const char *cpu_name; 315 int cpu_class; 316 void (*cpu_setup) __P((struct cpu_info *)); 317 void (*cpu_cacheinfo) __P((struct cpu_info *)); 318 void (*cpu_info) __P((struct cpu_info *)); 319 }; 320 321 322 struct cpu_cpuid_nameclass { 323 const char *cpu_id; 324 int cpu_vendor; 325 const char *cpu_vendorname; 326 struct cpu_cpuid_family { 327 int cpu_class; 328 const char *cpu_models[CPU_MAXMODEL+2]; 329 void (*cpu_setup) __P((struct cpu_info *)); 330 void (*cpu_probe) __P((struct cpu_info *)); 331 void (*cpu_info) __P((struct cpu_info *)); 332 } cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1]; 333 }; 334 335 #ifdef _KERNEL 336 extern int biosbasemem; 337 extern int biosextmem; 338 extern int cpu_feature; 339 extern int cpu; 340 extern int cpu_class; 341 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[]; 342 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[]; 343 344 extern int i386_use_fxsave; 345 extern int i386_has_sse; 346 extern int i386_has_sse2; 347 348 /* machdep.c */ 349 void dumpconf __P((void)); 350 void cpu_reset __P((void)); 351 void i386_init_pcb_tss_ldt __P((struct cpu_info *)); 352 void i386_proc0_tss_ldt_init __P((void)); 353 void i386_bufinit __P((void)); 354 355 /* locore.s */ 356 struct region_descriptor; 357 void lgdt __P((struct region_descriptor *)); 358 void fillw __P((short, void *, size_t)); 359 360 struct pcb; 361 void savectx __P((struct pcb *)); 362 void switch_exit __P((struct proc *)); 363 void proc_trampoline __P((void)); 364 365 /* clock.c */ 366 void initrtclock __P((void)); 367 void startrtclock __P((void)); 368 void i8254_delay __P((int)); 369 void i8254_microtime __P((struct timeval *)); 370 void i8254_initclocks __P((void)); 371 372 /* tsc_microtime.c */ 373 374 void tsc_microtime __P((struct timeval *)); 375 void tsc_microset __P((struct cpu_info *)); 376 377 /* cpu.c */ 378 379 void cpu_probe_features __P((struct cpu_info *)); 380 381 /* npx.c */ 382 void npxsave_proc __P((struct proc *, int)); 383 void npxsave_cpu __P((struct cpu_info *, int)); 384 385 /* vm_machdep.c */ 386 int kvtop __P((caddr_t)); 387 388 #if !defined(_LKM) 389 #include "opt_math_emulate.h" 390 #endif 391 #ifdef MATH_EMULATE 392 /* math_emulate.c */ 393 int math_emulate __P((struct trapframe *)); 394 #endif 395 396 #if !defined(_LKM) 397 #include "opt_user_ldt.h" 398 #endif 399 #ifdef USER_LDT 400 /* sys_machdep.h */ 401 int i386_get_ldt __P((struct proc *, void *, register_t *)); 402 int i386_set_ldt __P((struct proc *, void *, register_t *)); 403 #endif 404 405 /* isa_machdep.c */ 406 void isa_defaultirq __P((void)); 407 int isa_nmi __P((void)); 408 409 #if !defined(_LKM) 410 #include "opt_vm86.h" 411 #endif 412 #ifdef VM86 413 /* vm86.c */ 414 void vm86_gpfault __P((struct proc *, int)); 415 #endif /* VM86 */ 416 417 /* consinit.c */ 418 void kgdb_port_init __P((void)); 419 420 /* bus_machdep.c */ 421 void i386_bus_space_init __P((void)); 422 void i386_bus_space_mallocok __P((void)); 423 424 #endif /* _KERNEL */ 425 426 #include <machine/psl.h> 427 428 /* 429 * CTL_MACHDEP definitions. 430 */ 431 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 432 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 433 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 434 #define CPU_NKPDE 4 /* int: number of kernel PDEs */ 435 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 436 #define CPU_DISKINFO 6 /* struct disklist *: 437 * disk geometry information */ 438 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 439 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 440 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 441 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 442 #define CPU_TMLR_MODE 11 /* int: longrun mode 443 * 0: minimum frequency 444 * 1: economy 445 * 2: performance 446 * 3: maximum frequency 447 */ 448 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 449 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 450 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 451 #define CPU_MAXID 15 /* number of valid machdep ids */ 452 453 #define CTL_MACHDEP_NAMES { \ 454 { 0, 0 }, \ 455 { "console_device", CTLTYPE_STRUCT }, \ 456 { "biosbasemem", CTLTYPE_INT }, \ 457 { "biosextmem", CTLTYPE_INT }, \ 458 { "nkpde", CTLTYPE_INT }, \ 459 { "booted_kernel", CTLTYPE_STRING }, \ 460 { "diskinfo", CTLTYPE_STRUCT }, \ 461 { "fpu_present", CTLTYPE_INT }, \ 462 { "osfxsr", CTLTYPE_INT }, \ 463 { "sse", CTLTYPE_INT }, \ 464 { "sse2", CTLTYPE_INT }, \ 465 { "tm_longrun_mode", CTLTYPE_INT }, \ 466 { "tm_longrun_frequency", CTLTYPE_INT }, \ 467 { "tm_longrun_voltage", CTLTYPE_INT }, \ 468 { "tm_longrun_percentage", CTLTYPE_INT }, \ 469 } 470 471 472 /* 473 * Structure for CPU_DISKINFO sysctl call. 474 * XXX this should be somewhere else. 475 */ 476 #define MAX_BIOSDISKS 16 477 478 struct disklist { 479 int dl_nbiosdisks; /* number of bios disks */ 480 struct biosdisk_info { 481 int bi_dev; /* BIOS device # (0x80 ..) */ 482 int bi_cyl; /* cylinders on disk */ 483 int bi_head; /* heads per track */ 484 int bi_sec; /* sectors per track */ 485 u_int64_t bi_lbasecs; /* total sec. (iff ext13) */ 486 #define BIFLAG_INVALID 0x01 487 #define BIFLAG_EXTINT13 0x02 488 int bi_flags; 489 } dl_biosdisks[MAX_BIOSDISKS]; 490 491 int dl_nnativedisks; /* number of native disks */ 492 struct nativedisk_info { 493 char ni_devname[16]; /* native device name */ 494 int ni_nmatches; /* # of matches w/ BIOS */ 495 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 496 } dl_nativedisks[1]; /* actually longer */ 497 }; 498 499 #endif /* !_I386_CPU_H_ */ 500
Indexes created Fri Sep 26 08:10:20 GMT 2025