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intr.h revision 1.3 
      1 /*	$NetBSD: intr.h,v 1.3 1996/05/13 01:28:01 mycroft Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by Charles M. Hannum.
     17  * 4. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /* Interrupt priority `levels'; not mutually exclusive. */
     33 #define	IPL_BIO		0	/* block I/O */
     34 #define	IPL_NET		1	/* network */
     35 #define	IPL_TTY		2	/* terminal */
     36 #define	IPL_CLOCK	3	/* clock */
     37 #define	IPL_IMP		4	/* memory allocation */
     38 #define	IPL_NONE	5	/* nothing */
     39 #define	IPL_HIGH	6	/* everything */
     40 
     41 /* Interrupt sharing types. */
     42 #define	IST_NONE	0	/* none */
     43 #define	IST_PULSE	1	/* pulsed */
     44 #define	IST_EDGE	2	/* edge-triggered */
     45 #define	IST_LEVEL	3	/* level-triggered */
     46 
     47 /* Soft interrupt masks. */
     48 #define	SIR_CLOCK	31
     49 #define	SIR_CLOCKMASK	((1 << SIR_CLOCK))
     50 #define	SIR_NET		30
     51 #define	SIR_NETMASK	((1 << SIR_NET) | SIR_CLOCKMASK)
     52 #define	SIR_TTY		29
     53 #define	SIR_TTYMASK	((1 << SIR_TTY) | SIR_CLOCKMASK)
     54 #define	SIR_ALLMASK	(SIR_CLOCKMASK | SIR_NETMASK | SIR_TTYMASK)
     55 
     56 #ifndef _LOCORE
     57 
     58 volatile int cpl, ipending, astpending;
     59 int imask[5];
     60 
     61 extern void Xspllower __P((void));
     62 
     63 static __inline int splraise __P((int));
     64 static __inline int spllower __P((int));
     65 static __inline void splx __P((int));
     66 static __inline void softintr __P((int));
     67 
     68 /*
     69  * Add a mask to cpl, and return the old value of cpl.
     70  */
     71 static __inline int
     72 splraise(ncpl)
     73 	register int ncpl;
     74 {
     75 	register int ocpl = cpl;
     76 
     77 	cpl = ocpl | ncpl;
     78 	return (ocpl);
     79 }
     80 
     81 /*
     82  * Restore a value to cpl (unmasking interrupts).  If any unmasked
     83  * interrupts are pending, call Xspllower() to process them.
     84  */
     85 static __inline void
     86 splx(ncpl)
     87 	register int ncpl;
     88 {
     89 
     90 	cpl = ncpl;
     91 	if (ipending & ~ncpl)
     92 		Xspllower();
     93 }
     94 
     95 /*
     96  * Same as splx(), but we return the old value of spl, for the
     97  * benefit of some splsoftclock() callers.
     98  */
     99 static __inline int
    100 spllower(ncpl)
    101 	register int ncpl;
    102 {
    103 	register int ocpl = cpl;
    104 
    105 	cpl = ncpl;
    106 	if (ipending & ~ncpl)
    107 		Xspllower();
    108 	return (ocpl);
    109 }
    110 
    111 /*
    112  * Hardware interrupt masks
    113  */
    114 #define	splbio()	splraise(imask[IPL_BIO])
    115 #define	splnet()	splraise(imask[IPL_NET])
    116 #define	spltty()	splraise(imask[IPL_TTY])
    117 #define	splclock()	splraise(imask[IPL_CLOCK])
    118 #define	splimp()	splraise(imask[IPL_IMP])
    119 #define	splstatclock()	splclock()
    120 
    121 /*
    122  * Software interrupt masks
    123  *
    124  * NOTE: splsoftclock() is used by hardclock() to lower the priority from
    125  * clock to softclock before it calls softclock().
    126  */
    127 #define	splsoftclock()	spllower(SIR_CLOCKMASK)
    128 #define	splsoftnet()	splraise(SIR_NETMASK)
    129 #define	splsofttty()	splraise(SIR_TTYMASK)
    130 
    131 /*
    132  * Miscellaneous
    133  */
    134 #define	splhigh()	splraise(-1)
    135 #define	spl0()		spllower(0)
    136 
    137 /*
    138  * Software interrupt registration
    139  *
    140  * We hand-code this to ensure that it's atomic.
    141  */
    142 static __inline void
    143 softintr(mask)
    144 	register int mask;
    145 {
    146 
    147 	__asm __volatile("orl %0,_ipending" : : "ir" (mask));
    148 }
    149 
    150 #define	setsoftast()	(astpending = 1)
    151 #define	setsoftclock()	softintr(1 << SIR_CLOCK)
    152 #define	setsoftnet()	softintr(1 << SIR_NET)
    153 #define	setsofttty()	softintr(1 << SIR_TTY)
    154 
    155 #endif /* !_LOCORE */
    156 #endif /* _KERNEL */
    157