intr.h revision 1.9 1 /* $NetBSD: intr.h,v 1.9 1998/08/15 05:10:24 mycroft Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _I386_INTR_H_
40 #define _I386_INTR_H_
41
42 /* Interrupt priority `levels'. */
43 #define IPL_NONE 9 /* nothing */
44 #define IPL_SOFTCLOCK 8 /* timeouts */
45 #define IPL_SOFTNET 7 /* protocol stacks */
46 #define IPL_BIO 6 /* block I/O */
47 #define IPL_NET 5 /* network */
48 #define IPL_SOFTSERIAL 4 /* serial */
49 #define IPL_TTY 3 /* terminal */
50 #define IPL_IMP 3 /* memory allocation */
51 #define IPL_AUDIO 2 /* audio */
52 #define IPL_CLOCK 1 /* clock */
53 #define IPL_HIGH 1 /* everything */
54 #define IPL_SERIAL 0 /* serial */
55 #define NIPL 10
56
57 /* Interrupt sharing types. */
58 #define IST_NONE 0 /* none */
59 #define IST_PULSE 1 /* pulsed */
60 #define IST_EDGE 2 /* edge-triggered */
61 #define IST_LEVEL 3 /* level-triggered */
62
63 /* Soft interrupt masks. */
64 #define SIR_CLOCK 31
65 #define SIR_NET 30
66 #define SIR_SERIAL 29
67
68 #ifndef _LOCORE
69
70 volatile int cpl, ipending, astpending;
71 int imask[NIPL];
72
73 extern void Xspllower __P((void));
74
75 static __inline int splraise __P((int));
76 static __inline int spllower __P((int));
77 static __inline void splx __P((int));
78 static __inline void softintr __P((int));
79
80 /*
81 * Add a mask to cpl, and return the old value of cpl.
82 */
83 static __inline int
84 splraise(ncpl)
85 register int ncpl;
86 {
87 register int ocpl = cpl;
88
89 cpl = ocpl | ncpl;
90 return (ocpl);
91 }
92
93 /*
94 * Restore a value to cpl (unmasking interrupts). If any unmasked
95 * interrupts are pending, call Xspllower() to process them.
96 */
97 static __inline void
98 splx(ncpl)
99 register int ncpl;
100 {
101
102 cpl = ncpl;
103 if (ipending & ~ncpl)
104 Xspllower();
105 }
106
107 /*
108 * Same as splx(), but we return the old value of spl, for the
109 * benefit of some splsoftclock() callers.
110 */
111 static __inline int
112 spllower(ncpl)
113 register int ncpl;
114 {
115 register int ocpl = cpl;
116
117 cpl = ncpl;
118 if (ipending & ~ncpl)
119 Xspllower();
120 return (ocpl);
121 }
122
123 /*
124 * Hardware interrupt masks
125 */
126 #define splbio() splraise(imask[IPL_BIO])
127 #define splnet() splraise(imask[IPL_NET])
128 #define spltty() splraise(imask[IPL_TTY])
129 #define splaudio() splraise(imask[IPL_AUDIO])
130 #define splclock() splraise(imask[IPL_CLOCK])
131 #define splstatclock() splclock()
132 #define splserial() splraise(imask[IPL_SERIAL])
133
134 #define spllpt() spltty()
135
136 /*
137 * Software interrupt masks
138 *
139 * NOTE: splsoftclock() is used by hardclock() to lower the priority from
140 * clock to softclock before it calls softclock().
141 */
142 #define splsoftclock() spllower(imask[IPL_SOFTCLOCK])
143 #define splsoftnet() splraise(imask[IPL_SOFTNET])
144 #define splsoftserial() splraise(imask[IPL_SOFTSERIAL])
145
146 /*
147 * Miscellaneous
148 */
149 #define splimp() splraise(imask[IPL_IMP])
150 #define splhigh() splraise(imask[IPL_HIGH])
151 #define spl0() spllower(0)
152
153 /*
154 * Software interrupt registration
155 *
156 * We hand-code this to ensure that it's atomic.
157 */
158 static __inline void
159 softintr(mask)
160 register int mask;
161 {
162
163 __asm __volatile("orl %0,_ipending" : : "ir" (1 << mask));
164 }
165
166 #define setsoftast() (astpending = 1)
167 #define setsoftclock() softintr(SIR_CLOCK)
168 #define setsoftnet() softintr(SIR_NET)
169 #define setsoftserial() softintr(SIR_SERIAL)
170
171 #endif /* !_LOCORE */
172
173 #endif /* !_I386_INTR_H_ */
174