pmap.h revision 1.97.6.2 1 1.97.6.2 bouyer /* $NetBSD: pmap.h,v 1.97.6.2 2008/01/13 11:26:57 bouyer Exp $ */
2 1.38 mycroft
3 1.40 thorpej /*
4 1.40 thorpej *
5 1.40 thorpej * Copyright (c) 1997 Charles D. Cranor and Washington University.
6 1.38 mycroft * All rights reserved.
7 1.38 mycroft *
8 1.38 mycroft * Redistribution and use in source and binary forms, with or without
9 1.38 mycroft * modification, are permitted provided that the following conditions
10 1.38 mycroft * are met:
11 1.38 mycroft * 1. Redistributions of source code must retain the above copyright
12 1.38 mycroft * notice, this list of conditions and the following disclaimer.
13 1.38 mycroft * 2. Redistributions in binary form must reproduce the above copyright
14 1.38 mycroft * notice, this list of conditions and the following disclaimer in the
15 1.38 mycroft * documentation and/or other materials provided with the distribution.
16 1.38 mycroft * 3. All advertising materials mentioning features or use of this software
17 1.40 thorpej * must display the following acknowledgment:
18 1.40 thorpej * This product includes software developed by Charles D. Cranor and
19 1.40 thorpej * Washington University.
20 1.40 thorpej * 4. The name of the author may not be used to endorse or promote products
21 1.40 thorpej * derived from this software without specific prior written permission.
22 1.1 cgd *
23 1.40 thorpej * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 1.40 thorpej * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 1.40 thorpej * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 1.40 thorpej * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 1.40 thorpej * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 1.40 thorpej * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 1.40 thorpej * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 1.40 thorpej * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 1.40 thorpej * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 1.40 thorpej * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 1.1 cgd */
34 1.1 cgd
35 1.1 cgd /*
36 1.94 yamt * Copyright (c) 2001 Wasabi Systems, Inc.
37 1.94 yamt * All rights reserved.
38 1.94 yamt *
39 1.94 yamt * Written by Frank van der Linden for Wasabi Systems, Inc.
40 1.94 yamt *
41 1.94 yamt * Redistribution and use in source and binary forms, with or without
42 1.94 yamt * modification, are permitted provided that the following conditions
43 1.94 yamt * are met:
44 1.94 yamt * 1. Redistributions of source code must retain the above copyright
45 1.94 yamt * notice, this list of conditions and the following disclaimer.
46 1.94 yamt * 2. Redistributions in binary form must reproduce the above copyright
47 1.94 yamt * notice, this list of conditions and the following disclaimer in the
48 1.94 yamt * documentation and/or other materials provided with the distribution.
49 1.94 yamt * 3. All advertising materials mentioning features or use of this software
50 1.94 yamt * must display the following acknowledgement:
51 1.94 yamt * This product includes software developed for the NetBSD Project by
52 1.94 yamt * Wasabi Systems, Inc.
53 1.94 yamt * 4. The name of Wasabi Systems, Inc. may not be used to endorse
54 1.94 yamt * or promote products derived from this software without specific prior
55 1.94 yamt * written permission.
56 1.94 yamt *
57 1.94 yamt * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
58 1.94 yamt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
59 1.94 yamt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
60 1.94 yamt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
61 1.94 yamt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 1.94 yamt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 1.94 yamt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 1.94 yamt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 1.94 yamt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 1.94 yamt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 1.94 yamt * POSSIBILITY OF SUCH DAMAGE.
68 1.1 cgd */
69 1.34 mrg
70 1.40 thorpej #ifndef _I386_PMAP_H_
71 1.40 thorpej #define _I386_PMAP_H_
72 1.40 thorpej
73 1.58 mrg #if defined(_KERNEL_OPT)
74 1.39 thorpej #include "opt_user_ldt.h"
75 1.97.6.1 bouyer #include "opt_xen.h"
76 1.34 mrg #endif
77 1.1 cgd
78 1.96 ad #include <sys/atomic.h>
79 1.96 ad
80 1.6 mycroft #include <machine/pte.h>
81 1.39 thorpej #include <machine/segments.h>
82 1.92 ad #if defined(_KERNEL)
83 1.91 ad #include <machine/cpufunc.h>
84 1.91 ad #endif
85 1.90 ad
86 1.40 thorpej #include <uvm/uvm_object.h>
87 1.97.6.1 bouyer #ifdef XEN
88 1.97.6.1 bouyer #include <xen/xenfunc.h>
89 1.97.6.1 bouyer #include <xen/xenpmap.h>
90 1.97.6.1 bouyer #endif /* XEN */
91 1.1 cgd
92 1.1 cgd /*
93 1.40 thorpej * see pte.h for a description of i386 MMU terminology and hardware
94 1.40 thorpej * interface.
95 1.40 thorpej *
96 1.40 thorpej * a pmap describes a processes' 4GB virtual address space. this
97 1.40 thorpej * virtual address space can be broken up into 1024 4MB regions which
98 1.41 chs * are described by PDEs in the PDP. the PDEs are defined as follows:
99 1.40 thorpej *
100 1.40 thorpej * (ranges are inclusive -> exclusive, just like vm_map_entry start/end)
101 1.43 thorpej * (the following assumes that KERNBASE is 0xc0000000)
102 1.40 thorpej *
103 1.40 thorpej * PDE#s VA range usage
104 1.68 drochner * 0->766 0x0 -> 0xbfc00000 user address space
105 1.61 yamt * 767 0xbfc00000-> recursive mapping of PDP (used for
106 1.43 thorpej * 0xc0000000 linear mapping of PTPs)
107 1.43 thorpej * 768->1023 0xc0000000-> kernel address space (constant
108 1.40 thorpej * 0xffc00000 across all pmap's/processes)
109 1.40 thorpej * 1023 0xffc00000-> "alternate" recursive PDP mapping
110 1.40 thorpej * <end> (for other pmaps)
111 1.40 thorpej *
112 1.40 thorpej *
113 1.40 thorpej * note: a recursive PDP mapping provides a way to map all the PTEs for
114 1.41 chs * a 4GB address space into a linear chunk of virtual memory. in other
115 1.41 chs * words, the PTE for page 0 is the first int mapped into the 4MB recursive
116 1.41 chs * area. the PTE for page 1 is the second int. the very last int in the
117 1.81 junyoung * 4MB range is the PTE that maps VA 0xfffff000 (the last page in a 4GB
118 1.40 thorpej * address).
119 1.40 thorpej *
120 1.43 thorpej * all pmap's PD's must have the same values in slots 768->1023 so that
121 1.41 chs * the kernel is always mapped in every process. these values are loaded
122 1.40 thorpej * into the PD at pmap creation time.
123 1.40 thorpej *
124 1.41 chs * at any one time only one pmap can be active on a processor. this is
125 1.41 chs * the pmap whose PDP is pointed to by processor register %cr3. this pmap
126 1.40 thorpej * will have all its PTEs mapped into memory at the recursive mapping
127 1.43 thorpej * point (slot #767 as show above). when the pmap code wants to find the
128 1.40 thorpej * PTE for a virtual address, all it has to do is the following:
129 1.40 thorpej *
130 1.71 thorpej * address of PTE = (767 * 4MB) + (VA / PAGE_SIZE) * sizeof(pt_entry_t)
131 1.43 thorpej * = 0xbfc00000 + (VA / 4096) * 4
132 1.40 thorpej *
133 1.40 thorpej * what happens if the pmap layer is asked to perform an operation
134 1.41 chs * on a pmap that is not the one which is currently active? in that
135 1.41 chs * case we take the PA of the PDP of non-active pmap and put it in
136 1.41 chs * slot 1023 of the active pmap. this causes the non-active pmap's
137 1.40 thorpej * PTEs to get mapped in the final 4MB of the 4GB address space
138 1.40 thorpej * (e.g. starting at 0xffc00000).
139 1.40 thorpej *
140 1.40 thorpej * the following figure shows the effects of the recursive PDP mapping:
141 1.40 thorpej *
142 1.40 thorpej * PDP (%cr3)
143 1.40 thorpej * +----+
144 1.40 thorpej * | 0| -> PTP#0 that maps VA 0x0 -> 0x400000
145 1.40 thorpej * | |
146 1.40 thorpej * | |
147 1.43 thorpej * | 767| -> points back to PDP (%cr3) mapping VA 0xbfc00000 -> 0xc0000000
148 1.83 junyoung * | 768| -> first kernel PTP (maps 0xc0000000 -> 0xc0400000)
149 1.40 thorpej * | |
150 1.40 thorpej * |1023| -> points to alternate pmap's PDP (maps 0xffc00000 -> end)
151 1.40 thorpej * +----+
152 1.40 thorpej *
153 1.43 thorpej * note that the PDE#767 VA (0xbfc00000) is defined as "PTE_BASE"
154 1.40 thorpej * note that the PDE#1023 VA (0xffc00000) is defined as "APTE_BASE"
155 1.40 thorpej *
156 1.43 thorpej * starting at VA 0xbfc00000 the current active PDP (%cr3) acts as a
157 1.40 thorpej * PTP:
158 1.40 thorpej *
159 1.43 thorpej * PTP#767 == PDP(%cr3) => maps VA 0xbfc00000 -> 0xc0000000
160 1.40 thorpej * +----+
161 1.43 thorpej * | 0| -> maps the contents of PTP#0 at VA 0xbfc00000->0xbfc01000
162 1.40 thorpej * | |
163 1.40 thorpej * | |
164 1.81 junyoung * | 767| -> maps contents of PTP#767 (the PDP) at VA 0xbfeff000
165 1.43 thorpej * | 768| -> maps contents of first kernel PTP
166 1.40 thorpej * | |
167 1.40 thorpej * |1023|
168 1.40 thorpej * +----+
169 1.40 thorpej *
170 1.81 junyoung * note that mapping of the PDP at PTP#767's VA (0xbfeff000) is
171 1.40 thorpej * defined as "PDP_BASE".... within that mapping there are two
172 1.41 chs * defines:
173 1.59 chs * "PDP_PDE" (0xbfeffbfc) is the VA of the PDE in the PDP
174 1.41 chs * which points back to itself.
175 1.59 chs * "APDP_PDE" (0xbfeffffc) is the VA of the PDE in the PDP which
176 1.40 thorpej * establishes the recursive mapping of the alternate pmap.
177 1.40 thorpej * to set the alternate PDP, one just has to put the correct
178 1.40 thorpej * PA info in *APDP_PDE.
179 1.40 thorpej *
180 1.41 chs * note that in the APTE_BASE space, the APDP appears at VA
181 1.40 thorpej * "APDP_BASE" (0xfffff000).
182 1.1 cgd */
183 1.65 fvdl /* XXX MP should we allocate one APDP_PDE per processor?? */
184 1.33 mrg
185 1.33 mrg /*
186 1.94 yamt * Mask to get rid of the sign-extended part of addresses.
187 1.94 yamt */
188 1.94 yamt #define VA_SIGN_MASK 0
189 1.94 yamt #define VA_SIGN_NEG(va) ((va) | VA_SIGN_MASK)
190 1.94 yamt /*
191 1.94 yamt * XXXfvdl this one's not right.
192 1.94 yamt */
193 1.94 yamt #define VA_SIGN_POS(va) ((va) & ~VA_SIGN_MASK)
194 1.94 yamt
195 1.94 yamt /*
196 1.40 thorpej * the following defines identify the slots used as described above.
197 1.33 mrg */
198 1.33 mrg
199 1.94 yamt #define L2_SLOT_PTE (KERNBASE/NBPD_L2-1) /* 767: for recursive PDP map */
200 1.94 yamt #define L2_SLOT_KERN (KERNBASE/NBPD_L2) /* 768: start of kernel space */
201 1.94 yamt #define L2_SLOT_KERNBASE L2_SLOT_KERN
202 1.97.6.1 bouyer #ifndef XEN
203 1.94 yamt #define L2_SLOT_APTE 1023 /* 1023: alternative recursive slot */
204 1.97.6.1 bouyer #else
205 1.97.6.1 bouyer #define L2_SLOT_APTE 1007 /* 1008-1023 reserved by Xen */
206 1.97.6.1 bouyer #endif
207 1.97.6.1 bouyer
208 1.94 yamt
209 1.94 yamt #define PDIR_SLOT_KERN L2_SLOT_KERN
210 1.94 yamt #define PDIR_SLOT_PTE L2_SLOT_PTE
211 1.94 yamt #define PDIR_SLOT_APTE L2_SLOT_APTE
212 1.1 cgd
213 1.1 cgd /*
214 1.41 chs * the following defines give the virtual addresses of various MMU
215 1.40 thorpej * data structures:
216 1.40 thorpej * PTE_BASE and APTE_BASE: the base VA of the linear PTE mappings
217 1.81 junyoung * PDP_BASE and APDP_BASE: the base VA of the recursive mapping of the PDP
218 1.40 thorpej * PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP
219 1.1 cgd */
220 1.29 fvdl
221 1.94 yamt #define PTE_BASE ((pt_entry_t *) (L2_SLOT_PTE * NBPD_L2))
222 1.94 yamt #define APTE_BASE ((pt_entry_t *) (VA_SIGN_NEG((L2_SLOT_APTE * NBPD_L2))))
223 1.40 thorpej
224 1.94 yamt #define L1_BASE PTE_BASE
225 1.94 yamt #define AL1_BASE APTE_BASE
226 1.40 thorpej
227 1.94 yamt #define L2_BASE ((pd_entry_t *)((char *)L1_BASE + L2_SLOT_PTE * NBPD_L1))
228 1.40 thorpej
229 1.94 yamt #define AL2_BASE ((pd_entry_t *)((char *)AL1_BASE + L2_SLOT_PTE * NBPD_L1))
230 1.40 thorpej
231 1.94 yamt #define PDP_PDE (L2_BASE + PDIR_SLOT_PTE)
232 1.94 yamt #define APDP_PDE (L2_BASE + PDIR_SLOT_APTE)
233 1.40 thorpej
234 1.94 yamt #define PDP_BASE L2_BASE
235 1.94 yamt #define APDP_BASE AL2_BASE
236 1.1 cgd
237 1.94 yamt /* largest value (-1 for APTP space) */
238 1.94 yamt #define NKL2_MAX_ENTRIES (NTOPLEVEL_PDES - (KERNBASE/NBPD_L2) - 1)
239 1.94 yamt #define NKL1_MAX_ENTRIES (unsigned long)(NKL2_MAX_ENTRIES * NPDPG)
240 1.39 thorpej
241 1.94 yamt #define NKL2_KIMG_ENTRIES 0 /* XXX unused */
242 1.40 thorpej
243 1.94 yamt #define NKL2_START_ENTRIES 0 /* XXX computed on runtime */
244 1.94 yamt #define NKL1_START_ENTRIES 0 /* XXX unused */
245 1.11 mycroft
246 1.94 yamt #define NTOPLEVEL_PDES (PAGE_SIZE / (sizeof (pd_entry_t)))
247 1.11 mycroft
248 1.94 yamt #define NPDPG (PAGE_SIZE / sizeof (pd_entry_t))
249 1.1 cgd
250 1.94 yamt #define PTP_MASK_INITIALIZER { L1_FRAME, L2_FRAME }
251 1.94 yamt #define PTP_SHIFT_INITIALIZER { L1_SHIFT, L2_SHIFT }
252 1.94 yamt #define NKPTP_INITIALIZER { NKL1_START_ENTRIES, NKL2_START_ENTRIES }
253 1.94 yamt #define NKPTPMAX_INITIALIZER { NKL1_MAX_ENTRIES, NKL2_MAX_ENTRIES }
254 1.94 yamt #define NBPD_INITIALIZER { NBPD_L1, NBPD_L2 }
255 1.94 yamt #define PDES_INITIALIZER { L2_BASE }
256 1.94 yamt #define APDES_INITIALIZER { AL2_BASE }
257 1.40 thorpej
258 1.94 yamt #define PTP_LEVELS 2
259 1.40 thorpej
260 1.40 thorpej /*
261 1.94 yamt * PG_AVAIL usage: we make use of the ignored bits of the PTE
262 1.11 mycroft */
263 1.1 cgd
264 1.94 yamt #define PG_W PG_AVAIL1 /* "wired" mapping */
265 1.94 yamt #define PG_PVLIST PG_AVAIL2 /* mapping has entry on pvlist */
266 1.94 yamt #define PG_X PG_AVAIL3 /* executable mapping */
267 1.40 thorpej
268 1.40 thorpej /*
269 1.94 yamt * Number of PTE's per cache line. 4 byte pte, 32-byte cache line
270 1.94 yamt * Used to avoid false sharing of cache lines.
271 1.40 thorpej */
272 1.97.6.2 bouyer #ifdef PAE
273 1.97.6.2 bouyer #define NPTECL 4
274 1.97.6.2 bouyer #else
275 1.94 yamt #define NPTECL 8
276 1.97.6.2 bouyer #endif
277 1.70 fvdl
278 1.97.6.1 bouyer #include <x86/pmap.h>
279 1.97.6.1 bouyer
280 1.97.6.1 bouyer #ifndef XEN
281 1.95 bouyer #define pmap_pa2pte(a) (a)
282 1.95 bouyer #define pmap_pte2pa(a) ((a) & PG_FRAME)
283 1.95 bouyer #define pmap_pte_set(p, n) do { *(p) = (n); } while (0)
284 1.96 ad #define pmap_pte_testset(p, n) \
285 1.96 ad atomic_swap_ulong((volatile unsigned long *)p, n)
286 1.96 ad #define pmap_pte_setbits(p, b) \
287 1.96 ad atomic_or_ulong((volatile unsigned long *)p, b)
288 1.96 ad #define pmap_pte_clearbits(p, b) \
289 1.96 ad atomic_and_ulong((volatile unsigned long *)p, ~(b))
290 1.95 bouyer #define pmap_pte_flush() /* nothing */
291 1.97.6.1 bouyer #else
292 1.97.6.1 bouyer static __inline pt_entry_t
293 1.97.6.1 bouyer pmap_pa2pte(paddr_t pa)
294 1.97.6.1 bouyer {
295 1.97.6.1 bouyer return (pt_entry_t)xpmap_ptom_masked(pa);
296 1.97.6.1 bouyer }
297 1.97.6.1 bouyer
298 1.97.6.1 bouyer static __inline paddr_t
299 1.97.6.1 bouyer pmap_pte2pa(pt_entry_t pte)
300 1.97.6.1 bouyer {
301 1.97.6.1 bouyer return xpmap_mtop_masked(pte & PG_FRAME);
302 1.97.6.1 bouyer }
303 1.97.6.1 bouyer static __inline void
304 1.97.6.1 bouyer pmap_pte_set(pt_entry_t *pte, pt_entry_t npte)
305 1.97.6.1 bouyer {
306 1.97.6.1 bouyer int s = splvm();
307 1.97.6.2 bouyer xpq_queue_pte_update(xpmap_ptetomach(pte), npte);
308 1.97.6.1 bouyer splx(s);
309 1.97.6.1 bouyer }
310 1.97.6.1 bouyer
311 1.97.6.1 bouyer static __inline pt_entry_t
312 1.97.6.1 bouyer pmap_pte_testset(volatile pt_entry_t *pte, pt_entry_t npte)
313 1.97.6.1 bouyer {
314 1.97.6.1 bouyer int s = splvm();
315 1.97.6.1 bouyer pt_entry_t opte = *pte;
316 1.97.6.2 bouyer xpq_queue_pte_update(xpmap_ptetomach(__UNVOLATILE(pte)),
317 1.97.6.1 bouyer npte);
318 1.97.6.1 bouyer xpq_flush_queue();
319 1.97.6.1 bouyer splx(s);
320 1.97.6.1 bouyer return opte;
321 1.97.6.1 bouyer }
322 1.97.6.1 bouyer
323 1.97.6.1 bouyer static __inline void
324 1.97.6.1 bouyer pmap_pte_setbits(volatile pt_entry_t *pte, pt_entry_t bits)
325 1.97.6.1 bouyer {
326 1.97.6.1 bouyer int s = splvm();
327 1.97.6.2 bouyer xpq_queue_pte_update(xpmap_ptetomach(__UNVOLATILE(pte)), (*pte) | bits);
328 1.97.6.1 bouyer xpq_flush_queue();
329 1.97.6.1 bouyer splx(s);
330 1.97.6.1 bouyer }
331 1.97.6.1 bouyer
332 1.97.6.1 bouyer static __inline void
333 1.97.6.1 bouyer pmap_pte_clearbits(volatile pt_entry_t *pte, pt_entry_t bits)
334 1.97.6.1 bouyer {
335 1.97.6.1 bouyer int s = splvm();
336 1.97.6.2 bouyer xpq_queue_pte_update(xpmap_ptetomach(__UNVOLATILE(pte)),
337 1.97.6.1 bouyer (*pte) & ~bits);
338 1.97.6.1 bouyer xpq_flush_queue();
339 1.97.6.1 bouyer splx(s);
340 1.97.6.1 bouyer }
341 1.97.6.1 bouyer
342 1.97.6.1 bouyer static __inline void
343 1.97.6.1 bouyer pmap_pte_flush(void)
344 1.97.6.1 bouyer {
345 1.97.6.1 bouyer int s = splvm();
346 1.97.6.1 bouyer xpq_flush_queue();
347 1.97.6.1 bouyer splx(s);
348 1.97.6.1 bouyer }
349 1.97.6.1 bouyer #endif
350 1.73 thorpej
351 1.94 yamt struct trapframe;
352 1.1 cgd
353 1.94 yamt int pmap_exec_fixup(struct vm_map *, struct trapframe *, struct pcb *);
354 1.94 yamt void pmap_ldt_cleanup(struct lwp *);
355 1.90 ad
356 1.97.6.1 bouyer #ifdef XEN
357 1.97.6.1 bouyer #define NKPTP_MIN 4 /* smallest value we allow */
358 1.97.6.1 bouyer #define NKPTP_MAX 4
359 1.97.6.1 bouyer #endif /* XXX has to die ! */
360 1.97.6.1 bouyer
361 1.97.6.1 bouyer
362 1.40 thorpej #endif /* _I386_PMAP_H_ */
363