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pmap.h revision 1.43.2.5
      1 /*	$NetBSD: pmap.h,v 1.43.2.5 2000/09/06 03:28:35 sommerfeld Exp $	*/
      2 
      3 /*
      4  *
      5  * Copyright (c) 1997 Charles D. Cranor and Washington University.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgment:
     18  *      This product includes software developed by Charles D. Cranor and
     19  *      Washington University.
     20  * 4. The name of the author may not be used to endorse or promote products
     21  *    derived from this software without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 /*
     36  * pmap.h: see pmap.c for the history of this pmap module.
     37  */
     38 
     39 #ifndef	_I386_PMAP_H_
     40 #define	_I386_PMAP_H_
     41 
     42 #if defined(_KERNEL) && !defined(_LKM)
     43 #include "opt_user_ldt.h"
     44 #endif
     45 
     46 #include <machine/cpufunc.h>
     47 #include <machine/pte.h>
     48 #include <machine/segments.h>
     49 #include <uvm/uvm_object.h>
     50 
     51 /*
     52  * see pte.h for a description of i386 MMU terminology and hardware
     53  * interface.
     54  *
     55  * a pmap describes a processes' 4GB virtual address space.  this
     56  * virtual address space can be broken up into 1024 4MB regions which
     57  * are described by PDEs in the PDP.  the PDEs are defined as follows:
     58  *
     59  * (ranges are inclusive -> exclusive, just like vm_map_entry start/end)
     60  * (the following assumes that KERNBASE is 0xc0000000)
     61  *
     62  * PDE#s	VA range		usage
     63  * 0->766	0x0 -> 0xbfc00000	user address space, note that the
     64  *					max user address is 0xbfbfe000
     65  *					the final two pages in the last 4MB
     66  *					used to be reserved for the UAREA
     67  *					but now are no longer used
     68  * 767		0xbfc00000->		recursive mapping of PDP (used for
     69  *			0xc0000000	linear mapping of PTPs)
     70  * 768->1023	0xc0000000->		kernel address space (constant
     71  *			0xffc00000	across all pmap's/processes)
     72  * 1023		0xffc00000->		"alternate" recursive PDP mapping
     73  *			<end>		(for other pmaps)
     74  *
     75  *
     76  * note: a recursive PDP mapping provides a way to map all the PTEs for
     77  * a 4GB address space into a linear chunk of virtual memory.  in other
     78  * words, the PTE for page 0 is the first int mapped into the 4MB recursive
     79  * area.  the PTE for page 1 is the second int.  the very last int in the
     80  * 4MB range is the PTE that maps VA 0xffffe000 (the last page in a 4GB
     81  * address).
     82  *
     83  * all pmap's PD's must have the same values in slots 768->1023 so that
     84  * the kernel is always mapped in every process.  these values are loaded
     85  * into the PD at pmap creation time.
     86  *
     87  * at any one time only one pmap can be active on a processor.  this is
     88  * the pmap whose PDP is pointed to by processor register %cr3.  this pmap
     89  * will have all its PTEs mapped into memory at the recursive mapping
     90  * point (slot #767 as show above).  when the pmap code wants to find the
     91  * PTE for a virtual address, all it has to do is the following:
     92  *
     93  * address of PTE = (767 * 4MB) + (VA / NBPG) * sizeof(pt_entry_t)
     94  *                = 0xbfc00000 + (VA / 4096) * 4
     95  *
     96  * what happens if the pmap layer is asked to perform an operation
     97  * on a pmap that is not the one which is currently active?  in that
     98  * case we take the PA of the PDP of non-active pmap and put it in
     99  * slot 1023 of the active pmap.  this causes the non-active pmap's
    100  * PTEs to get mapped in the final 4MB of the 4GB address space
    101  * (e.g. starting at 0xffc00000).
    102  *
    103  * the following figure shows the effects of the recursive PDP mapping:
    104  *
    105  *   PDP (%cr3)
    106  *   +----+
    107  *   |   0| -> PTP#0 that maps VA 0x0 -> 0x400000
    108  *   |    |
    109  *   |    |
    110  *   | 767| -> points back to PDP (%cr3) mapping VA 0xbfc00000 -> 0xc0000000
    111  *   | 768| -> first kernel PTP (maps 0xc0000000 -> 0xf0400000)
    112  *   |    |
    113  *   |1023| -> points to alternate pmap's PDP (maps 0xffc00000 -> end)
    114  *   +----+
    115  *
    116  * note that the PDE#767 VA (0xbfc00000) is defined as "PTE_BASE"
    117  * note that the PDE#1023 VA (0xffc00000) is defined as "APTE_BASE"
    118  *
    119  * starting at VA 0xbfc00000 the current active PDP (%cr3) acts as a
    120  * PTP:
    121  *
    122  * PTP#767 == PDP(%cr3) => maps VA 0xbfc00000 -> 0xc0000000
    123  *   +----+
    124  *   |   0| -> maps the contents of PTP#0 at VA 0xbfc00000->0xbfc01000
    125  *   |    |
    126  *   |    |
    127  *   | 767| -> maps contents of PTP#767 (the PDP) at VA 0xbffbf000
    128  *   | 768| -> maps contents of first kernel PTP
    129  *   |    |
    130  *   |1023|
    131  *   +----+
    132  *
    133  * note that mapping of the PDP at PTP#959's VA (0xeffbf000) is
    134  * defined as "PDP_BASE".... within that mapping there are two
    135  * defines:
    136  *   "PDP_PDE" (0xeffbfefc) is the VA of the PDE in the PDP
    137  *      which points back to itself.
    138  *   "APDP_PDE" (0xeffbfffc) is the VA of the PDE in the PDP which
    139  *      establishes the recursive mapping of the alternate pmap.
    140  *      to set the alternate PDP, one just has to put the correct
    141  *	PA info in *APDP_PDE.
    142  *
    143  * note that in the APTE_BASE space, the APDP appears at VA
    144  * "APDP_BASE" (0xfffff000).
    145  */
    146 /* XXX MP should we allocate one APDP_PDE per processor?? */
    147 
    148 /*
    149  * the following defines identify the slots used as described above.
    150  */
    151 
    152 #define PDSLOT_PTE	((KERNBASE/NBPD)-1) /* 767: for recursive PDP map */
    153 #define PDSLOT_KERN	(KERNBASE/NBPD)	    /* 768: start of kernel space */
    154 #define PDSLOT_APTE	((unsigned)1023) /* 1023: alternative recursive slot */
    155 
    156 /*
    157  * the following defines give the virtual addresses of various MMU
    158  * data structures:
    159  * PTE_BASE and APTE_BASE: the base VA of the linear PTE mappings
    160  * PTD_BASE and APTD_BASE: the base VA of the recursive mapping of the PTD
    161  * PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP
    162  */
    163 
    164 #define PTE_BASE	((pt_entry_t *)  (PDSLOT_PTE * NBPD) )
    165 #define APTE_BASE	((pt_entry_t *)  (PDSLOT_APTE * NBPD) )
    166 #define PDP_BASE ((pd_entry_t *)(((char *)PTE_BASE) + (PDSLOT_PTE * NBPG)))
    167 #define APDP_BASE ((pd_entry_t *)(((char *)APTE_BASE) + (PDSLOT_APTE * NBPG)))
    168 #define PDP_PDE		(PDP_BASE + PDSLOT_PTE)
    169 #define APDP_PDE	(PDP_BASE + PDSLOT_APTE)
    170 
    171 /*
    172  * XXXCDC: tmp xlate from old names:
    173  * PTDPTDI -> PDSLOT_PTE
    174  * KPTDI -> PDSLOT_KERN
    175  * APTDPTDI -> PDSLOT_APTE
    176  */
    177 
    178 /*
    179  * the follow define determines how many PTPs should be set up for the
    180  * kernel by locore.s at boot time.  this should be large enough to
    181  * get the VM system running.  once the VM system is running, the
    182  * pmap module can add more PTPs to the kernel area on demand.
    183  */
    184 
    185 #ifndef NKPTP
    186 #define NKPTP		4	/* 16MB to start */
    187 #endif
    188 #define NKPTP_MIN	4	/* smallest value we allow */
    189 #define NKPTP_MAX	(1024 - (KERNBASE/NBPD) - 1)
    190 				/* largest value (-1 for APTP space) */
    191 
    192 /*
    193  * various address macros
    194  *
    195  *  vtopte: return a pointer to the PTE mapping a VA
    196  *  kvtopte: same as above (takes a KVA, but doesn't matter with this pmap)
    197  *  ptetov: given a pointer to a PTE, return the VA that it maps
    198  *  vtophys: translate a VA to the PA mapped to it
    199  *
    200  * plus alternative versions of the above
    201  */
    202 
    203 #define vtopte(VA)	(PTE_BASE + i386_btop(VA))
    204 #define kvtopte(VA)	vtopte(VA)
    205 #define ptetov(PT)	(i386_ptob(PT - PTE_BASE))
    206 #define	vtophys(VA)	((*vtopte(VA) & PG_FRAME) | \
    207 			 ((unsigned)(VA) & ~PG_FRAME))
    208 #define	avtopte(VA)	(APTE_BASE + i386_btop(VA))
    209 #define	ptetoav(PT)	(i386_ptob(PT - APTE_BASE))
    210 #define	avtophys(VA)	((*avtopte(VA) & PG_FRAME) | \
    211 			 ((unsigned)(VA) & ~PG_FRAME))
    212 
    213 /*
    214  * pdei/ptei: generate index into PDP/PTP from a VA
    215  */
    216 #define	pdei(VA)	(((VA) & PD_MASK) >> PDSHIFT)
    217 #define	ptei(VA)	(((VA) & PT_MASK) >> PGSHIFT)
    218 
    219 /*
    220  * PTP macros:
    221  *   a PTP's index is the PD index of the PDE that points to it
    222  *   a PTP's offset is the byte-offset in the PTE space that this PTP is at
    223  *   a PTP's VA is the first VA mapped by that PTP
    224  *
    225  * note that NBPG == number of bytes in a PTP (4096 bytes == 1024 entries)
    226  *           NBPD == number of bytes a PTP can map (4MB)
    227  */
    228 
    229 #define ptp_i2o(I)	((I) * NBPG)	/* index => offset */
    230 #define ptp_o2i(O)	((O) / NBPG)	/* offset => index */
    231 #define ptp_i2v(I)	((I) * NBPD)	/* index => VA */
    232 #define ptp_v2i(V)	((V) / NBPD)	/* VA => index (same as pdei) */
    233 
    234 /*
    235  * PG_AVAIL usage: we make use of the ignored bits of the PTE
    236  */
    237 
    238 #define PG_W		PG_AVAIL1	/* "wired" mapping */
    239 #define PG_PVLIST	PG_AVAIL2	/* mapping has entry on pvlist */
    240 /* PG_AVAIL3 not used */
    241 
    242 /*
    243  * Number of PTE's per cache line.  4 byte pte, 32-byte cache line
    244  * Used to avoid false sharing of cache lines.
    245  */
    246 #define NPTECL			8
    247 
    248 #ifdef _KERNEL
    249 /*
    250  * pmap data structures: see pmap.c for details of locking.
    251  */
    252 
    253 struct pmap;
    254 typedef struct pmap *pmap_t;
    255 
    256 /*
    257  * we maintain a list of all non-kernel pmaps
    258  */
    259 
    260 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
    261 
    262 /*
    263  * the pmap structure
    264  *
    265  * note that the pm_obj contains the simple_lock, the reference count,
    266  * page list, and number of PTPs within the pmap.
    267  */
    268 
    269 struct pmap {
    270 	struct uvm_object pm_obj;	/* object (lck by object lock) */
    271 #define	pm_lock	pm_obj.vmobjlock
    272 	LIST_ENTRY(pmap) pm_list;	/* list (lck by pm_list lock) */
    273 	pd_entry_t *pm_pdir;		/* VA of PD (lck by object lock) */
    274 	u_int32_t pm_pdirpa;		/* PA of PD (read-only after create) */
    275 	struct vm_page *pm_ptphint;	/* pointer to a PTP in our pmap */
    276 	struct pmap_statistics pm_stats;  /* pmap stats (lck by object lock) */
    277 
    278 	int pm_flags;			/* see below */
    279 
    280 	union descriptor *pm_ldt;	/* user-set LDT */
    281 	int pm_ldt_len;			/* number of LDT entries */
    282 	int pm_ldt_sel;			/* LDT selector */
    283 };
    284 
    285 /* pm_flags */
    286 #define	PMF_USER_LDT	0x01	/* pmap has user-set LDT */
    287 
    288 /*
    289  * for each managed physical page we maintain a list of <PMAP,VA>'s
    290  * which it is mapped at.  the list is headed by a pv_head structure.
    291  * there is one pv_head per managed phys page (allocated at boot time).
    292  * the pv_head structure points to a list of pv_entry structures (each
    293  * describes one mapping).
    294  */
    295 
    296 struct pv_entry;
    297 
    298 struct pv_head {
    299 	simple_lock_data_t pvh_lock;	/* locks every pv on this list */
    300 	struct pv_entry *pvh_list;	/* head of list (locked by pvh_lock) */
    301 };
    302 
    303 struct pv_entry {			/* locked by its list's pvh_lock */
    304 	struct pv_entry *pv_next;	/* next entry */
    305 	struct pmap *pv_pmap;		/* the pmap */
    306 	vaddr_t pv_va;			/* the virtual address */
    307 	struct vm_page *pv_ptp;		/* the vm_page of the PTP */
    308 };
    309 
    310 /*
    311  * pv_entrys are dynamically allocated in chunks from a single page.
    312  * we keep track of how many pv_entrys are in use for each page and
    313  * we can free pv_entry pages if needed.  there is one lock for the
    314  * entire allocation system.
    315  */
    316 
    317 struct pv_page_info {
    318 	TAILQ_ENTRY(pv_page) pvpi_list;
    319 	struct pv_entry *pvpi_pvfree;
    320 	int pvpi_nfree;
    321 };
    322 
    323 /*
    324  * number of pv_entry's in a pv_page
    325  * (note: won't work on systems where NPBG isn't a constant)
    326  */
    327 
    328 #define PVE_PER_PVPAGE ((NBPG - sizeof(struct pv_page_info)) / \
    329 			sizeof(struct pv_entry))
    330 
    331 /*
    332  * a pv_page: where pv_entrys are allocated from
    333  */
    334 
    335 struct pv_page {
    336 	struct pv_page_info pvinfo;
    337 	struct pv_entry pvents[PVE_PER_PVPAGE];
    338 };
    339 
    340 /*
    341  * pmap_remove_record: a record of VAs that have been unmapped, used to
    342  * flush TLB.  if we have more than PMAP_RR_MAX then we stop recording.
    343  */
    344 
    345 #define PMAP_RR_MAX	16	/* max of 16 pages (64K) */
    346 #if 0
    347 struct pmap_remove_record {
    348 	int prr_npages;
    349 	vaddr_t prr_vas[PMAP_RR_MAX];
    350 };
    351 #endif
    352 
    353 #if 0
    354 /*
    355  * pmap_transfer_location: used to pass the current location in the
    356  * pmap between pmap_transfer and pmap_transfer_ptes [e.g. during
    357  * a pmap_copy].
    358  */
    359 
    360 struct pmap_transfer_location {
    361 	vaddr_t addr;			/* the address (page-aligned) */
    362 	pt_entry_t *pte;		/* the PTE that maps address */
    363 	struct vm_page *ptp;		/* the PTP that the PTE lives in */
    364 };
    365 #endif
    366 
    367 /*
    368  * global kernel variables
    369  */
    370 
    371 /* PTDpaddr: is the physical address of the kernel's PDP */
    372 extern u_long PTDpaddr;
    373 
    374 extern struct pmap kernel_pmap_store;	/* kernel pmap */
    375 extern int nkpde;			/* current # of PDEs for kernel */
    376 extern int pmap_pg_g;			/* do we support PG_G? */
    377 
    378 /*
    379  * macros
    380  */
    381 
    382 #define	pmap_kernel()			(&kernel_pmap_store)
    383 #define	pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
    384 #define	pmap_update()			tlbflush()
    385 
    386 #define pmap_clear_modify(pg)		pmap_change_attrs(pg, 0, PG_M)
    387 #define pmap_clear_reference(pg)	pmap_change_attrs(pg, 0, PG_U)
    388 #define pmap_copy(DP,SP,D,L,S)
    389 #define pmap_is_modified(pg)		pmap_test_attrs(pg, PG_M)
    390 #define pmap_is_referenced(pg)		pmap_test_attrs(pg, PG_U)
    391 #define pmap_move(DP,SP,D,L,S)
    392 #define pmap_phys_address(ppn)		i386_ptob(ppn)
    393 #define pmap_valid_entry(E) 		((E) & PG_V) /* is PDE or PTE valid? */
    394 
    395 
    396 /*
    397  * prototypes
    398  */
    399 
    400 void		pmap_activate __P((struct proc *));
    401 void		pmap_bootstrap __P((vaddr_t));
    402 boolean_t	pmap_change_attrs __P((struct vm_page *, int, int));
    403 void		pmap_deactivate __P((struct proc *));
    404 static void	pmap_page_protect __P((struct vm_page *, vm_prot_t));
    405 void		pmap_page_remove  __P((struct vm_page *));
    406 static void	pmap_protect __P((struct pmap *, vaddr_t,
    407 				vaddr_t, vm_prot_t));
    408 void		pmap_remove __P((struct pmap *, vaddr_t, vaddr_t));
    409 boolean_t	pmap_test_attrs __P((struct vm_page *, int));
    410 void		pmap_transfer __P((struct pmap *, struct pmap *, vaddr_t,
    411 				   vsize_t, vaddr_t, boolean_t));
    412 static void	pmap_update_pg __P((vaddr_t));
    413 static void	pmap_update_2pg __P((vaddr_t,vaddr_t));
    414 void		pmap_write_protect __P((struct pmap *, vaddr_t,
    415 				vaddr_t, vm_prot_t));
    416 
    417 vaddr_t reserve_dumppages __P((vaddr_t)); /* XXX: not a pmap fn */
    418 
    419 #if defined(MULTIPROCESSOR)
    420 void	pmap_tlb_shootdown __P((pmap_t, vaddr_t, pt_entry_t));
    421 #endif /* MULTIPROCESSOR */
    422 void	pmap_tlb_dshootdown __P((pmap_t, vaddr_t, pt_entry_t));
    423 void	pmap_do_tlb_shootdown __P((struct cpu_info *));
    424 
    425 #define PMAP_GROWKERNEL		/* turn on pmap_growkernel interface */
    426 
    427 /*
    428  * Do idle page zero'ing uncached to avoid polluting the cache.
    429  */
    430 void		pmap_zero_page_uncached __P((paddr_t));
    431 #define	PMAP_PAGEIDLEZERO(pa)	pmap_zero_page_uncached((pa))
    432 
    433 /*
    434  * inline functions
    435  */
    436 
    437 /*
    438  * pmap_update_pg: flush one page from the TLB (or flush the whole thing
    439  *	if hardware doesn't support one-page flushing)
    440  */
    441 
    442 __inline static void
    443 pmap_update_pg(va)
    444 	vaddr_t va;
    445 {
    446 #if defined(I386_CPU)
    447 	if (cpu_class == CPUCLASS_386)
    448 		pmap_update();
    449 	else
    450 #endif
    451 		invlpg((u_int) va);
    452 }
    453 
    454 /*
    455  * pmap_update_2pg: flush two pages from the TLB
    456  */
    457 
    458 __inline static void
    459 pmap_update_2pg(va, vb)
    460 	vaddr_t va, vb;
    461 {
    462 #if defined(I386_CPU)
    463 	if (cpu_class == CPUCLASS_386)
    464 		pmap_update();
    465 	else
    466 #endif
    467 	{
    468 		invlpg((u_int) va);
    469 		invlpg((u_int) vb);
    470 	}
    471 }
    472 
    473 /*
    474  * pmap_page_protect: change the protection of all recorded mappings
    475  *	of a managed page
    476  *
    477  * => this function is a frontend for pmap_page_remove/pmap_change_attrs
    478  * => we only have to worry about making the page more protected.
    479  *	unprotecting a page is done on-demand at fault time.
    480  */
    481 
    482 __inline static void
    483 pmap_page_protect(pg, prot)
    484 	struct vm_page *pg;
    485 	vm_prot_t prot;
    486 {
    487 	if ((prot & VM_PROT_WRITE) == 0) {
    488 		if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
    489 			(void) pmap_change_attrs(pg, PG_RO, PG_RW);
    490 		} else {
    491 			pmap_page_remove(pg);
    492 		}
    493 	}
    494 }
    495 
    496 /*
    497  * pmap_protect: change the protection of pages in a pmap
    498  *
    499  * => this function is a frontend for pmap_remove/pmap_write_protect
    500  * => we only have to worry about making the page more protected.
    501  *	unprotecting a page is done on-demand at fault time.
    502  */
    503 
    504 __inline static void
    505 pmap_protect(pmap, sva, eva, prot)
    506 	struct pmap *pmap;
    507 	vaddr_t sva, eva;
    508 	vm_prot_t prot;
    509 {
    510 	if ((prot & VM_PROT_WRITE) == 0) {
    511 		if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
    512 			pmap_write_protect(pmap, sva, eva, prot);
    513 		} else {
    514 			pmap_remove(pmap, sva, eva);
    515 		}
    516 	}
    517 }
    518 
    519 vaddr_t	pmap_map __P((vaddr_t, paddr_t, paddr_t, vm_prot_t));
    520 
    521 #if defined(USER_LDT)
    522 void	pmap_ldt_cleanup __P((struct proc *));
    523 #define	PMAP_FORK
    524 #endif /* USER_LDT */
    525 
    526 #endif /* _KERNEL */
    527 #endif	/* _I386_PMAP_H_ */
    528