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lms.c revision 1.25 
      1 /*	$NetBSD: lms.c,v 1.25 1996/05/03 20:12:01 christos Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1993, 1994 Charles Hannum.
      5  * Copyright (c) 1992, 1993 Erik Forsberg.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  *
     14  * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
     15  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     16  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
     17  * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     18  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     19  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
     20  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
     21  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
     22  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     23  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     24  */
     25 
     26 #include <sys/param.h>
     27 #include <sys/kernel.h>
     28 #include <sys/systm.h>
     29 #include <sys/buf.h>
     30 #include <sys/malloc.h>
     31 #include <sys/ioctl.h>
     32 #include <sys/tty.h>
     33 #include <sys/file.h>
     34 #include <sys/select.h>
     35 #include <sys/proc.h>
     36 #include <sys/vnode.h>
     37 #include <sys/device.h>
     38 
     39 #include <machine/cpu.h>
     40 #include <machine/bus.h>
     41 #include <machine/mouse.h>
     42 #include <machine/conf.h>
     43 
     44 #include <dev/isa/isavar.h>
     45 
     46 #define	LMS_DATA	0       /* offset for data port, read-only */
     47 #define	LMS_SIGN	1       /* offset for signature port, read-write */
     48 #define	LMS_INTR	2       /* offset for interrupt port, read-only */
     49 #define	LMS_CNTRL	2       /* offset for control port, write-only */
     50 #define	LMS_CONFIG	3	/* for configuration port, read-write */
     51 #define	LMS_NPORTS	4
     52 
     53 #define	LMS_CHUNK	128	/* chunk size for read */
     54 #define	LMS_BSIZE	1020	/* buffer size */
     55 
     56 struct lms_softc {		/* driver status information */
     57 	struct device sc_dev;
     58 	void *sc_ih;
     59 
     60 	bus_chipset_tag_t sc_bc;	/* bus chipset identifier */
     61 	bus_io_handle_t sc_ioh;		/* bus i/o handle */
     62 
     63 	struct clist sc_q;
     64 	struct selinfo sc_rsel;
     65 	u_char sc_state;	/* mouse driver state */
     66 #define	LMS_OPEN	0x01	/* device is open */
     67 #define	LMS_ASLP	0x02	/* waiting for mouse data */
     68 	u_char sc_status;	/* mouse button status */
     69 	int sc_x, sc_y;		/* accumulated motion in the X,Y axis */
     70 };
     71 
     72 int lmsprobe __P((struct device *, void *, void *));
     73 void lmsattach __P((struct device *, struct device *, void *));
     74 int lmsintr __P((void *));
     75 
     76 struct cfattach lms_ca = {
     77 	sizeof(struct lms_softc), lmsprobe, lmsattach
     78 };
     79 
     80 struct cfdriver lms_cd = {
     81 	NULL, "lms", DV_TTY
     82 };
     83 
     84 #define	LMSUNIT(dev)	(minor(dev))
     85 
     86 int
     87 lmsprobe(parent, match, aux)
     88 	struct device *parent;
     89 	void *match, *aux;
     90 {
     91 	struct isa_attach_args *ia = aux;
     92 	bus_chipset_tag_t bc = ia->ia_bc;
     93 	bus_io_handle_t ioh;
     94 	int rv;
     95 
     96 	/* Map the i/o space. */
     97 	if (bus_io_map(bc, ia->ia_iobase, LMS_NPORTS, &ioh))
     98 		return 0;
     99 
    100 	rv = 0;
    101 
    102 	/* Configure and check for port present. */
    103 	bus_io_write_1(bc, ioh, LMS_CONFIG, 0x91);
    104 	delay(10);
    105 	bus_io_write_1(bc, ioh, LMS_SIGN, 0x0c);
    106 	delay(10);
    107 	if (bus_io_read_1(bc, ioh, LMS_SIGN) != 0x0c)
    108 		goto out;
    109 	bus_io_write_1(bc, ioh, LMS_SIGN, 0x50);
    110 	delay(10);
    111 	if (bus_io_read_1(bc, ioh, LMS_SIGN) != 0x50)
    112 		goto out;
    113 
    114 	/* Disable interrupts. */
    115 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0x10);
    116 
    117 	rv = 1;
    118 	ia->ia_iosize = LMS_NPORTS;
    119 	ia->ia_msize = 0;
    120 
    121 out:
    122 	bus_io_unmap(bc, ioh, LMS_NPORTS);
    123 	return rv;
    124 }
    125 
    126 void
    127 lmsattach(parent, self, aux)
    128 	struct device *parent, *self;
    129 	void *aux;
    130 {
    131 	struct lms_softc *sc = (void *)self;
    132 	struct isa_attach_args *ia = aux;
    133 
    134 	printf("\n");
    135 
    136 	/* Other initialization was done by lmsprobe. */
    137 	sc->sc_bc = ia->ia_bc;
    138 	if (bus_io_map(sc->sc_bc, ia->ia_iobase, LMS_NPORTS, &sc->sc_ioh))
    139 		panic("lmsattach: couldn't map I/O ports");
    140 
    141 	sc->sc_state = 0;
    142 
    143 	sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_PULSE,
    144 	    IPL_TTY, lmsintr, sc);
    145 }
    146 
    147 int
    148 lmsopen(dev, flag, mode, p)
    149 	dev_t dev;
    150 	int flag;
    151 	int mode;
    152 	struct proc *p;
    153 {
    154 	int unit = LMSUNIT(dev);
    155 	struct lms_softc *sc;
    156 
    157 	if (unit >= lms_cd.cd_ndevs)
    158 		return ENXIO;
    159 	sc = lms_cd.cd_devs[unit];
    160 	if (!sc)
    161 		return ENXIO;
    162 
    163 	if (sc->sc_state & LMS_OPEN)
    164 		return EBUSY;
    165 
    166 	if (clalloc(&sc->sc_q, LMS_BSIZE, 0) == -1)
    167 		return ENOMEM;
    168 
    169 	sc->sc_state |= LMS_OPEN;
    170 	sc->sc_status = 0;
    171 	sc->sc_x = sc->sc_y = 0;
    172 
    173 	/* Enable interrupts. */
    174 	bus_io_write_1(sc->sc_bc, sc->sc_ioh, LMS_CNTRL, 0);
    175 
    176 	return 0;
    177 }
    178 
    179 int
    180 lmsclose(dev, flag, mode, p)
    181 	dev_t dev;
    182 	int flag;
    183 	int mode;
    184 	struct proc *p;
    185 {
    186 	struct lms_softc *sc = lms_cd.cd_devs[LMSUNIT(dev)];
    187 
    188 	/* Disable interrupts. */
    189 	bus_io_write_1(sc->sc_bc, sc->sc_ioh, LMS_CNTRL, 0x10);
    190 
    191 	sc->sc_state &= ~LMS_OPEN;
    192 
    193 	clfree(&sc->sc_q);
    194 
    195 	return 0;
    196 }
    197 
    198 int
    199 lmsread(dev, uio, flag)
    200 	dev_t dev;
    201 	struct uio *uio;
    202 	int flag;
    203 {
    204 	struct lms_softc *sc = lms_cd.cd_devs[LMSUNIT(dev)];
    205 	int s;
    206 	int error = 0;
    207 	size_t length;
    208 	u_char buffer[LMS_CHUNK];
    209 
    210 	/* Block until mouse activity occured. */
    211 
    212 	s = spltty();
    213 	while (sc->sc_q.c_cc == 0) {
    214 		if (flag & IO_NDELAY) {
    215 			splx(s);
    216 			return EWOULDBLOCK;
    217 		}
    218 		sc->sc_state |= LMS_ASLP;
    219 		error = tsleep((caddr_t)sc, PZERO | PCATCH, "lmsrea", 0);
    220 		if (error) {
    221 			sc->sc_state &= ~LMS_ASLP;
    222 			splx(s);
    223 			return error;
    224 		}
    225 	}
    226 	splx(s);
    227 
    228 	/* Transfer as many chunks as possible. */
    229 
    230 	while (sc->sc_q.c_cc > 0 && uio->uio_resid > 0) {
    231 		length = min(sc->sc_q.c_cc, uio->uio_resid);
    232 		if (length > sizeof(buffer))
    233 			length = sizeof(buffer);
    234 
    235 		/* Remove a small chunk from the input queue. */
    236 		(void) q_to_b(&sc->sc_q, buffer, length);
    237 
    238 		/* Copy the data to the user process. */
    239 		if ((error = uiomove(buffer, length, uio)) != 0)
    240 			break;
    241 	}
    242 
    243 	return error;
    244 }
    245 
    246 int
    247 lmsioctl(dev, cmd, addr, flag, p)
    248 	dev_t dev;
    249 	u_long cmd;
    250 	caddr_t addr;
    251 	int flag;
    252 	struct proc *p;
    253 {
    254 	struct lms_softc *sc = lms_cd.cd_devs[LMSUNIT(dev)];
    255 	struct mouseinfo info;
    256 	int s;
    257 	int error;
    258 
    259 	switch (cmd) {
    260 	case MOUSEIOCREAD:
    261 		s = spltty();
    262 
    263 		info.status = sc->sc_status;
    264 		if (sc->sc_x || sc->sc_y)
    265 			info.status |= MOVEMENT;
    266 
    267 		if (sc->sc_x > 127)
    268 			info.xmotion = 127;
    269 		else if (sc->sc_x < -127)
    270 			/* Bounding at -127 avoids a bug in XFree86. */
    271 			info.xmotion = -127;
    272 		else
    273 			info.xmotion = sc->sc_x;
    274 
    275 		if (sc->sc_y > 127)
    276 			info.ymotion = 127;
    277 		else if (sc->sc_y < -127)
    278 			info.ymotion = -127;
    279 		else
    280 			info.ymotion = sc->sc_y;
    281 
    282 		/* Reset historical information. */
    283 		sc->sc_x = sc->sc_y = 0;
    284 		sc->sc_status &= ~BUTCHNGMASK;
    285 		ndflush(&sc->sc_q, sc->sc_q.c_cc);
    286 
    287 		splx(s);
    288 		error = copyout(&info, addr, sizeof(struct mouseinfo));
    289 		break;
    290 
    291 	default:
    292 		error = EINVAL;
    293 		break;
    294 	}
    295 
    296 	return error;
    297 }
    298 
    299 int
    300 lmsintr(arg)
    301 	void *arg;
    302 {
    303 	struct lms_softc *sc = arg;
    304 	bus_chipset_tag_t bc = sc->sc_bc;
    305 	bus_io_handle_t ioh = sc->sc_ioh;
    306 	u_char hi, lo, buttons, changed;
    307 	char dx, dy;
    308 	u_char buffer[5];
    309 
    310 	if ((sc->sc_state & LMS_OPEN) == 0)
    311 		/* Interrupts are not expected. */
    312 		return 0;
    313 
    314 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0xab);
    315 	hi = bus_io_read_1(bc, ioh, LMS_DATA);
    316 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0x90);
    317 	lo = bus_io_read_1(bc, ioh, LMS_DATA);
    318 	dx = ((hi & 0x0f) << 4) | (lo & 0x0f);
    319 	/* Bounding at -127 avoids a bug in XFree86. */
    320 	dx = (dx == -128) ? -127 : dx;
    321 
    322 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0xf0);
    323 	hi = bus_io_read_1(bc, ioh, LMS_DATA);
    324 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0xd0);
    325 	lo = bus_io_read_1(bc, ioh, LMS_DATA);
    326 	dy = ((hi & 0x0f) << 4) | (lo & 0x0f);
    327 	dy = (dy == -128) ? 127 : -dy;
    328 
    329 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0);
    330 
    331 	buttons = (~hi >> 5) & 0x07;
    332 	changed = ((buttons ^ sc->sc_status) & 0x07) << 3;
    333 	sc->sc_status = buttons | (sc->sc_status & ~BUTSTATMASK) | changed;
    334 
    335 	if (dx || dy || changed) {
    336 		/* Update accumulated movements. */
    337 		sc->sc_x += dx;
    338 		sc->sc_y += dy;
    339 
    340 		/* Add this event to the queue. */
    341 		buffer[0] = 0x80 | (buttons ^ BUTSTATMASK);
    342 		buffer[1] = dx;
    343 		buffer[2] = dy;
    344 		buffer[3] = buffer[4] = 0;
    345 		(void) b_to_q(buffer, sizeof buffer, &sc->sc_q);
    346 
    347 		if (sc->sc_state & LMS_ASLP) {
    348 			sc->sc_state &= ~LMS_ASLP;
    349 			wakeup((caddr_t)sc);
    350 		}
    351 		selwakeup(&sc->sc_rsel);
    352 	}
    353 
    354 	return -1;
    355 }
    356 
    357 int
    358 lmsselect(dev, rw, p)
    359 	dev_t dev;
    360 	int rw;
    361 	struct proc *p;
    362 {
    363 	struct lms_softc *sc = lms_cd.cd_devs[LMSUNIT(dev)];
    364 	int s;
    365 	int ret;
    366 
    367 	if (rw == FWRITE)
    368 		return 0;
    369 
    370 	s = spltty();
    371 	if (!sc->sc_q.c_cc) {
    372 		selrecord(p, &sc->sc_rsel);
    373 		ret = 0;
    374 	} else
    375 		ret = 1;
    376 	splx(s);
    377 
    378 	return ret;
    379 }
    380