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lms.c revision 1.26 
      1 /*	$NetBSD: lms.c,v 1.26 1996/05/12 23:12:11 mycroft Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1993, 1994 Charles Hannum.
      5  * Copyright (c) 1992, 1993 Erik Forsberg.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  *
     14  * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
     15  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     16  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
     17  * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     18  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     19  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
     20  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
     21  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
     22  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     23  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     24  */
     25 
     26 #include <sys/param.h>
     27 #include <sys/kernel.h>
     28 #include <sys/systm.h>
     29 #include <sys/buf.h>
     30 #include <sys/malloc.h>
     31 #include <sys/ioctl.h>
     32 #include <sys/tty.h>
     33 #include <sys/file.h>
     34 #include <sys/select.h>
     35 #include <sys/proc.h>
     36 #include <sys/vnode.h>
     37 #include <sys/device.h>
     38 
     39 #include <machine/cpu.h>
     40 #include <machine/bus.h>
     41 #include <machine/intr.h>
     42 #include <machine/mouse.h>
     43 #include <machine/conf.h>
     44 
     45 #include <dev/isa/isavar.h>
     46 
     47 #define	LMS_DATA	0       /* offset for data port, read-only */
     48 #define	LMS_SIGN	1       /* offset for signature port, read-write */
     49 #define	LMS_INTR	2       /* offset for interrupt port, read-only */
     50 #define	LMS_CNTRL	2       /* offset for control port, write-only */
     51 #define	LMS_CONFIG	3	/* for configuration port, read-write */
     52 #define	LMS_NPORTS	4
     53 
     54 #define	LMS_CHUNK	128	/* chunk size for read */
     55 #define	LMS_BSIZE	1020	/* buffer size */
     56 
     57 struct lms_softc {		/* driver status information */
     58 	struct device sc_dev;
     59 	void *sc_ih;
     60 
     61 	bus_chipset_tag_t sc_bc;	/* bus chipset identifier */
     62 	bus_io_handle_t sc_ioh;		/* bus i/o handle */
     63 
     64 	struct clist sc_q;
     65 	struct selinfo sc_rsel;
     66 	u_char sc_state;	/* mouse driver state */
     67 #define	LMS_OPEN	0x01	/* device is open */
     68 #define	LMS_ASLP	0x02	/* waiting for mouse data */
     69 	u_char sc_status;	/* mouse button status */
     70 	int sc_x, sc_y;		/* accumulated motion in the X,Y axis */
     71 };
     72 
     73 int lmsprobe __P((struct device *, void *, void *));
     74 void lmsattach __P((struct device *, struct device *, void *));
     75 int lmsintr __P((void *));
     76 
     77 struct cfattach lms_ca = {
     78 	sizeof(struct lms_softc), lmsprobe, lmsattach
     79 };
     80 
     81 struct cfdriver lms_cd = {
     82 	NULL, "lms", DV_TTY
     83 };
     84 
     85 #define	LMSUNIT(dev)	(minor(dev))
     86 
     87 int
     88 lmsprobe(parent, match, aux)
     89 	struct device *parent;
     90 	void *match, *aux;
     91 {
     92 	struct isa_attach_args *ia = aux;
     93 	bus_chipset_tag_t bc = ia->ia_bc;
     94 	bus_io_handle_t ioh;
     95 	int rv;
     96 
     97 	/* Map the i/o space. */
     98 	if (bus_io_map(bc, ia->ia_iobase, LMS_NPORTS, &ioh))
     99 		return 0;
    100 
    101 	rv = 0;
    102 
    103 	/* Configure and check for port present. */
    104 	bus_io_write_1(bc, ioh, LMS_CONFIG, 0x91);
    105 	delay(10);
    106 	bus_io_write_1(bc, ioh, LMS_SIGN, 0x0c);
    107 	delay(10);
    108 	if (bus_io_read_1(bc, ioh, LMS_SIGN) != 0x0c)
    109 		goto out;
    110 	bus_io_write_1(bc, ioh, LMS_SIGN, 0x50);
    111 	delay(10);
    112 	if (bus_io_read_1(bc, ioh, LMS_SIGN) != 0x50)
    113 		goto out;
    114 
    115 	/* Disable interrupts. */
    116 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0x10);
    117 
    118 	rv = 1;
    119 	ia->ia_iosize = LMS_NPORTS;
    120 	ia->ia_msize = 0;
    121 
    122 out:
    123 	bus_io_unmap(bc, ioh, LMS_NPORTS);
    124 	return rv;
    125 }
    126 
    127 void
    128 lmsattach(parent, self, aux)
    129 	struct device *parent, *self;
    130 	void *aux;
    131 {
    132 	struct lms_softc *sc = (void *)self;
    133 	struct isa_attach_args *ia = aux;
    134 
    135 	printf("\n");
    136 
    137 	/* Other initialization was done by lmsprobe. */
    138 	sc->sc_bc = ia->ia_bc;
    139 	if (bus_io_map(sc->sc_bc, ia->ia_iobase, LMS_NPORTS, &sc->sc_ioh))
    140 		panic("lmsattach: couldn't map I/O ports");
    141 
    142 	sc->sc_state = 0;
    143 
    144 	sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_PULSE,
    145 	    IPL_TTY, lmsintr, sc);
    146 }
    147 
    148 int
    149 lmsopen(dev, flag, mode, p)
    150 	dev_t dev;
    151 	int flag;
    152 	int mode;
    153 	struct proc *p;
    154 {
    155 	int unit = LMSUNIT(dev);
    156 	struct lms_softc *sc;
    157 
    158 	if (unit >= lms_cd.cd_ndevs)
    159 		return ENXIO;
    160 	sc = lms_cd.cd_devs[unit];
    161 	if (!sc)
    162 		return ENXIO;
    163 
    164 	if (sc->sc_state & LMS_OPEN)
    165 		return EBUSY;
    166 
    167 	if (clalloc(&sc->sc_q, LMS_BSIZE, 0) == -1)
    168 		return ENOMEM;
    169 
    170 	sc->sc_state |= LMS_OPEN;
    171 	sc->sc_status = 0;
    172 	sc->sc_x = sc->sc_y = 0;
    173 
    174 	/* Enable interrupts. */
    175 	bus_io_write_1(sc->sc_bc, sc->sc_ioh, LMS_CNTRL, 0);
    176 
    177 	return 0;
    178 }
    179 
    180 int
    181 lmsclose(dev, flag, mode, p)
    182 	dev_t dev;
    183 	int flag;
    184 	int mode;
    185 	struct proc *p;
    186 {
    187 	struct lms_softc *sc = lms_cd.cd_devs[LMSUNIT(dev)];
    188 
    189 	/* Disable interrupts. */
    190 	bus_io_write_1(sc->sc_bc, sc->sc_ioh, LMS_CNTRL, 0x10);
    191 
    192 	sc->sc_state &= ~LMS_OPEN;
    193 
    194 	clfree(&sc->sc_q);
    195 
    196 	return 0;
    197 }
    198 
    199 int
    200 lmsread(dev, uio, flag)
    201 	dev_t dev;
    202 	struct uio *uio;
    203 	int flag;
    204 {
    205 	struct lms_softc *sc = lms_cd.cd_devs[LMSUNIT(dev)];
    206 	int s;
    207 	int error = 0;
    208 	size_t length;
    209 	u_char buffer[LMS_CHUNK];
    210 
    211 	/* Block until mouse activity occured. */
    212 
    213 	s = spltty();
    214 	while (sc->sc_q.c_cc == 0) {
    215 		if (flag & IO_NDELAY) {
    216 			splx(s);
    217 			return EWOULDBLOCK;
    218 		}
    219 		sc->sc_state |= LMS_ASLP;
    220 		error = tsleep((caddr_t)sc, PZERO | PCATCH, "lmsrea", 0);
    221 		if (error) {
    222 			sc->sc_state &= ~LMS_ASLP;
    223 			splx(s);
    224 			return error;
    225 		}
    226 	}
    227 	splx(s);
    228 
    229 	/* Transfer as many chunks as possible. */
    230 
    231 	while (sc->sc_q.c_cc > 0 && uio->uio_resid > 0) {
    232 		length = min(sc->sc_q.c_cc, uio->uio_resid);
    233 		if (length > sizeof(buffer))
    234 			length = sizeof(buffer);
    235 
    236 		/* Remove a small chunk from the input queue. */
    237 		(void) q_to_b(&sc->sc_q, buffer, length);
    238 
    239 		/* Copy the data to the user process. */
    240 		if ((error = uiomove(buffer, length, uio)) != 0)
    241 			break;
    242 	}
    243 
    244 	return error;
    245 }
    246 
    247 int
    248 lmsioctl(dev, cmd, addr, flag, p)
    249 	dev_t dev;
    250 	u_long cmd;
    251 	caddr_t addr;
    252 	int flag;
    253 	struct proc *p;
    254 {
    255 	struct lms_softc *sc = lms_cd.cd_devs[LMSUNIT(dev)];
    256 	struct mouseinfo info;
    257 	int s;
    258 	int error;
    259 
    260 	switch (cmd) {
    261 	case MOUSEIOCREAD:
    262 		s = spltty();
    263 
    264 		info.status = sc->sc_status;
    265 		if (sc->sc_x || sc->sc_y)
    266 			info.status |= MOVEMENT;
    267 
    268 		if (sc->sc_x > 127)
    269 			info.xmotion = 127;
    270 		else if (sc->sc_x < -127)
    271 			/* Bounding at -127 avoids a bug in XFree86. */
    272 			info.xmotion = -127;
    273 		else
    274 			info.xmotion = sc->sc_x;
    275 
    276 		if (sc->sc_y > 127)
    277 			info.ymotion = 127;
    278 		else if (sc->sc_y < -127)
    279 			info.ymotion = -127;
    280 		else
    281 			info.ymotion = sc->sc_y;
    282 
    283 		/* Reset historical information. */
    284 		sc->sc_x = sc->sc_y = 0;
    285 		sc->sc_status &= ~BUTCHNGMASK;
    286 		ndflush(&sc->sc_q, sc->sc_q.c_cc);
    287 
    288 		splx(s);
    289 		error = copyout(&info, addr, sizeof(struct mouseinfo));
    290 		break;
    291 
    292 	default:
    293 		error = EINVAL;
    294 		break;
    295 	}
    296 
    297 	return error;
    298 }
    299 
    300 int
    301 lmsintr(arg)
    302 	void *arg;
    303 {
    304 	struct lms_softc *sc = arg;
    305 	bus_chipset_tag_t bc = sc->sc_bc;
    306 	bus_io_handle_t ioh = sc->sc_ioh;
    307 	u_char hi, lo, buttons, changed;
    308 	char dx, dy;
    309 	u_char buffer[5];
    310 
    311 	if ((sc->sc_state & LMS_OPEN) == 0)
    312 		/* Interrupts are not expected. */
    313 		return 0;
    314 
    315 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0xab);
    316 	hi = bus_io_read_1(bc, ioh, LMS_DATA);
    317 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0x90);
    318 	lo = bus_io_read_1(bc, ioh, LMS_DATA);
    319 	dx = ((hi & 0x0f) << 4) | (lo & 0x0f);
    320 	/* Bounding at -127 avoids a bug in XFree86. */
    321 	dx = (dx == -128) ? -127 : dx;
    322 
    323 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0xf0);
    324 	hi = bus_io_read_1(bc, ioh, LMS_DATA);
    325 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0xd0);
    326 	lo = bus_io_read_1(bc, ioh, LMS_DATA);
    327 	dy = ((hi & 0x0f) << 4) | (lo & 0x0f);
    328 	dy = (dy == -128) ? 127 : -dy;
    329 
    330 	bus_io_write_1(bc, ioh, LMS_CNTRL, 0);
    331 
    332 	buttons = (~hi >> 5) & 0x07;
    333 	changed = ((buttons ^ sc->sc_status) & 0x07) << 3;
    334 	sc->sc_status = buttons | (sc->sc_status & ~BUTSTATMASK) | changed;
    335 
    336 	if (dx || dy || changed) {
    337 		/* Update accumulated movements. */
    338 		sc->sc_x += dx;
    339 		sc->sc_y += dy;
    340 
    341 		/* Add this event to the queue. */
    342 		buffer[0] = 0x80 | (buttons ^ BUTSTATMASK);
    343 		buffer[1] = dx;
    344 		buffer[2] = dy;
    345 		buffer[3] = buffer[4] = 0;
    346 		(void) b_to_q(buffer, sizeof buffer, &sc->sc_q);
    347 
    348 		if (sc->sc_state & LMS_ASLP) {
    349 			sc->sc_state &= ~LMS_ASLP;
    350 			wakeup((caddr_t)sc);
    351 		}
    352 		selwakeup(&sc->sc_rsel);
    353 	}
    354 
    355 	return -1;
    356 }
    357 
    358 int
    359 lmsselect(dev, rw, p)
    360 	dev_t dev;
    361 	int rw;
    362 	struct proc *p;
    363 {
    364 	struct lms_softc *sc = lms_cd.cd_devs[LMSUNIT(dev)];
    365 	int s;
    366 	int ret;
    367 
    368 	if (rw == FWRITE)
    369 		return 0;
    370 
    371 	s = spltty();
    372 	if (!sc->sc_q.c_cc) {
    373 		selrecord(p, &sc->sc_rsel);
    374 		ret = 0;
    375 	} else
    376 		ret = 1;
    377 	splx(s);
    378 
    379 	return ret;
    380 }
    381