amd756.c revision 1.1.8.2 1 1.1.8.2 nathanw /* $NetBSD: amd756.c,v 1.1.8.2 2001/06/21 19:26:04 nathanw Exp $ */
2 1.1.8.2 nathanw
3 1.1.8.2 nathanw /*-
4 1.1.8.2 nathanw * Copyright (c) 1999, 2001 The NetBSD Foundation, Inc.
5 1.1.8.2 nathanw * All rights reserved.
6 1.1.8.2 nathanw *
7 1.1.8.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.1.8.2 nathanw * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1.8.2 nathanw * NASA Ames Research Center.
10 1.1.8.2 nathanw *
11 1.1.8.2 nathanw * Redistribution and use in source and binary forms, with or without
12 1.1.8.2 nathanw * modification, are permitted provided that the following conditions
13 1.1.8.2 nathanw * are met:
14 1.1.8.2 nathanw * 1. Redistributions of source code must retain the above copyright
15 1.1.8.2 nathanw * notice, this list of conditions and the following disclaimer.
16 1.1.8.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
17 1.1.8.2 nathanw * notice, this list of conditions and the following disclaimer in the
18 1.1.8.2 nathanw * documentation and/or other materials provided with the distribution.
19 1.1.8.2 nathanw * 3. All advertising materials mentioning features or use of this software
20 1.1.8.2 nathanw * must display the following acknowledgement:
21 1.1.8.2 nathanw * This product includes software developed by the NetBSD
22 1.1.8.2 nathanw * Foundation, Inc. and its contributors.
23 1.1.8.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1.8.2 nathanw * contributors may be used to endorse or promote products derived
25 1.1.8.2 nathanw * from this software without specific prior written permission.
26 1.1.8.2 nathanw *
27 1.1.8.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1.8.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1.8.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1.8.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1.8.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1.8.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1.8.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1.8.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1.8.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1.8.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1.8.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
38 1.1.8.2 nathanw */
39 1.1.8.2 nathanw
40 1.1.8.2 nathanw /*
41 1.1.8.2 nathanw * Copyright (c) 1999, by UCHIYAMA Yasushi
42 1.1.8.2 nathanw * All rights reserved.
43 1.1.8.2 nathanw *
44 1.1.8.2 nathanw * Redistribution and use in source and binary forms, with or without
45 1.1.8.2 nathanw * modification, are permitted provided that the following conditions
46 1.1.8.2 nathanw * are met:
47 1.1.8.2 nathanw * 1. Redistributions of source code must retain the above copyright
48 1.1.8.2 nathanw * notice, this list of conditions and the following disclaimer.
49 1.1.8.2 nathanw * 2. The name of the developer may NOT be used to endorse or promote products
50 1.1.8.2 nathanw * derived from this software without specific prior written permission.
51 1.1.8.2 nathanw *
52 1.1.8.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
53 1.1.8.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 1.1.8.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 1.1.8.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
56 1.1.8.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 1.1.8.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 1.1.8.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 1.1.8.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 1.1.8.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 1.1.8.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62 1.1.8.2 nathanw * SUCH DAMAGE.
63 1.1.8.2 nathanw */
64 1.1.8.2 nathanw
65 1.1.8.2 nathanw /*
66 1.1.8.2 nathanw * Support for the Advanced Micro Devices AMD756 Peripheral Bus Controller.
67 1.1.8.2 nathanw */
68 1.1.8.2 nathanw
69 1.1.8.2 nathanw #include <sys/param.h>
70 1.1.8.2 nathanw #include <sys/systm.h>
71 1.1.8.2 nathanw #include <sys/device.h>
72 1.1.8.2 nathanw #include <sys/malloc.h>
73 1.1.8.2 nathanw
74 1.1.8.2 nathanw #include <machine/intr.h>
75 1.1.8.2 nathanw #include <machine/bus.h>
76 1.1.8.2 nathanw
77 1.1.8.2 nathanw #include <dev/pci/pcivar.h>
78 1.1.8.2 nathanw #include <dev/pci/pcireg.h>
79 1.1.8.2 nathanw #include <dev/pci/pcidevs.h>
80 1.1.8.2 nathanw
81 1.1.8.2 nathanw #include <i386/pci/pci_intr_fixup.h>
82 1.1.8.2 nathanw #include <i386/pci/amd756reg.h>
83 1.1.8.2 nathanw
84 1.1.8.2 nathanw struct amd756_handle {
85 1.1.8.2 nathanw bus_space_tag_t ph_iot;
86 1.1.8.2 nathanw bus_space_handle_t ph_regs_ioh;
87 1.1.8.2 nathanw pci_chipset_tag_t ph_pc;
88 1.1.8.2 nathanw pcitag_t ph_tag;
89 1.1.8.2 nathanw };
90 1.1.8.2 nathanw
91 1.1.8.2 nathanw int amd756_getclink __P((pciintr_icu_handle_t, int, int *));
92 1.1.8.2 nathanw int amd756_get_intr __P((pciintr_icu_handle_t, int, int *));
93 1.1.8.2 nathanw int amd756_set_intr __P((pciintr_icu_handle_t, int, int));
94 1.1.8.2 nathanw int amd756_get_trigger __P((pciintr_icu_handle_t, int, int *));
95 1.1.8.2 nathanw int amd756_set_trigger __P((pciintr_icu_handle_t, int, int));
96 1.1.8.2 nathanw #ifdef AMD756_DEBUG
97 1.1.8.2 nathanw static void amd756_pir_dump __P((struct amd756_handle *));
98 1.1.8.2 nathanw #endif
99 1.1.8.2 nathanw
100 1.1.8.2 nathanw const struct pciintr_icu amd756_pci_icu = {
101 1.1.8.2 nathanw amd756_getclink,
102 1.1.8.2 nathanw amd756_get_intr,
103 1.1.8.2 nathanw amd756_set_intr,
104 1.1.8.2 nathanw amd756_get_trigger,
105 1.1.8.2 nathanw amd756_set_trigger,
106 1.1.8.2 nathanw };
107 1.1.8.2 nathanw
108 1.1.8.2 nathanw
109 1.1.8.2 nathanw int
110 1.1.8.2 nathanw amd756_init(pc, iot, tag, ptagp, phandp)
111 1.1.8.2 nathanw pci_chipset_tag_t pc;
112 1.1.8.2 nathanw bus_space_tag_t iot;
113 1.1.8.2 nathanw pcitag_t tag;
114 1.1.8.2 nathanw pciintr_icu_tag_t *ptagp;
115 1.1.8.2 nathanw pciintr_icu_handle_t *phandp;
116 1.1.8.2 nathanw {
117 1.1.8.2 nathanw struct amd756_handle *ph;
118 1.1.8.2 nathanw
119 1.1.8.2 nathanw ph = malloc(sizeof(*ph), M_DEVBUF, M_NOWAIT);
120 1.1.8.2 nathanw if (ph == NULL)
121 1.1.8.2 nathanw return (1);
122 1.1.8.2 nathanw
123 1.1.8.2 nathanw ph->ph_iot = iot;
124 1.1.8.2 nathanw ph->ph_pc = pc;
125 1.1.8.2 nathanw ph->ph_tag = tag;
126 1.1.8.2 nathanw
127 1.1.8.2 nathanw *ptagp = &amd756_pci_icu;
128 1.1.8.2 nathanw *phandp = ph;
129 1.1.8.2 nathanw
130 1.1.8.2 nathanw #ifdef AMD756_DEBUG
131 1.1.8.2 nathanw amd756_pir_dump(ph);
132 1.1.8.2 nathanw #endif
133 1.1.8.2 nathanw
134 1.1.8.2 nathanw return (0);
135 1.1.8.2 nathanw }
136 1.1.8.2 nathanw
137 1.1.8.2 nathanw int
138 1.1.8.2 nathanw amd756_getclink(v, link, clinkp)
139 1.1.8.2 nathanw pciintr_icu_handle_t v;
140 1.1.8.2 nathanw int link, *clinkp;
141 1.1.8.2 nathanw {
142 1.1.8.2 nathanw if (AMD756_LEGAL_LINK(link - 1) == 0)
143 1.1.8.2 nathanw return (1);
144 1.1.8.2 nathanw
145 1.1.8.2 nathanw *clinkp = link - 1;
146 1.1.8.2 nathanw
147 1.1.8.2 nathanw return (0);
148 1.1.8.2 nathanw }
149 1.1.8.2 nathanw
150 1.1.8.2 nathanw int
151 1.1.8.2 nathanw amd756_get_intr(v, clink, irqp)
152 1.1.8.2 nathanw pciintr_icu_handle_t v;
153 1.1.8.2 nathanw int clink, *irqp;
154 1.1.8.2 nathanw {
155 1.1.8.2 nathanw struct amd756_handle *ph = v;
156 1.1.8.2 nathanw pcireg_t reg;
157 1.1.8.2 nathanw int val;
158 1.1.8.2 nathanw
159 1.1.8.2 nathanw if (AMD756_LEGAL_LINK(clink) == 0)
160 1.1.8.2 nathanw return (1);
161 1.1.8.2 nathanw
162 1.1.8.2 nathanw reg = AMD756_GET_PIIRQSEL(ph);
163 1.1.8.2 nathanw val = (reg >> (4 * clink)) & 0x0f;
164 1.1.8.2 nathanw *irqp = (val == 0) ?
165 1.1.8.2 nathanw I386_PCI_INTERRUPT_LINE_NO_CONNECTION : val;
166 1.1.8.2 nathanw
167 1.1.8.2 nathanw return (0);
168 1.1.8.2 nathanw }
169 1.1.8.2 nathanw
170 1.1.8.2 nathanw int
171 1.1.8.2 nathanw amd756_set_intr(v, clink, irq)
172 1.1.8.2 nathanw pciintr_icu_handle_t v;
173 1.1.8.2 nathanw int clink, irq;
174 1.1.8.2 nathanw {
175 1.1.8.2 nathanw struct amd756_handle *ph = v;
176 1.1.8.2 nathanw int val;
177 1.1.8.2 nathanw pcireg_t reg;
178 1.1.8.2 nathanw
179 1.1.8.2 nathanw if (AMD756_LEGAL_LINK(clink) == 0 || AMD756_LEGAL_IRQ(irq) == 0)
180 1.1.8.2 nathanw return (1);
181 1.1.8.2 nathanw
182 1.1.8.2 nathanw reg = AMD756_GET_PIIRQSEL(ph);
183 1.1.8.2 nathanw amd756_get_intr(v, clink, &val);
184 1.1.8.2 nathanw reg &= ~(0x000f << (4 * clink));
185 1.1.8.2 nathanw reg |= irq << (4 * clink);
186 1.1.8.2 nathanw AMD756_SET_PIIRQSEL(ph, reg);
187 1.1.8.2 nathanw
188 1.1.8.2 nathanw return (0);
189 1.1.8.2 nathanw }
190 1.1.8.2 nathanw
191 1.1.8.2 nathanw int
192 1.1.8.2 nathanw amd756_get_trigger(v, irq, triggerp)
193 1.1.8.2 nathanw pciintr_icu_handle_t v;
194 1.1.8.2 nathanw int irq, *triggerp;
195 1.1.8.2 nathanw {
196 1.1.8.2 nathanw struct amd756_handle *ph = v;
197 1.1.8.2 nathanw int i, pciirq;
198 1.1.8.2 nathanw pcireg_t reg;
199 1.1.8.2 nathanw
200 1.1.8.2 nathanw if (AMD756_LEGAL_IRQ(irq) == 0)
201 1.1.8.2 nathanw return (1);
202 1.1.8.2 nathanw
203 1.1.8.2 nathanw for (i = 0; i <= 3; i++) {
204 1.1.8.2 nathanw amd756_get_intr(v, i, &pciirq);
205 1.1.8.2 nathanw if (pciirq == irq) {
206 1.1.8.2 nathanw reg = AMD756_GET_EDGESEL(ph);
207 1.1.8.2 nathanw if (reg & (1 << i))
208 1.1.8.2 nathanw *triggerp = IST_EDGE;
209 1.1.8.2 nathanw else
210 1.1.8.2 nathanw *triggerp = IST_LEVEL;
211 1.1.8.2 nathanw break;
212 1.1.8.2 nathanw }
213 1.1.8.2 nathanw }
214 1.1.8.2 nathanw
215 1.1.8.2 nathanw return (0);
216 1.1.8.2 nathanw }
217 1.1.8.2 nathanw
218 1.1.8.2 nathanw int
219 1.1.8.2 nathanw amd756_set_trigger(v, irq, trigger)
220 1.1.8.2 nathanw pciintr_icu_handle_t v;
221 1.1.8.2 nathanw int irq, trigger;
222 1.1.8.2 nathanw {
223 1.1.8.2 nathanw struct amd756_handle *ph = v;
224 1.1.8.2 nathanw int i, pciirq;
225 1.1.8.2 nathanw pcireg_t reg;
226 1.1.8.2 nathanw
227 1.1.8.2 nathanw if (AMD756_LEGAL_IRQ(irq) == 0)
228 1.1.8.2 nathanw return (1);
229 1.1.8.2 nathanw
230 1.1.8.2 nathanw for (i = 0; i <= 3; i++) {
231 1.1.8.2 nathanw amd756_get_intr(v, i, &pciirq);
232 1.1.8.2 nathanw if (pciirq == irq) {
233 1.1.8.2 nathanw reg = AMD756_GET_PIIRQSEL(ph);
234 1.1.8.2 nathanw if (trigger == IST_LEVEL)
235 1.1.8.2 nathanw reg &= ~(1 << (4 * i));
236 1.1.8.2 nathanw else
237 1.1.8.2 nathanw reg |= 1 << (4 * i);
238 1.1.8.2 nathanw AMD756_SET_PIIRQSEL(ph, reg);
239 1.1.8.2 nathanw break;
240 1.1.8.2 nathanw }
241 1.1.8.2 nathanw }
242 1.1.8.2 nathanw
243 1.1.8.2 nathanw return (0);
244 1.1.8.2 nathanw }
245 1.1.8.2 nathanw
246 1.1.8.2 nathanw #ifdef AMD756_DEBUG
247 1.1.8.2 nathanw static void
248 1.1.8.2 nathanw amd756_pir_dump(ph)
249 1.1.8.2 nathanw struct amd756_handle *ph;
250 1.1.8.2 nathanw {
251 1.1.8.2 nathanw int a, b;
252 1.1.8.2 nathanw
253 1.1.8.2 nathanw printf ("AMD756 PCI INTERRUPT ROUTING REGISTERS:\n");
254 1.1.8.2 nathanw
255 1.1.8.2 nathanw a = AMD756_GET_EDGESEL(ph);
256 1.1.8.2 nathanw b = AMD756_GET_PIIRQSEL(ph);
257 1.1.8.2 nathanw
258 1.1.8.2 nathanw printf ("TRIGGER: %02x, ROUTING: %04x\n", a, b);
259 1.1.8.2 nathanw }
260 1.1.8.2 nathanw #endif
261