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geodereg.h revision 1.5 
      1 /*	$NetBSD: geodereg.h,v 1.5 2006/03/08 00:24:06 dyoung Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2005 David Young.  All rights reserved.
      5  *
      6  * This code was written by David Young.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by David Young.
     19  * 4. The name of David Young may not be used to endorse or promote
     20  *    products derived from this software without specific prior
     21  *    written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY DAVID YOUNG ``AS IS'' AND ANY
     24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     25  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
     26  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL DAVID
     27  * YOUNG BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     28  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
     29  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     31  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     32  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
     34  * OF SUCH DAMAGE.
     35  */
     36 
     37 /*
     38  * Register definitions for the AMD Geode SC1100.
     39  */
     40 
     41 #ifndef _I386_PCI_GEODEREG_H_
     42 #define	_I386_PCI_GEODEREG_H_
     43 
     44 #include <lib/libkern/libkern.h>
     45 
     46 /* AMD Geode SC1100 X-Bus PCI Configuration Register: General
     47  * Configuration Block Scratchpad.  Set to 0x00000000 after chip reset.
     48  * The BIOS writes the base address of the General Configuration
     49  * Block to this register.
     50  */
     51 #define	SC1100_XBUS_CBA_SCRATCHPAD	0x64
     52 
     53 #define	SC1100_GCB_SIZE			64
     54 
     55 /* watchdog timeout register, 16 bits. */
     56 #define	SC1100_GCB_WDTO			0x00
     57 
     58 /* Watchdog configuration register, 16 bits. */
     59 #define	SC1100_GCB_WDCNFG		0x02
     60 #define	SC1100_WDCNFG_RESERVED		BITS(15,9)	/* write as read */
     61 
     62 /* 32kHz clock power-down, 0: clock is enabled, 1: clock is disabled. */
     63 #define	SC1100_WDCNFG_WD32KPD		BIT(8)
     64 
     65 /* Watchdog event type 1, and type 2
     66  *
     67  * 00: no action (default after POR# is asserted)
     68  * 01: interrupt
     69  * 10: SMI
     70  * 11: system reset
     71  */
     72 #define	SC1100_WDCNFG_WDTYPE2_MASK	BITS(7,6)
     73 #define	SC1100_WDCNFG_WDTYPE1_MASK	BITS(5,4)
     74 
     75 #define	SC1100_WDCNFG_WDTYPE2_NOACTION	SHIFTIN(0, SC1100_WDCNFG_WDTYPE2_MASK)
     76 #define	SC1100_WDCNFG_WDTYPE2_INTERRUPT	SHIFTIN(1, SC1100_WDCNFG_WDTYPE2_MASK)
     77 #define	SC1100_WDCNFG_WDTYPE2_SMI	SHIFTIN(2, SC1100_WDCNFG_WDTYPE2_MASK)
     78 #define	SC1100_WDCNFG_WDTYPE2_RESET	SHIFTIN(3, SC1100_WDCNFG_WDTYPE2_MASK)
     79 
     80 #define	SC1100_WDCNFG_WDTYPE1_NOACTION	SHIFTIN(0, SC1100_WDCNFG_WDTYPE1_MASK)
     81 #define	SC1100_WDCNFG_WDTYPE1_INTERRUPT	SHIFTIN(1, SC1100_WDCNFG_WDTYPE1_MASK)
     82 #define	SC1100_WDCNFG_WDTYPE1_SMI	SHIFTIN(2, SC1100_WDCNFG_WDTYPE1_MASK)
     83 #define	SC1100_WDCNFG_WDTYPE1_RESET	SHIFTIN(3, SC1100_WDCNFG_WDTYPE1_MASK)
     84 
     85 /* Watchdog timer prescaler
     86  *
     87  * The prescaler divisor is 2**WDPRES.  1110 (0xe) and 1111 (0xf) are
     88  * reserved values.
     89  */
     90 #define	SC1100_WDCNFG_WDPRES_MASK	BITS(3,0)
     91 #define	SC1100_WDCNFG_WDPRES_MAX	0xd
     92 
     93 /* Watchdog status register, 8 bits. */
     94 #define	SC1100_GCB_WDSTS		0x04
     95 #define	SC1100_WDSTS_RESERVED		BIT(7,4)	/* write as read */
     96 /* Set to 1 when watchdog reset is asserted.  Read-only.  Reset either by
     97  * POR# (power-on reset) or by writing 0 to WDOVF.
     98  */
     99 #define	SC1100_WDSTS_WDRST		BIT(3)
    100 /* Set to 1 when watchdog SMI is asserted.  Read-only.  Reset either by
    101  * POR# (power-on reset) or by writing 0 to WDOVF.
    102  */
    103 #define	SC1100_WDSTS_WDSMI		BIT(2)
    104 /* Set to 1 when watchdog interrupt is asserted.  Read-only.  Reset either by
    105  * POR# (power-on reset) or by writing 0 to WDOVF.
    106  */
    107 #define	SC1100_WDSTS_WDINT		BIT(1)
    108 /* Set to 1 when watchdog overflow is asserted.  Reset either by
    109  * POR# (power-on reset) or by writing 1 to this bit.
    110  */
    111 #define	SC1100_WDSTS_WDOVF		BIT(0)
    112 
    113 /*
    114  * Helpful constants
    115  */
    116 
    117 /* maximum watchdog interval in seconds */
    118 #define	SC1100_WDIVL_MAX	((1 << SC1100_WDCNFG_WDPRES_MAX) * \
    119 				 UINT16_MAX / SC1100_WDCLK_HZ)
    120 /* watchdog clock rate in Hertz */
    121 #define	SC1100_WDCLK_HZ	32000
    122 
    123 #endif /* _I386_PCI_GEODEREG_H_ */
    124