glxsb.c revision 1.2.18.3
1 1.2.18.3 yamt /* $NetBSD: glxsb.c,v 1.2.18.3 2008/01/21 09:37:13 yamt Exp $ */ 2 1.2.18.2 yamt /* $OpenBSD: glxsb.c,v 1.7 2007/02/12 14:31:45 tom Exp $ */ 3 1.2.18.2 yamt 4 1.2.18.2 yamt /* 5 1.2.18.2 yamt * Copyright (c) 2006 Tom Cosgrove <tom (at) openbsd.org> 6 1.2.18.2 yamt * Copyright (c) 2003, 2004 Theo de Raadt 7 1.2.18.2 yamt * Copyright (c) 2003 Jason Wright 8 1.2.18.2 yamt * 9 1.2.18.2 yamt * Permission to use, copy, modify, and distribute this software for any 10 1.2.18.2 yamt * purpose with or without fee is hereby granted, provided that the above 11 1.2.18.2 yamt * copyright notice and this permission notice appear in all copies. 12 1.2.18.2 yamt * 13 1.2.18.2 yamt * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 1.2.18.2 yamt * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 1.2.18.2 yamt * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 1.2.18.2 yamt * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 1.2.18.2 yamt * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 1.2.18.2 yamt * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 1.2.18.2 yamt * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 1.2.18.2 yamt */ 21 1.2.18.2 yamt 22 1.2.18.2 yamt /* 23 1.2.18.2 yamt * Driver for the security block on the AMD Geode LX processors 24 1.2.18.2 yamt * http://www.amd.com/files/connectivitysolutions/geode/geode_lx/33234d_lx_ds.pdf 25 1.2.18.2 yamt */ 26 1.2.18.2 yamt 27 1.2.18.2 yamt #include <sys/cdefs.h> 28 1.2.18.3 yamt __KERNEL_RCSID(0, "$NetBSD: glxsb.c,v 1.2.18.3 2008/01/21 09:37:13 yamt Exp $"); 29 1.2.18.3 yamt 30 1.2.18.2 yamt #include <sys/param.h> 31 1.2.18.2 yamt #include <sys/systm.h> 32 1.2.18.2 yamt #include <sys/device.h> 33 1.2.18.2 yamt #include <sys/malloc.h> 34 1.2.18.2 yamt #include <sys/mbuf.h> 35 1.2.18.2 yamt #include <sys/types.h> 36 1.2.18.2 yamt #include <sys/callout.h> 37 1.2.18.2 yamt #include <sys/rnd.h> 38 1.2.18.3 yamt #include <sys/bus.h> 39 1.2.18.2 yamt 40 1.2.18.3 yamt #include <machine/cpufunc.h> 41 1.2.18.2 yamt 42 1.2.18.2 yamt #include <dev/pci/pcivar.h> 43 1.2.18.2 yamt #include <dev/pci/pcidevs.h> 44 1.2.18.2 yamt 45 1.2.18.2 yamt #include <opencrypto/cryptodev.h> 46 1.2.18.2 yamt #include <crypto/rijndael/rijndael.h> 47 1.2.18.2 yamt 48 1.2.18.2 yamt #define SB_GLD_MSR_CAP 0x58002000 /* RO - Capabilities */ 49 1.2.18.2 yamt #define SB_GLD_MSR_CONFIG 0x58002001 /* RW - Master Config */ 50 1.2.18.2 yamt #define SB_GLD_MSR_SMI 0x58002002 /* RW - SMI */ 51 1.2.18.2 yamt #define SB_GLD_MSR_ERROR 0x58002003 /* RW - Error */ 52 1.2.18.2 yamt #define SB_GLD_MSR_PM 0x58002004 /* RW - Power Mgmt */ 53 1.2.18.2 yamt #define SB_GLD_MSR_DIAG 0x58002005 /* RW - Diagnostic */ 54 1.2.18.2 yamt #define SB_GLD_MSR_CTRL 0x58002006 /* RW - Security Block Cntrl */ 55 1.2.18.2 yamt 56 1.2.18.2 yamt /* For GLD_MSR_CTRL: */ 57 1.2.18.2 yamt #define SB_GMC_DIV0 0x0000 /* AES update divisor values */ 58 1.2.18.2 yamt #define SB_GMC_DIV1 0x0001 59 1.2.18.2 yamt #define SB_GMC_DIV2 0x0002 60 1.2.18.2 yamt #define SB_GMC_DIV3 0x0003 61 1.2.18.2 yamt #define SB_GMC_DIV_MASK 0x0003 62 1.2.18.2 yamt #define SB_GMC_SBI 0x0004 /* AES swap bits */ 63 1.2.18.2 yamt #define SB_GMC_SBY 0x0008 /* AES swap bytes */ 64 1.2.18.2 yamt #define SB_GMC_TW 0x0010 /* Time write (EEPROM) */ 65 1.2.18.2 yamt #define SB_GMC_T_SEL0 0x0000 /* RNG post-proc: none */ 66 1.2.18.2 yamt #define SB_GMC_T_SEL1 0x0100 /* RNG post-proc: LFSR */ 67 1.2.18.2 yamt #define SB_GMC_T_SEL2 0x0200 /* RNG post-proc: whitener */ 68 1.2.18.2 yamt #define SB_GMC_T_SEL3 0x0300 /* RNG LFSR+whitener */ 69 1.2.18.2 yamt #define SB_GMC_T_SEL_MASK 0x0300 70 1.2.18.2 yamt #define SB_GMC_T_NE 0x0400 /* Noise (generator) Enable */ 71 1.2.18.2 yamt #define SB_GMC_T_TM 0x0800 /* RNG test mode */ 72 1.2.18.2 yamt /* (deterministic) */ 73 1.2.18.2 yamt 74 1.2.18.2 yamt /* Security Block configuration/control registers (offsets from base) */ 75 1.2.18.2 yamt 76 1.2.18.2 yamt #define SB_CTL_A 0x0000 /* RW - SB Control A */ 77 1.2.18.2 yamt #define SB_CTL_B 0x0004 /* RW - SB Control B */ 78 1.2.18.2 yamt #define SB_AES_INT 0x0008 /* RW - SB AES Interrupt */ 79 1.2.18.2 yamt #define SB_SOURCE_A 0x0010 /* RW - Source A */ 80 1.2.18.2 yamt #define SB_DEST_A 0x0014 /* RW - Destination A */ 81 1.2.18.2 yamt #define SB_LENGTH_A 0x0018 /* RW - Length A */ 82 1.2.18.2 yamt #define SB_SOURCE_B 0x0020 /* RW - Source B */ 83 1.2.18.2 yamt #define SB_DEST_B 0x0024 /* RW - Destination B */ 84 1.2.18.2 yamt #define SB_LENGTH_B 0x0028 /* RW - Length B */ 85 1.2.18.2 yamt #define SB_WKEY 0x0030 /* WO - Writable Key 0-3 */ 86 1.2.18.2 yamt #define SB_WKEY_0 0x0030 /* WO - Writable Key 0 */ 87 1.2.18.2 yamt #define SB_WKEY_1 0x0034 /* WO - Writable Key 1 */ 88 1.2.18.2 yamt #define SB_WKEY_2 0x0038 /* WO - Writable Key 2 */ 89 1.2.18.2 yamt #define SB_WKEY_3 0x003C /* WO - Writable Key 3 */ 90 1.2.18.2 yamt #define SB_CBC_IV 0x0040 /* RW - CBC IV 0-3 */ 91 1.2.18.2 yamt #define SB_CBC_IV_0 0x0040 /* RW - CBC IV 0 */ 92 1.2.18.2 yamt #define SB_CBC_IV_1 0x0044 /* RW - CBC IV 1 */ 93 1.2.18.2 yamt #define SB_CBC_IV_2 0x0048 /* RW - CBC IV 2 */ 94 1.2.18.2 yamt #define SB_CBC_IV_3 0x004C /* RW - CBC IV 3 */ 95 1.2.18.2 yamt #define SB_RANDOM_NUM 0x0050 /* RW - Random Number */ 96 1.2.18.2 yamt #define SB_RANDOM_NUM_STATUS 0x0054 /* RW - Random Number Status */ 97 1.2.18.2 yamt #define SB_EEPROM_COMM 0x0800 /* RW - EEPROM Command */ 98 1.2.18.2 yamt #define SB_EEPROM_ADDR 0x0804 /* RW - EEPROM Address */ 99 1.2.18.2 yamt #define SB_EEPROM_DATA 0x0808 /* RW - EEPROM Data */ 100 1.2.18.2 yamt #define SB_EEPROM_SEC_STATE 0x080C /* RW - EEPROM Security State */ 101 1.2.18.2 yamt 102 1.2.18.2 yamt /* For SB_CTL_A and _B */ 103 1.2.18.2 yamt #define SB_CTL_ST 0x0001 /* Start operation (enc/dec) */ 104 1.2.18.2 yamt #define SB_CTL_ENC 0x0002 /* Encrypt (0 is decrypt) */ 105 1.2.18.2 yamt #define SB_CTL_DEC 0x0000 /* Decrypt */ 106 1.2.18.2 yamt #define SB_CTL_WK 0x0004 /* Use writable key (we set) */ 107 1.2.18.2 yamt #define SB_CTL_DC 0x0008 /* Destination coherent */ 108 1.2.18.2 yamt #define SB_CTL_SC 0x0010 /* Source coherent */ 109 1.2.18.2 yamt #define SB_CTL_CBC 0x0020 /* CBC (0 is ECB) */ 110 1.2.18.2 yamt 111 1.2.18.2 yamt /* For SB_AES_INT */ 112 1.2.18.2 yamt #define SB_AI_DISABLE_AES_A 0x0001 /* Disable AES A compl int */ 113 1.2.18.2 yamt #define SB_AI_ENABLE_AES_A 0x0000 /* Enable AES A compl int */ 114 1.2.18.2 yamt #define SB_AI_DISABLE_AES_B 0x0002 /* Disable AES B compl int */ 115 1.2.18.2 yamt #define SB_AI_ENABLE_AES_B 0x0000 /* Enable AES B compl int */ 116 1.2.18.2 yamt #define SB_AI_DISABLE_EEPROM 0x0004 /* Disable EEPROM op comp int */ 117 1.2.18.2 yamt #define SB_AI_ENABLE_EEPROM 0x0000 /* Enable EEPROM op compl int */ 118 1.2.18.2 yamt #define SB_AI_AES_A_COMPLETE 0x0100 /* AES A operation complete */ 119 1.2.18.2 yamt #define SB_AI_AES_B_COMPLETE 0x0200 /* AES B operation complete */ 120 1.2.18.2 yamt #define SB_AI_EEPROM_COMPLETE 0x0400 /* EEPROM operation complete */ 121 1.2.18.2 yamt 122 1.2.18.2 yamt #define SB_RNS_TRNG_VALID 0x0001 /* in SB_RANDOM_NUM_STATUS */ 123 1.2.18.2 yamt 124 1.2.18.2 yamt #define SB_MEM_SIZE 0x0810 /* Size of memory block */ 125 1.2.18.2 yamt 126 1.2.18.2 yamt #define SB_AES_ALIGN 0x0010 /* Source and dest buffers */ 127 1.2.18.2 yamt /* must be 16-byte aligned */ 128 1.2.18.2 yamt #define SB_AES_BLOCK_SIZE 0x0010 129 1.2.18.2 yamt 130 1.2.18.2 yamt /* 131 1.2.18.2 yamt * The Geode LX security block AES acceleration doesn't perform scatter- 132 1.2.18.2 yamt * gather: it just takes source and destination addresses. Therefore the 133 1.2.18.2 yamt * plain- and ciphertexts need to be contiguous. To this end, we allocate 134 1.2.18.2 yamt * a buffer for both, and accept the overhead of copying in and out. If 135 1.2.18.2 yamt * the number of bytes in one operation is bigger than allowed for by the 136 1.2.18.2 yamt * buffer (buffer is twice the size of the max length, as it has both input 137 1.2.18.2 yamt * and output) then we have to perform multiple encryptions/decryptions. 138 1.2.18.2 yamt */ 139 1.2.18.2 yamt #define GLXSB_MAX_AES_LEN 16384 140 1.2.18.2 yamt 141 1.2.18.2 yamt struct glxsb_dma_map { 142 1.2.18.2 yamt bus_dmamap_t dma_map; 143 1.2.18.2 yamt bus_dma_segment_t dma_seg; 144 1.2.18.2 yamt int dma_nsegs; 145 1.2.18.2 yamt int dma_size; 146 1.2.18.2 yamt void * dma_vaddr; 147 1.2.18.2 yamt uint32_t dma_paddr; 148 1.2.18.2 yamt }; 149 1.2.18.2 yamt struct glxsb_session { 150 1.2.18.2 yamt uint32_t ses_key[4]; 151 1.2.18.2 yamt uint8_t ses_iv[SB_AES_BLOCK_SIZE]; 152 1.2.18.2 yamt int ses_klen; 153 1.2.18.2 yamt int ses_used; 154 1.2.18.2 yamt }; 155 1.2.18.2 yamt 156 1.2.18.2 yamt struct glxsb_softc { 157 1.2.18.2 yamt struct device sc_dev; 158 1.2.18.2 yamt bus_space_tag_t sc_iot; 159 1.2.18.2 yamt bus_space_handle_t sc_ioh; 160 1.2.18.2 yamt struct callout sc_co; 161 1.2.18.2 yamt 162 1.2.18.2 yamt bus_dma_tag_t sc_dmat; 163 1.2.18.2 yamt struct glxsb_dma_map sc_dma; 164 1.2.18.2 yamt int32_t sc_cid; 165 1.2.18.2 yamt int sc_nsessions; 166 1.2.18.2 yamt struct glxsb_session *sc_sessions; 167 1.2.18.2 yamt 168 1.2.18.2 yamt rndsource_element_t sc_rnd_source; 169 1.2.18.2 yamt }; 170 1.2.18.2 yamt 171 1.2.18.2 yamt int glxsb_match(struct device *, struct cfdata *, void *); 172 1.2.18.2 yamt void glxsb_attach(struct device *, struct device *, void *); 173 1.2.18.2 yamt void glxsb_rnd(void *); 174 1.2.18.2 yamt 175 1.2.18.2 yamt CFATTACH_DECL(glxsb, sizeof(struct glxsb_softc), glxsb_match, glxsb_attach, 176 1.2.18.2 yamt NULL, NULL); 177 1.2.18.2 yamt 178 1.2.18.2 yamt #define GLXSB_SESSION(sid) ((sid) & 0x0fffffff) 179 1.2.18.2 yamt #define GLXSB_SID(crd,ses) (((crd) << 28) | ((ses) & 0x0fffffff)) 180 1.2.18.2 yamt 181 1.2.18.2 yamt int glxsb_crypto_setup(struct glxsb_softc *); 182 1.2.18.2 yamt int glxsb_crypto_newsession(void *, uint32_t *, struct cryptoini *); 183 1.2.18.2 yamt int glxsb_crypto_process(void *, struct cryptop *, int); 184 1.2.18.2 yamt int glxsb_crypto_freesession(void *, uint64_t); 185 1.2.18.2 yamt static __inline void glxsb_aes(struct glxsb_softc *, uint32_t, uint32_t, 186 1.2.18.2 yamt uint32_t, void *, int, void *); 187 1.2.18.2 yamt 188 1.2.18.2 yamt int glxsb_dma_alloc(struct glxsb_softc *, int, struct glxsb_dma_map *); 189 1.2.18.2 yamt void glxsb_dma_pre_op(struct glxsb_softc *, struct glxsb_dma_map *); 190 1.2.18.2 yamt void glxsb_dma_post_op(struct glxsb_softc *, struct glxsb_dma_map *); 191 1.2.18.2 yamt void glxsb_dma_free(struct glxsb_softc *, struct glxsb_dma_map *); 192 1.2.18.2 yamt 193 1.2.18.2 yamt int 194 1.2.18.2 yamt glxsb_match(struct device *parent, struct cfdata *match, void *aux) 195 1.2.18.2 yamt { 196 1.2.18.2 yamt struct pci_attach_args *pa = aux; 197 1.2.18.2 yamt 198 1.2.18.2 yamt if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD && 199 1.2.18.2 yamt PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_GEODELX_AES) 200 1.2.18.2 yamt return (1); 201 1.2.18.2 yamt 202 1.2.18.2 yamt return (0); 203 1.2.18.2 yamt } 204 1.2.18.2 yamt 205 1.2.18.2 yamt void 206 1.2.18.2 yamt glxsb_attach(struct device *parent, struct device *self, void *aux) 207 1.2.18.2 yamt { 208 1.2.18.2 yamt struct glxsb_softc *sc = (void *) self; 209 1.2.18.2 yamt struct pci_attach_args *pa = aux; 210 1.2.18.2 yamt bus_addr_t membase; 211 1.2.18.2 yamt bus_size_t memsize; 212 1.2.18.2 yamt uint64_t msr; 213 1.2.18.2 yamt uint32_t intr; 214 1.2.18.2 yamt 215 1.2.18.2 yamt msr = rdmsr(SB_GLD_MSR_CAP); 216 1.2.18.2 yamt if ((msr & 0xFFFF00) != 0x130400) { 217 1.2.18.2 yamt printf(": unknown ID 0x%x\n", (int) ((msr & 0xFFFF00) >> 16)); 218 1.2.18.2 yamt return; 219 1.2.18.2 yamt } 220 1.2.18.2 yamt 221 1.2.18.2 yamt /* printf(": revision %d", (int) (msr & 0xFF)); */ 222 1.2.18.2 yamt 223 1.2.18.2 yamt /* Map in the security block configuration/control registers */ 224 1.2.18.2 yamt if (pci_mapreg_map(pa, PCI_MAPREG_START, 225 1.2.18.2 yamt PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, 226 1.2.18.2 yamt &sc->sc_iot, &sc->sc_ioh, &membase, &memsize)) { 227 1.2.18.2 yamt printf(": can't find mem space\n"); 228 1.2.18.2 yamt return; 229 1.2.18.2 yamt } 230 1.2.18.2 yamt 231 1.2.18.2 yamt /* 232 1.2.18.2 yamt * Configure the Security Block. 233 1.2.18.2 yamt * 234 1.2.18.2 yamt * We want to enable the noise generator (T_NE), and enable the 235 1.2.18.2 yamt * linear feedback shift register and whitener post-processing 236 1.2.18.2 yamt * (T_SEL = 3). Also ensure that test mode (deterministic values) 237 1.2.18.2 yamt * is disabled. 238 1.2.18.2 yamt */ 239 1.2.18.2 yamt msr = rdmsr(SB_GLD_MSR_CTRL); 240 1.2.18.2 yamt msr &= ~(SB_GMC_T_TM | SB_GMC_T_SEL_MASK); 241 1.2.18.2 yamt msr |= SB_GMC_T_NE | SB_GMC_T_SEL3; 242 1.2.18.2 yamt #if 0 243 1.2.18.2 yamt msr |= SB_GMC_SBI | SB_GMC_SBY; /* for AES, if necessary */ 244 1.2.18.2 yamt #endif 245 1.2.18.2 yamt wrmsr(SB_GLD_MSR_CTRL, msr); 246 1.2.18.2 yamt 247 1.2.18.2 yamt rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname, 248 1.2.18.2 yamt RND_TYPE_RNG, RND_FLAG_NO_ESTIMATE); 249 1.2.18.2 yamt 250 1.2.18.2 yamt /* Install a periodic collector for the "true" (AMD's word) RNG */ 251 1.2.18.2 yamt callout_init(&sc->sc_co, 0); 252 1.2.18.2 yamt callout_setfunc(&sc->sc_co, glxsb_rnd, sc); 253 1.2.18.2 yamt glxsb_rnd(sc); 254 1.2.18.2 yamt printf(": RNG"); 255 1.2.18.2 yamt 256 1.2.18.2 yamt /* We don't have an interrupt handler, so disable completion INTs */ 257 1.2.18.2 yamt intr = SB_AI_DISABLE_AES_A | SB_AI_DISABLE_AES_B | 258 1.2.18.2 yamt SB_AI_DISABLE_EEPROM | SB_AI_AES_A_COMPLETE | 259 1.2.18.2 yamt SB_AI_AES_B_COMPLETE | SB_AI_EEPROM_COMPLETE; 260 1.2.18.2 yamt bus_space_write_4(sc->sc_iot, sc->sc_ioh, SB_AES_INT, intr); 261 1.2.18.2 yamt 262 1.2.18.2 yamt sc->sc_dmat = pa->pa_dmat; 263 1.2.18.2 yamt 264 1.2.18.2 yamt if (glxsb_crypto_setup(sc)) 265 1.2.18.2 yamt printf(" AES"); 266 1.2.18.2 yamt 267 1.2.18.2 yamt printf("\n"); 268 1.2.18.2 yamt } 269 1.2.18.2 yamt 270 1.2.18.2 yamt void 271 1.2.18.2 yamt glxsb_rnd(void *v) 272 1.2.18.2 yamt { 273 1.2.18.2 yamt struct glxsb_softc *sc = v; 274 1.2.18.2 yamt uint32_t status, value; 275 1.2.18.2 yamt extern int hz; 276 1.2.18.2 yamt 277 1.2.18.2 yamt status = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SB_RANDOM_NUM_STATUS); 278 1.2.18.2 yamt if (status & SB_RNS_TRNG_VALID) { 279 1.2.18.2 yamt value = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SB_RANDOM_NUM); 280 1.2.18.2 yamt rnd_add_uint32(&sc->sc_rnd_source, value); 281 1.2.18.2 yamt } 282 1.2.18.2 yamt 283 1.2.18.2 yamt callout_schedule(&sc->sc_co, (hz > 100) ? (hz / 100) : 1); 284 1.2.18.2 yamt } 285 1.2.18.2 yamt 286 1.2.18.2 yamt int 287 1.2.18.2 yamt glxsb_crypto_setup(struct glxsb_softc *sc) 288 1.2.18.2 yamt { 289 1.2.18.2 yamt 290 1.2.18.2 yamt /* Allocate a contiguous DMA-able buffer to work in */ 291 1.2.18.2 yamt if (glxsb_dma_alloc(sc, GLXSB_MAX_AES_LEN * 2, &sc->sc_dma) != 0) 292 1.2.18.2 yamt return 0; 293 1.2.18.2 yamt 294 1.2.18.2 yamt sc->sc_cid = crypto_get_driverid(0); 295 1.2.18.2 yamt if (sc->sc_cid < 0) 296 1.2.18.2 yamt return 0; 297 1.2.18.2 yamt 298 1.2.18.2 yamt crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0, 299 1.2.18.2 yamt glxsb_crypto_newsession, glxsb_crypto_freesession, 300 1.2.18.2 yamt glxsb_crypto_process, sc); 301 1.2.18.2 yamt 302 1.2.18.2 yamt sc->sc_nsessions = 0; 303 1.2.18.2 yamt 304 1.2.18.2 yamt return 1; 305 1.2.18.2 yamt } 306 1.2.18.2 yamt 307 1.2.18.2 yamt int 308 1.2.18.2 yamt glxsb_crypto_newsession(void *aux, uint32_t *sidp, struct cryptoini *cri) 309 1.2.18.2 yamt { 310 1.2.18.2 yamt struct glxsb_softc *sc = aux; 311 1.2.18.2 yamt struct glxsb_session *ses = NULL; 312 1.2.18.2 yamt int sesn; 313 1.2.18.2 yamt 314 1.2.18.2 yamt if (sc == NULL || sidp == NULL || cri == NULL || 315 1.2.18.2 yamt cri->cri_next != NULL || cri->cri_alg != CRYPTO_AES_CBC || 316 1.2.18.2 yamt cri->cri_klen != 128) 317 1.2.18.2 yamt return (EINVAL); 318 1.2.18.2 yamt 319 1.2.18.2 yamt for (sesn = 0; sesn < sc->sc_nsessions; sesn++) { 320 1.2.18.2 yamt if (sc->sc_sessions[sesn].ses_used == 0) { 321 1.2.18.2 yamt ses = &sc->sc_sessions[sesn]; 322 1.2.18.2 yamt break; 323 1.2.18.2 yamt } 324 1.2.18.2 yamt } 325 1.2.18.2 yamt 326 1.2.18.2 yamt if (ses == NULL) { 327 1.2.18.2 yamt sesn = sc->sc_nsessions; 328 1.2.18.2 yamt ses = malloc((sesn + 1) * sizeof(*ses), M_DEVBUF, M_NOWAIT); 329 1.2.18.2 yamt if (ses == NULL) 330 1.2.18.2 yamt return (ENOMEM); 331 1.2.18.2 yamt if (sesn != 0) { 332 1.2.18.2 yamt bcopy(sc->sc_sessions, ses, sesn * sizeof(*ses)); 333 1.2.18.2 yamt bzero(sc->sc_sessions, sesn * sizeof(*ses)); 334 1.2.18.2 yamt free(sc->sc_sessions, M_DEVBUF); 335 1.2.18.2 yamt } 336 1.2.18.2 yamt sc->sc_sessions = ses; 337 1.2.18.2 yamt ses = &sc->sc_sessions[sesn]; 338 1.2.18.2 yamt sc->sc_nsessions++; 339 1.2.18.2 yamt } 340 1.2.18.2 yamt 341 1.2.18.2 yamt bzero(ses, sizeof(*ses)); 342 1.2.18.2 yamt ses->ses_used = 1; 343 1.2.18.2 yamt 344 1.2.18.2 yamt arc4randbytes(ses->ses_iv, sizeof(ses->ses_iv)); 345 1.2.18.2 yamt ses->ses_klen = cri->cri_klen; 346 1.2.18.2 yamt 347 1.2.18.2 yamt /* Copy the key (Geode LX wants the primary key only) */ 348 1.2.18.2 yamt bcopy(cri->cri_key, ses->ses_key, sizeof(ses->ses_key)); 349 1.2.18.2 yamt 350 1.2.18.2 yamt *sidp = GLXSB_SID(0, sesn); 351 1.2.18.2 yamt return (0); 352 1.2.18.2 yamt } 353 1.2.18.2 yamt 354 1.2.18.2 yamt int 355 1.2.18.2 yamt glxsb_crypto_freesession(void *aux, uint64_t tid) 356 1.2.18.2 yamt { 357 1.2.18.2 yamt struct glxsb_softc *sc = aux; 358 1.2.18.2 yamt int sesn; 359 1.2.18.2 yamt uint32_t sid = ((uint32_t)tid) & 0xffffffff; 360 1.2.18.2 yamt 361 1.2.18.2 yamt if (sc == NULL) 362 1.2.18.2 yamt return (EINVAL); 363 1.2.18.2 yamt sesn = GLXSB_SESSION(sid); 364 1.2.18.2 yamt if (sesn >= sc->sc_nsessions) 365 1.2.18.2 yamt return (EINVAL); 366 1.2.18.2 yamt bzero(&sc->sc_sessions[sesn], sizeof(sc->sc_sessions[sesn])); 367 1.2.18.2 yamt return (0); 368 1.2.18.2 yamt } 369 1.2.18.2 yamt 370 1.2.18.2 yamt /* 371 1.2.18.2 yamt * Must be called at splnet() or higher 372 1.2.18.2 yamt */ 373 1.2.18.2 yamt static __inline void 374 1.2.18.2 yamt glxsb_aes(struct glxsb_softc *sc, uint32_t control, uint32_t psrc, 375 1.2.18.2 yamt uint32_t pdst, void *key, int len, void *iv) 376 1.2.18.2 yamt { 377 1.2.18.2 yamt uint32_t status; 378 1.2.18.2 yamt int i; 379 1.2.18.2 yamt 380 1.2.18.2 yamt if (len & 0xF) { 381 1.2.18.2 yamt printf("%s: len must be a multiple of 16 (not %d)\n", 382 1.2.18.2 yamt sc->sc_dev.dv_xname, len); 383 1.2.18.2 yamt return; 384 1.2.18.2 yamt } 385 1.2.18.2 yamt 386 1.2.18.2 yamt /* Set the source */ 387 1.2.18.2 yamt bus_space_write_4(sc->sc_iot, sc->sc_ioh, SB_SOURCE_A, psrc); 388 1.2.18.2 yamt 389 1.2.18.2 yamt /* Set the destination address */ 390 1.2.18.2 yamt bus_space_write_4(sc->sc_iot, sc->sc_ioh, SB_DEST_A, pdst); 391 1.2.18.2 yamt 392 1.2.18.2 yamt /* Set the data length */ 393 1.2.18.2 yamt bus_space_write_4(sc->sc_iot, sc->sc_ioh, SB_LENGTH_A, len); 394 1.2.18.2 yamt 395 1.2.18.2 yamt /* Set the IV */ 396 1.2.18.2 yamt if (iv != NULL) { 397 1.2.18.2 yamt bus_space_write_region_4(sc->sc_iot, sc->sc_ioh, 398 1.2.18.2 yamt SB_CBC_IV, iv, 4); 399 1.2.18.2 yamt control |= SB_CTL_CBC; 400 1.2.18.2 yamt } 401 1.2.18.2 yamt 402 1.2.18.2 yamt /* Set the key */ 403 1.2.18.2 yamt bus_space_write_region_4(sc->sc_iot, sc->sc_ioh, SB_WKEY, key, 4); 404 1.2.18.2 yamt 405 1.2.18.2 yamt /* Ask the security block to do it */ 406 1.2.18.2 yamt bus_space_write_4(sc->sc_iot, sc->sc_ioh, SB_CTL_A, 407 1.2.18.2 yamt control | SB_CTL_WK | SB_CTL_DC | SB_CTL_SC | SB_CTL_ST); 408 1.2.18.2 yamt 409 1.2.18.2 yamt /* 410 1.2.18.2 yamt * Now wait until it is done. 411 1.2.18.2 yamt * 412 1.2.18.2 yamt * We do a busy wait. Obviously the number of iterations of 413 1.2.18.2 yamt * the loop required to perform the AES operation depends upon 414 1.2.18.2 yamt * the number of bytes to process. 415 1.2.18.2 yamt * 416 1.2.18.2 yamt * On a 500 MHz Geode LX we see 417 1.2.18.2 yamt * 418 1.2.18.2 yamt * length (bytes) typical max iterations 419 1.2.18.2 yamt * 16 12 420 1.2.18.2 yamt * 64 22 421 1.2.18.2 yamt * 256 59 422 1.2.18.2 yamt * 1024 212 423 1.2.18.2 yamt * 8192 1,537 424 1.2.18.2 yamt * 425 1.2.18.2 yamt * Since we have a maximum size of operation defined in 426 1.2.18.2 yamt * GLXSB_MAX_AES_LEN, we use this constant to decide how long 427 1.2.18.2 yamt * to wait. Allow an order of magnitude longer than it should 428 1.2.18.2 yamt * really take, just in case. 429 1.2.18.2 yamt */ 430 1.2.18.2 yamt for (i = 0; i < GLXSB_MAX_AES_LEN * 10; i++) { 431 1.2.18.2 yamt status = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SB_CTL_A); 432 1.2.18.2 yamt 433 1.2.18.2 yamt if ((status & SB_CTL_ST) == 0) /* Done */ 434 1.2.18.2 yamt return; 435 1.2.18.2 yamt } 436 1.2.18.2 yamt 437 1.2.18.2 yamt printf("%s: operation failed to complete\n", sc->sc_dev.dv_xname); 438 1.2.18.2 yamt } 439 1.2.18.2 yamt 440 1.2.18.2 yamt int 441 1.2.18.2 yamt glxsb_crypto_process(void *aux, struct cryptop *crp, int hint) 442 1.2.18.2 yamt { 443 1.2.18.2 yamt struct glxsb_softc *sc = aux; 444 1.2.18.2 yamt struct glxsb_session *ses; 445 1.2.18.2 yamt struct cryptodesc *crd; 446 1.2.18.2 yamt char *op_src, *op_dst; 447 1.2.18.2 yamt uint32_t op_psrc, op_pdst; 448 1.2.18.2 yamt uint8_t op_iv[SB_AES_BLOCK_SIZE], *piv; 449 1.2.18.2 yamt int sesn, err = 0; 450 1.2.18.2 yamt int len, tlen, xlen; 451 1.2.18.2 yamt int offset; 452 1.2.18.2 yamt uint32_t control; 453 1.2.18.2 yamt int s; 454 1.2.18.2 yamt 455 1.2.18.2 yamt s = splnet(); 456 1.2.18.2 yamt 457 1.2.18.2 yamt if (crp == NULL || crp->crp_callback == NULL) { 458 1.2.18.2 yamt err = EINVAL; 459 1.2.18.2 yamt goto out; 460 1.2.18.2 yamt } 461 1.2.18.2 yamt crd = crp->crp_desc; 462 1.2.18.2 yamt if (crd == NULL || crd->crd_next != NULL || 463 1.2.18.2 yamt crd->crd_alg != CRYPTO_AES_CBC || 464 1.2.18.2 yamt (crd->crd_len % SB_AES_BLOCK_SIZE) != 0) { 465 1.2.18.2 yamt err = EINVAL; 466 1.2.18.2 yamt goto out; 467 1.2.18.2 yamt } 468 1.2.18.2 yamt 469 1.2.18.2 yamt sesn = GLXSB_SESSION(crp->crp_sid); 470 1.2.18.2 yamt if (sesn >= sc->sc_nsessions) { 471 1.2.18.2 yamt err = EINVAL; 472 1.2.18.2 yamt goto out; 473 1.2.18.2 yamt } 474 1.2.18.2 yamt ses = &sc->sc_sessions[sesn]; 475 1.2.18.2 yamt 476 1.2.18.2 yamt /* How much of our buffer will we need to use? */ 477 1.2.18.2 yamt xlen = crd->crd_len > GLXSB_MAX_AES_LEN ? 478 1.2.18.2 yamt GLXSB_MAX_AES_LEN : crd->crd_len; 479 1.2.18.2 yamt 480 1.2.18.2 yamt /* 481 1.2.18.2 yamt * XXX Check if we can have input == output on Geode LX. 482 1.2.18.2 yamt * XXX In the meantime, use two separate (adjacent) buffers. 483 1.2.18.2 yamt */ 484 1.2.18.2 yamt op_src = sc->sc_dma.dma_vaddr; 485 1.2.18.2 yamt op_dst = (char *)sc->sc_dma.dma_vaddr + xlen; 486 1.2.18.2 yamt 487 1.2.18.2 yamt op_psrc = sc->sc_dma.dma_paddr; 488 1.2.18.2 yamt op_pdst = sc->sc_dma.dma_paddr + xlen; 489 1.2.18.2 yamt 490 1.2.18.2 yamt if (crd->crd_flags & CRD_F_ENCRYPT) { 491 1.2.18.2 yamt control = SB_CTL_ENC; 492 1.2.18.2 yamt if (crd->crd_flags & CRD_F_IV_EXPLICIT) 493 1.2.18.2 yamt bcopy(crd->crd_iv, op_iv, sizeof(op_iv)); 494 1.2.18.2 yamt else 495 1.2.18.2 yamt bcopy(ses->ses_iv, op_iv, sizeof(op_iv)); 496 1.2.18.2 yamt 497 1.2.18.2 yamt if ((crd->crd_flags & CRD_F_IV_PRESENT) == 0) { 498 1.2.18.2 yamt if (crp->crp_flags & CRYPTO_F_IMBUF) 499 1.2.18.2 yamt m_copyback((struct mbuf *)crp->crp_buf, 500 1.2.18.2 yamt crd->crd_inject, sizeof(op_iv), op_iv); 501 1.2.18.2 yamt else if (crp->crp_flags & CRYPTO_F_IOV) 502 1.2.18.2 yamt cuio_copyback((struct uio *)crp->crp_buf, 503 1.2.18.2 yamt crd->crd_inject, sizeof(op_iv), op_iv); 504 1.2.18.2 yamt else 505 1.2.18.2 yamt bcopy(op_iv, 506 1.2.18.2 yamt (char *)crp->crp_buf + crd->crd_inject, 507 1.2.18.2 yamt sizeof(op_iv)); 508 1.2.18.2 yamt } 509 1.2.18.2 yamt } else { 510 1.2.18.2 yamt control = SB_CTL_DEC; 511 1.2.18.2 yamt if (crd->crd_flags & CRD_F_IV_EXPLICIT) 512 1.2.18.2 yamt bcopy(crd->crd_iv, op_iv, sizeof(op_iv)); 513 1.2.18.2 yamt else { 514 1.2.18.2 yamt if (crp->crp_flags & CRYPTO_F_IMBUF) 515 1.2.18.2 yamt m_copydata((struct mbuf *)crp->crp_buf, 516 1.2.18.2 yamt crd->crd_inject, sizeof(op_iv), op_iv); 517 1.2.18.2 yamt else if (crp->crp_flags & CRYPTO_F_IOV) 518 1.2.18.2 yamt cuio_copydata((struct uio *)crp->crp_buf, 519 1.2.18.2 yamt crd->crd_inject, sizeof(op_iv), op_iv); 520 1.2.18.2 yamt else 521 1.2.18.2 yamt bcopy((char *)crp->crp_buf + crd->crd_inject, 522 1.2.18.2 yamt op_iv, sizeof(op_iv)); 523 1.2.18.2 yamt } 524 1.2.18.2 yamt } 525 1.2.18.2 yamt 526 1.2.18.2 yamt offset = 0; 527 1.2.18.2 yamt tlen = crd->crd_len; 528 1.2.18.2 yamt piv = op_iv; 529 1.2.18.2 yamt 530 1.2.18.2 yamt /* Process the data in GLXSB_MAX_AES_LEN chunks */ 531 1.2.18.2 yamt while (tlen > 0) { 532 1.2.18.2 yamt len = (tlen > GLXSB_MAX_AES_LEN) ? GLXSB_MAX_AES_LEN : tlen; 533 1.2.18.2 yamt 534 1.2.18.2 yamt if (crp->crp_flags & CRYPTO_F_IMBUF) 535 1.2.18.2 yamt m_copydata((struct mbuf *)crp->crp_buf, 536 1.2.18.2 yamt crd->crd_skip + offset, len, op_src); 537 1.2.18.2 yamt else if (crp->crp_flags & CRYPTO_F_IOV) 538 1.2.18.2 yamt cuio_copydata((struct uio *)crp->crp_buf, 539 1.2.18.2 yamt crd->crd_skip + offset, len, op_src); 540 1.2.18.2 yamt else 541 1.2.18.2 yamt bcopy((char *)crp->crp_buf + crd->crd_skip + offset, 542 1.2.18.2 yamt op_src, len); 543 1.2.18.2 yamt 544 1.2.18.2 yamt glxsb_dma_pre_op(sc, &sc->sc_dma); 545 1.2.18.2 yamt 546 1.2.18.2 yamt glxsb_aes(sc, control, op_psrc, op_pdst, ses->ses_key, 547 1.2.18.2 yamt len, op_iv); 548 1.2.18.2 yamt 549 1.2.18.2 yamt glxsb_dma_post_op(sc, &sc->sc_dma); 550 1.2.18.2 yamt 551 1.2.18.2 yamt if (crp->crp_flags & CRYPTO_F_IMBUF) 552 1.2.18.2 yamt m_copyback((struct mbuf *)crp->crp_buf, 553 1.2.18.2 yamt crd->crd_skip + offset, len, op_dst); 554 1.2.18.2 yamt else if (crp->crp_flags & CRYPTO_F_IOV) 555 1.2.18.2 yamt cuio_copyback((struct uio *)crp->crp_buf, 556 1.2.18.2 yamt crd->crd_skip + offset, len, op_dst); 557 1.2.18.2 yamt else 558 1.2.18.2 yamt bcopy(op_dst, (char *)crp->crp_buf + crd->crd_skip + offset, 559 1.2.18.2 yamt len); 560 1.2.18.2 yamt 561 1.2.18.2 yamt offset += len; 562 1.2.18.2 yamt tlen -= len; 563 1.2.18.2 yamt 564 1.2.18.2 yamt if (tlen <= 0) { /* Ideally, just == 0 */ 565 1.2.18.2 yamt /* Finished - put the IV in session IV */ 566 1.2.18.2 yamt piv = ses->ses_iv; 567 1.2.18.2 yamt } 568 1.2.18.2 yamt 569 1.2.18.2 yamt /* 570 1.2.18.2 yamt * Copy out last block for use as next iteration/session IV. 571 1.2.18.2 yamt * 572 1.2.18.2 yamt * piv is set to op_iv[] before the loop starts, but is 573 1.2.18.2 yamt * set to ses->ses_iv if we're going to exit the loop this 574 1.2.18.2 yamt * time. 575 1.2.18.2 yamt */ 576 1.2.18.2 yamt if (crd->crd_flags & CRD_F_ENCRYPT) { 577 1.2.18.2 yamt bcopy(op_dst + len - sizeof(op_iv), piv, sizeof(op_iv)); 578 1.2.18.2 yamt } else { 579 1.2.18.2 yamt /* Decryption, only need this if another iteration */ 580 1.2.18.2 yamt if (tlen > 0) { 581 1.2.18.2 yamt bcopy(op_src + len - sizeof(op_iv), piv, 582 1.2.18.2 yamt sizeof(op_iv)); 583 1.2.18.2 yamt } 584 1.2.18.2 yamt } 585 1.2.18.2 yamt } 586 1.2.18.2 yamt 587 1.2.18.2 yamt /* All AES processing has now been done. */ 588 1.2.18.2 yamt 589 1.2.18.2 yamt bzero(sc->sc_dma.dma_vaddr, xlen * 2); 590 1.2.18.2 yamt out: 591 1.2.18.2 yamt crp->crp_etype = err; 592 1.2.18.2 yamt crypto_done(crp); 593 1.2.18.2 yamt splx(s); 594 1.2.18.2 yamt return (err); 595 1.2.18.2 yamt } 596 1.2.18.2 yamt 597 1.2.18.2 yamt int 598 1.2.18.2 yamt glxsb_dma_alloc(struct glxsb_softc *sc, int size, struct glxsb_dma_map *dma) 599 1.2.18.2 yamt { 600 1.2.18.2 yamt int rc; 601 1.2.18.2 yamt 602 1.2.18.2 yamt dma->dma_nsegs = 1; 603 1.2.18.2 yamt dma->dma_size = size; 604 1.2.18.2 yamt 605 1.2.18.2 yamt rc = bus_dmamap_create(sc->sc_dmat, size, dma->dma_nsegs, size, 606 1.2.18.2 yamt 0, BUS_DMA_NOWAIT, &dma->dma_map); 607 1.2.18.2 yamt if (rc != 0) { 608 1.2.18.2 yamt printf("%s: couldn't create DMA map for %d bytes (%d)\n", 609 1.2.18.2 yamt sc->sc_dev.dv_xname, size, rc); 610 1.2.18.2 yamt 611 1.2.18.2 yamt goto fail0; 612 1.2.18.2 yamt } 613 1.2.18.2 yamt 614 1.2.18.2 yamt rc = bus_dmamem_alloc(sc->sc_dmat, size, SB_AES_ALIGN, 0, 615 1.2.18.2 yamt &dma->dma_seg, dma->dma_nsegs, &dma->dma_nsegs, BUS_DMA_NOWAIT); 616 1.2.18.2 yamt if (rc != 0) { 617 1.2.18.2 yamt printf("%s: couldn't allocate DMA memory of %d bytes (%d)\n", 618 1.2.18.2 yamt sc->sc_dev.dv_xname, size, rc); 619 1.2.18.2 yamt 620 1.2.18.2 yamt goto fail1; 621 1.2.18.2 yamt } 622 1.2.18.2 yamt 623 1.2.18.2 yamt rc = bus_dmamem_map(sc->sc_dmat, &dma->dma_seg, 1, size, 624 1.2.18.2 yamt &dma->dma_vaddr, BUS_DMA_NOWAIT); 625 1.2.18.2 yamt if (rc != 0) { 626 1.2.18.2 yamt printf("%s: couldn't map DMA memory for %d bytes (%d)\n", 627 1.2.18.2 yamt sc->sc_dev.dv_xname, size, rc); 628 1.2.18.2 yamt 629 1.2.18.2 yamt goto fail2; 630 1.2.18.2 yamt } 631 1.2.18.2 yamt 632 1.2.18.2 yamt rc = bus_dmamap_load(sc->sc_dmat, dma->dma_map, dma->dma_vaddr, 633 1.2.18.2 yamt size, NULL, BUS_DMA_NOWAIT); 634 1.2.18.2 yamt if (rc != 0) { 635 1.2.18.2 yamt printf("%s: couldn't load DMA memory for %d bytes (%d)\n", 636 1.2.18.2 yamt sc->sc_dev.dv_xname, size, rc); 637 1.2.18.2 yamt 638 1.2.18.2 yamt goto fail3; 639 1.2.18.2 yamt } 640 1.2.18.2 yamt 641 1.2.18.2 yamt dma->dma_paddr = dma->dma_map->dm_segs[0].ds_addr; 642 1.2.18.2 yamt 643 1.2.18.2 yamt return 0; 644 1.2.18.2 yamt 645 1.2.18.2 yamt fail3: 646 1.2.18.2 yamt bus_dmamem_unmap(sc->sc_dmat, dma->dma_vaddr, size); 647 1.2.18.2 yamt fail2: 648 1.2.18.2 yamt bus_dmamem_free(sc->sc_dmat, &dma->dma_seg, dma->dma_nsegs); 649 1.2.18.2 yamt fail1: 650 1.2.18.2 yamt bus_dmamap_destroy(sc->sc_dmat, dma->dma_map); 651 1.2.18.2 yamt fail0: 652 1.2.18.2 yamt return rc; 653 1.2.18.2 yamt } 654 1.2.18.2 yamt 655 1.2.18.2 yamt void 656 1.2.18.2 yamt glxsb_dma_pre_op(struct glxsb_softc *sc, struct glxsb_dma_map *dma) 657 1.2.18.2 yamt { 658 1.2.18.2 yamt bus_dmamap_sync(sc->sc_dmat, dma->dma_map, 0, dma->dma_size, 659 1.2.18.2 yamt BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 660 1.2.18.2 yamt } 661 1.2.18.2 yamt 662 1.2.18.2 yamt void 663 1.2.18.2 yamt glxsb_dma_post_op(struct glxsb_softc *sc, struct glxsb_dma_map *dma) 664 1.2.18.2 yamt { 665 1.2.18.2 yamt bus_dmamap_sync(sc->sc_dmat, dma->dma_map, 0, dma->dma_size, 666 1.2.18.2 yamt BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 667 1.2.18.2 yamt } 668 1.2.18.2 yamt 669 1.2.18.2 yamt void 670 1.2.18.2 yamt glxsb_dma_free(struct glxsb_softc *sc, struct glxsb_dma_map *dma) 671 1.2.18.2 yamt { 672 1.2.18.2 yamt bus_dmamap_unload(sc->sc_dmat, dma->dma_map); 673 1.2.18.2 yamt bus_dmamem_unmap(sc->sc_dmat, dma->dma_vaddr, dma->dma_size); 674 1.2.18.2 yamt bus_dmamem_free(sc->sc_dmat, &dma->dma_seg, dma->dma_nsegs); 675 1.2.18.2 yamt bus_dmamap_destroy(sc->sc_dmat, dma->dma_map); 676 1.2.18.2 yamt } 677
Indexes created Thu Oct 23 22:10:10 GMT 2025