pci_intr_fixup.c revision 1.20 1 /* $NetBSD: pci_intr_fixup.c,v 1.20 2002/06/01 23:50:55 lukem Exp $ */
2
3 /*-
4 * Copyright (c) 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Copyright (c) 1999, by UCHIYAMA Yasushi
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. The name of the developer may NOT be used to endorse or promote products
50 * derived from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62 * SUCH DAMAGE.
63 */
64
65 /*
66 * PCI Interrupt Router support.
67 */
68
69 #include <sys/cdefs.h>
70 __KERNEL_RCSID(0, "$NetBSD: pci_intr_fixup.c,v 1.20 2002/06/01 23:50:55 lukem Exp $");
71
72 #include "opt_pcibios.h"
73
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/kernel.h>
77 #include <sys/malloc.h>
78 #include <sys/queue.h>
79 #include <sys/device.h>
80
81 #include <machine/bus.h>
82 #include <machine/intr.h>
83
84 #include <dev/pci/pcireg.h>
85 #include <dev/pci/pcivar.h>
86 #include <dev/pci/pcidevs.h>
87
88 #include <i386/isa/icu.h>
89 #include <i386/pci/pci_intr_fixup.h>
90 #include <i386/pci/pcibios.h>
91
92 struct pciintr_link_map {
93 int link;
94 int clink;
95 int irq;
96 u_int16_t bitmap;
97 int fixup_stage;
98 SIMPLEQ_ENTRY(pciintr_link_map) list;
99 };
100
101 pciintr_icu_tag_t pciintr_icu_tag;
102 pciintr_icu_handle_t pciintr_icu_handle;
103
104 #ifdef PCIBIOS_IRQS_HINT
105 int pcibios_irqs_hint = PCIBIOS_IRQS_HINT;
106 #endif
107
108 struct pciintr_link_map *pciintr_link_lookup __P((int));
109 struct pciintr_link_map *pciintr_link_alloc __P((struct pcibios_intr_routing *,
110 int));
111 struct pcibios_intr_routing *pciintr_pir_lookup __P((int, int));
112 static int pciintr_bitmap_count_irq __P((int, int *));
113 static int pciintr_bitmap_find_lowest_irq __P((int, int *));
114 int pciintr_link_init __P((void));
115 #ifdef PCIBIOS_INTR_GUESS
116 int pciintr_guess_irq __P((void));
117 #endif
118 int pciintr_link_fixup __P((void));
119 int pciintr_link_route __P((u_int16_t *));
120 int pciintr_irq_release __P((u_int16_t *));
121 int pciintr_header_fixup __P((pci_chipset_tag_t));
122 void pciintr_do_header_fixup __P((pci_chipset_tag_t, pcitag_t, void*));
123
124 SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list;
125
126 const struct pciintr_icu_table {
127 pci_vendor_id_t piit_vendor;
128 pci_product_id_t piit_product;
129 int (*piit_init) __P((pci_chipset_tag_t,
130 bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *,
131 pciintr_icu_handle_t *));
132 } pciintr_icu_table[] = {
133 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371MX,
134 piix_init },
135 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_ISA,
136 piix_init },
137 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371FB_ISA,
138 piix_init },
139 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_ISA,
140 piix_init },
141 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_LPC,
142 piix_init },
143 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BAM_LPC,
144 piix_init },
145
146 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C558,
147 opti82c558_init },
148 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C700,
149 opti82c700_init },
150
151 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_ISA,
152 via82c586_init },
153 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_ISA,
154 via82c586_init },
155
156 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503,
157 sis85c503_init },
158
159 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_PMC,
160 amd756_init },
161
162 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1543,
163 ali1543_init },
164
165 { 0, 0,
166 NULL },
167 };
168
169 const struct pciintr_icu_table *pciintr_icu_lookup __P((pcireg_t));
170
171 const struct pciintr_icu_table *
172 pciintr_icu_lookup(id)
173 pcireg_t id;
174 {
175 const struct pciintr_icu_table *piit;
176
177 for (piit = pciintr_icu_table;
178 piit->piit_init != NULL;
179 piit++) {
180 if (PCI_VENDOR(id) == piit->piit_vendor &&
181 PCI_PRODUCT(id) == piit->piit_product)
182 return (piit);
183 }
184
185 return (NULL);
186 }
187
188 struct pciintr_link_map *
189 pciintr_link_lookup(link)
190 int link;
191 {
192 struct pciintr_link_map *l;
193
194 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
195 if (l->link == link)
196 return (l);
197 }
198
199 return (NULL);
200 }
201
202 struct pciintr_link_map *
203 pciintr_link_alloc(pir, pin)
204 struct pcibios_intr_routing *pir;
205 int pin;
206 {
207 int link = pir->linkmap[pin].link, clink, irq;
208 struct pciintr_link_map *l, *lstart;
209
210 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */
211 /*
212 * Get the canonical link value for this entry.
213 */
214 if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle,
215 link, &clink) != 0) {
216 /*
217 * ICU doesn't understand the link value.
218 * Just ignore this PIR entry.
219 */
220 #ifdef DIAGNOSTIC
221 printf("pciintr_link_alloc: bus %d device %d: "
222 "link 0x%02x invalid\n",
223 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link);
224 #endif
225 return (NULL);
226 }
227
228 /*
229 * Check the link value by asking the ICU for the
230 * canonical link value.
231 * Also, determine if this PIRQ is mapped to an IRQ.
232 */
233 if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle,
234 clink, &irq) != 0) {
235 /*
236 * ICU doesn't understand the canonical link value.
237 * Just ignore this PIR entry.
238 */
239 #ifdef DIAGNOSTIC
240 printf("pciintr_link_alloc: "
241 "bus %d device %d link 0x%02x: "
242 "PIRQ 0x%02x invalid\n",
243 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link,
244 clink);
245 #endif
246 return (NULL);
247 }
248 }
249
250 l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT);
251 if (l == NULL)
252 panic("pciintr_link_alloc");
253
254 memset(l, 0, sizeof(*l));
255
256 l->link = link;
257 l->bitmap = pir->linkmap[pin].bitmap;
258 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */
259 l->clink = clink;
260 l->irq = irq; /* maybe I386_PCI_INTERRUPT_LINE_NO_CONNECTION */
261 } else {
262 l->clink = link; /* only for PCIBIOSVERBOSE diagnostic */
263 l->irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION;
264 }
265
266 lstart = SIMPLEQ_FIRST(&pciintr_link_map_list);
267 if (lstart == NULL || lstart->link < l->link)
268 SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list);
269 else
270 SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list);
271
272 return (l);
273 }
274
275 struct pcibios_intr_routing *
276 pciintr_pir_lookup(bus, device)
277 int bus, device;
278 {
279 struct pcibios_intr_routing *pir;
280 int entry;
281
282 if (pcibios_pir_table == NULL)
283 return (NULL);
284
285 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) {
286 pir = &pcibios_pir_table[entry];
287 if (pir->bus == bus &&
288 PIR_DEVFUNC_DEVICE(pir->device) == device)
289 return (pir);
290 }
291
292 return (NULL);
293 }
294
295 static int
296 pciintr_bitmap_count_irq(irq_bitmap, irqp)
297 int irq_bitmap, *irqp;
298 {
299 int i, bit, count = 0, irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION;
300
301 if (irq_bitmap != 0) {
302 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
303 if (irq_bitmap & bit) {
304 irq = i;
305 count++;
306 }
307 }
308 }
309 *irqp = irq;
310 return (count);
311 }
312
313 static int
314 pciintr_bitmap_find_lowest_irq(irq_bitmap, irqp)
315 int irq_bitmap, *irqp;
316 {
317 int i, bit;
318
319 if (irq_bitmap != 0) {
320 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
321 if (irq_bitmap & bit) {
322 *irqp = i;
323 return (1); /* found */
324 }
325 }
326 }
327 return (0); /* not found */
328 }
329
330 int
331 pciintr_link_init()
332 {
333 int entry, pin, link;
334 struct pcibios_intr_routing *pir;
335 struct pciintr_link_map *l;
336
337 if (pcibios_pir_table == NULL) {
338 /* No PIR table; can't do anything. */
339 printf("pciintr_link_init: no PIR table\n");
340 return (1);
341 }
342
343 SIMPLEQ_INIT(&pciintr_link_map_list);
344
345 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) {
346 pir = &pcibios_pir_table[entry];
347 for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) {
348 link = pir->linkmap[pin].link;
349 if (link == 0) {
350 /* No connection for this pin. */
351 continue;
352 }
353 /*
354 * Multiple devices may be wired to the same
355 * interrupt; check to see if we've seen this
356 * one already. If not, allocate a new link
357 * map entry and stuff it in the map.
358 */
359 l = pciintr_link_lookup(link);
360 if (l == NULL) {
361 (void) pciintr_link_alloc(pir, pin);
362 } else if (pir->linkmap[pin].bitmap != l->bitmap) {
363 /*
364 * violates PCI IRQ Routing Table Specification
365 */
366 #ifdef DIAGNOSTIC
367 printf("pciintr_link_init: "
368 "bus %d device %d link 0x%02x: "
369 "bad irq bitmap 0x%04x, "
370 "should be 0x%04x\n",
371 pir->bus, PIR_DEVFUNC_DEVICE(pir->device),
372 link, pir->linkmap[pin].bitmap, l->bitmap);
373 #endif
374 /* safer value. */
375 l->bitmap &= pir->linkmap[pin].bitmap;
376 /* XXX - or, should ignore this entry? */
377 }
378 }
379 }
380
381 return (0);
382 }
383
384 #ifdef PCIBIOS_INTR_GUESS
385 /*
386 * No compatible PCI ICU found.
387 * Hopes the BIOS already setup the ICU.
388 */
389 int
390 pciintr_guess_irq()
391 {
392 struct pciintr_link_map *l;
393 int irq, guessed = 0;
394
395 /*
396 * Stage 1: If only one IRQ is available for the link, use it.
397 */
398 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
399 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
400 continue;
401 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) {
402 l->irq = irq;
403 l->fixup_stage = 1;
404 #ifdef PCIINTR_DEBUG
405 printf("pciintr_guess_irq (stage 1): "
406 "guessing PIRQ 0x%02x to be IRQ %d\n",
407 l->clink, l->irq);
408 #endif
409 guessed = 1;
410 }
411 }
412
413 return (guessed ? 0 : -1);
414 }
415 #endif /* PCIBIOS_INTR_GUESS */
416
417 int
418 pciintr_link_fixup()
419 {
420 struct pciintr_link_map *l;
421 int irq;
422 u_int16_t pciirq = 0;
423
424 /*
425 * First stage: Attempt to connect PIRQs which aren't
426 * yet connected.
427 */
428 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
429 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
430 /*
431 * Interrupt is already connected. Don't do
432 * anything to it.
433 * In this case, l->fixup_stage == 0.
434 */
435 pciirq |= 1 << l->irq;
436 #ifdef PCIINTR_DEBUG
437 printf("pciintr_link_fixup: PIRQ 0x%02x already "
438 "connected to IRQ %d\n", l->clink, l->irq);
439 #endif
440 continue;
441 }
442 /*
443 * Interrupt isn't connected. Attempt to assign it to an IRQ.
444 */
445 #ifdef PCIINTR_DEBUG
446 printf("pciintr_link_fixup: PIRQ 0x%02x not connected",
447 l->clink);
448 #endif
449 /*
450 * Just do the easy case now; we'll defer the harder ones
451 * to Stage 2.
452 */
453 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) {
454 l->irq = irq;
455 l->fixup_stage = 1;
456 pciirq |= 1 << irq;
457 #ifdef PCIINTR_DEBUG
458 printf(", assigning IRQ %d", l->irq);
459 #endif
460 }
461 #ifdef PCIINTR_DEBUG
462 printf("\n");
463 #endif
464 }
465
466 /*
467 * Stage 2: Attempt to connect PIRQs which we didn't
468 * connect in Stage 1.
469 */
470 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
471 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
472 continue;
473 if (pciintr_bitmap_find_lowest_irq(l->bitmap & pciirq,
474 &l->irq)) {
475 /*
476 * This IRQ is a valid PCI IRQ already
477 * connected to another PIRQ, and also an
478 * IRQ our PIRQ can use; connect it up!
479 */
480 l->fixup_stage = 2;
481 #ifdef PCIINTR_DEBUG
482 printf("pciintr_link_fixup (stage 2): "
483 "assigning IRQ %d to PIRQ 0x%02x\n",
484 l->irq, l->clink);
485 #endif
486 }
487 }
488
489 #ifdef PCIBIOS_IRQS_HINT
490 /*
491 * Stage 3: The worst case. I need configuration hint that
492 * user supplied a mask for the PCI irqs
493 */
494 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
495 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
496 continue;
497 if (pciintr_bitmap_find_lowest_irq(
498 l->bitmap & pcibios_irqs_hint, &l->irq)) {
499 l->fixup_stage = 3;
500 #ifdef PCIINTR_DEBUG
501 printf("pciintr_link_fixup (stage 3): "
502 "assigning IRQ %d to PIRQ 0x%02x\n",
503 l->irq, l->clink);
504 #endif
505 }
506 }
507 #endif /* PCIBIOS_IRQS_HINT */
508
509 return (0);
510 }
511
512 int
513 pciintr_link_route(pciirq)
514 u_int16_t *pciirq;
515 {
516 struct pciintr_link_map *l;
517 int rv = 0;
518
519 *pciirq = 0;
520
521 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
522 if (l->fixup_stage == 0) {
523 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
524 /* Appropriate interrupt was not found. */
525 #ifdef DIAGNOSTIC
526 printf("pciintr_link_route: "
527 "PIRQ 0x%02x: no IRQ, try "
528 "\"options PCIBIOS_IRQS_HINT=0x%04x\"\n",
529 l->clink,
530 /* suggest irq 9/10/11, if possible */
531 (l->bitmap & 0x0e00) ? (l->bitmap & 0x0e00)
532 : l->bitmap);
533 #endif
534 } else {
535 /* BIOS setting has no problem */
536 #ifdef PCIINTR_DEBUG
537 printf("pciintr_link_route: "
538 "route of PIRQ 0x%02x -> "
539 "IRQ %d preserved BIOS setting\n",
540 l->clink, l->irq);
541 #endif
542 *pciirq |= (1 << l->irq);
543 }
544 continue; /* nothing to do. */
545 }
546
547 if (pciintr_icu_set_intr(pciintr_icu_tag, pciintr_icu_handle,
548 l->clink, l->irq) != 0 ||
549 pciintr_icu_set_trigger(pciintr_icu_tag,
550 pciintr_icu_handle,
551 l->irq, IST_LEVEL) != 0) {
552 printf("pciintr_link_route: route of PIRQ 0x%02x -> "
553 "IRQ %d failed\n", l->clink, l->irq);
554 rv = 1;
555 } else {
556 /*
557 * Succssfully routed interrupt. Mark this as
558 * a PCI interrupt.
559 */
560 *pciirq |= (1 << l->irq);
561 }
562 }
563
564 return (rv);
565 }
566
567 int
568 pciintr_irq_release(pciirq)
569 u_int16_t *pciirq;
570 {
571 int i, bit;
572
573 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
574 if ((*pciirq & bit) == 0)
575 (void) pciintr_icu_set_trigger(pciintr_icu_tag,
576 pciintr_icu_handle, i, IST_EDGE);
577 }
578
579 return (0);
580 }
581
582 int
583 pciintr_header_fixup(pc)
584 pci_chipset_tag_t pc;
585 {
586 PCIBIOS_PRINTV(("------------------------------------------\n"));
587 PCIBIOS_PRINTV((" device vendor product pin PIRQ IRQ stage\n"));
588 PCIBIOS_PRINTV(("------------------------------------------\n"));
589 pci_device_foreach(pc, pcibios_max_bus, pciintr_do_header_fixup, NULL);
590 PCIBIOS_PRINTV(("------------------------------------------\n"));
591
592 return (0);
593 }
594
595 void
596 pciintr_do_header_fixup(pc, tag, context)
597 pci_chipset_tag_t pc;
598 pcitag_t tag;
599 void *context;
600 {
601 struct pcibios_intr_routing *pir;
602 struct pciintr_link_map *l;
603 int pin, irq, link;
604 int bus, device, function;
605 pcireg_t intr, id;
606
607 pci_decompose_tag(pc, tag, &bus, &device, &function);
608 id = pci_conf_read(pc, tag, PCI_ID_REG);
609
610 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
611 pin = PCI_INTERRUPT_PIN(intr);
612 irq = PCI_INTERRUPT_LINE(intr);
613
614 #if 0
615 if (pin == 0) {
616 /*
617 * No interrupt used.
618 */
619 return;
620 }
621 #endif
622
623 pir = pciintr_pir_lookup(bus, device);
624 if (pir == NULL || (link = pir->linkmap[pin - 1].link) == 0) {
625 /*
626 * Interrupt not connected; no
627 * need to change.
628 */
629 return;
630 }
631
632 l = pciintr_link_lookup(link);
633 if (l == NULL) {
634 #ifdef PCIINTR_DEBUG
635 /*
636 * No link map entry.
637 * Probably pciintr_icu_getclink() or pciintr_icu_get_intr()
638 * was failed.
639 */
640 printf("pciintr_header_fixup: no entry for link 0x%02x "
641 "(%d:%d:%d:%c)\n", link, bus, device, function,
642 '@' + pin);
643 #endif
644 return;
645 }
646
647 #ifdef PCIBIOSVERBOSE
648 if (pcibiosverbose) {
649 printf("%03d:%02d:%d 0x%04x 0x%04x %c 0x%02x",
650 bus, device, function, PCI_VENDOR(id), PCI_PRODUCT(id),
651 '@' + pin, l->clink);
652 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
653 printf(" -");
654 else
655 printf(" %3d", l->irq);
656 printf(" %d ", l->fixup_stage);
657 }
658 #endif
659
660 /*
661 * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck
662 * with them.
663 */
664 if (irq == 14 || irq == 15) {
665 PCIBIOS_PRINTV((" WARNING: ignored\n"));
666 return;
667 }
668
669 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
670 /* Appropriate interrupt was not found. */
671 if (pciintr_icu_tag == NULL &&
672 irq != 0 && irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
673 /*
674 * Do not print warning,
675 * if no compatible PCI ICU found,
676 * but the irq is already assigned by BIOS.
677 */
678 PCIBIOS_PRINTV(("\n"));
679 } else {
680 PCIBIOS_PRINTV((" WARNING: missing IRQ\n"));
681 }
682 return;
683 }
684
685 if (l->irq == irq) {
686 /* don't have to reconfigure */
687 PCIBIOS_PRINTV((" already assigned\n"));
688 return;
689 }
690
691 if (irq == 0 || irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
692 PCIBIOS_PRINTV((" fixed up\n"));
693 } else {
694 /* routed by BIOS, but inconsistent */
695 #ifdef PCIBIOS_INTR_FIXUP_FORCE
696 /* believe PCI IRQ Routing table */
697 PCIBIOS_PRINTV((" WARNING: overriding irq %d\n", irq));
698 #else
699 /* believe PCI Interrupt Configuration Register (default) */
700 PCIBIOS_PRINTV((" WARNING: preserving irq %d\n", irq));
701 return;
702 #endif
703 }
704
705 intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT);
706 intr |= (l->irq << PCI_INTERRUPT_LINE_SHIFT);
707 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
708 }
709
710 int
711 pci_intr_fixup(pc, iot, pciirq)
712 pci_chipset_tag_t pc;
713 bus_space_tag_t iot;
714 u_int16_t *pciirq;
715 {
716 const struct pciintr_icu_table *piit = NULL;
717 pcitag_t icutag;
718 pcireg_t icuid;
719
720 /*
721 * Attempt to initialize our PCI interrupt router. If
722 * the PIR Table is present in ROM, use the location
723 * specified by the PIR Table, and use the compat ID,
724 * if present. Otherwise, we have to look for the router
725 * ourselves (the PCI-ISA bridge).
726 *
727 * A number of buggy BIOS implementations leave the router
728 * entry as 000:00:0, which is typically not the correct
729 * device/function. If the router device address is set to
730 * this value, and the compatible router entry is undefined
731 * (zero is the correct value to indicate undefined), then we
732 * work on the basis it is most likely an error, and search
733 * the entire device-space of bus 0 (but obviously starting
734 * with 000:00:0, in case that really is the right one).
735 */
736 if (pcibios_pir_header.signature != 0 &&
737 (pcibios_pir_header.router_bus != 0 ||
738 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc) != 0 ||
739 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc) != 0 ||
740 pcibios_pir_header.compat_router != 0)) {
741 icutag = pci_make_tag(pc, pcibios_pir_header.router_bus,
742 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc),
743 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc));
744 icuid = pcibios_pir_header.compat_router;
745 if (icuid == 0 ||
746 (piit = pciintr_icu_lookup(icuid)) == NULL) {
747 /*
748 * No compat ID, or don't know the compat ID? Read
749 * it from the configuration header.
750 */
751 icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
752 }
753 if (piit == NULL)
754 piit = pciintr_icu_lookup(icuid);
755 } else {
756 int device, maxdevs = pci_bus_maxdevs(pc, 0);
757
758 /*
759 * Search configuration space for a known interrupt
760 * router.
761 */
762 for (device = 0; device < maxdevs; device++) {
763 const struct pci_quirkdata *qd;
764 int function, nfuncs;
765 pcireg_t bhlcr;
766
767 icutag = pci_make_tag(pc, 0, device, 0);
768 icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
769
770 /* Invalid vendor ID value? */
771 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID)
772 continue;
773 /* XXX Not invalid, but we've done this ~forever. */
774 if (PCI_VENDOR(icuid) == 0)
775 continue;
776
777 qd = pci_lookup_quirkdata(PCI_VENDOR(icuid),
778 PCI_PRODUCT(icuid));
779
780 bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG);
781 if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
782 (qd != NULL &&
783 (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
784 nfuncs = 8;
785 else
786 nfuncs = 1;
787
788 for (function = 0; function < nfuncs; function++) {
789 icutag = pci_make_tag(pc, 0, device, function);
790 icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
791
792 /* Invalid vendor ID value? */
793 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID)
794 continue;
795 /* Not invalid, but we've done this ~forever */
796 if (PCI_VENDOR(icuid) == 0)
797 continue;
798
799 piit = pciintr_icu_lookup(icuid);
800 if (piit != NULL)
801 goto found;
802 }
803 }
804
805 /*
806 * Invalidate the ICU ID. If we failed to find the
807 * interrupt router (piit == NULL) we don't want to
808 * display a spurious device address below containing
809 * the product information of the last device we
810 * looked at.
811 */
812 icuid = 0;
813 found:;
814 }
815
816 if (piit == NULL) {
817 printf("pci_intr_fixup: no compatible PCI ICU found");
818 if (pcibios_pir_header.signature != 0 && icuid != 0)
819 printf(": ICU vendor 0x%04x product 0x%04x",
820 PCI_VENDOR(icuid), PCI_PRODUCT(icuid));
821 printf("\n");
822 #ifdef PCIBIOS_INTR_GUESS
823 if (pciintr_link_init())
824 return (-1); /* non-fatal */
825 if (pciintr_guess_irq())
826 return (-1); /* non-fatal */
827 if (pciintr_header_fixup(pc))
828 return (1); /* fatal */
829 return (0); /* success! */
830 #else
831 return (-1); /* non-fatal */
832 #endif
833 }
834
835 /*
836 * Initialize the PCI ICU.
837 */
838 if ((*piit->piit_init)(pc, iot, icutag, &pciintr_icu_tag,
839 &pciintr_icu_handle) != 0)
840 return (-1); /* non-fatal */
841
842 /*
843 * Initialize the PCI interrupt link map.
844 */
845 if (pciintr_link_init())
846 return (-1); /* non-fatal */
847
848 /*
849 * Fix up the link->IRQ mappings.
850 */
851 if (pciintr_link_fixup() != 0)
852 return (-1); /* non-fatal */
853
854 /*
855 * Now actually program the PCI ICU with the new
856 * routing information.
857 */
858 if (pciintr_link_route(pciirq) != 0)
859 return (1); /* fatal */
860
861 /*
862 * Now that we've routed all of the PIRQs, rewrite the PCI
863 * configuration headers to reflect the new mapping.
864 */
865 if (pciintr_header_fixup(pc) != 0)
866 return (1); /* fatal */
867
868 /*
869 * Free any unused PCI IRQs for ISA devices.
870 */
871 if (pciintr_irq_release(pciirq) != 0)
872 return (-1); /* non-fatal */
873
874 /*
875 * All done!
876 */
877 return (0); /* success! */
878 }
879