pci_intr_fixup.c revision 1.24.2.2
1 /* $NetBSD: pci_intr_fixup.c,v 1.24.2.2 2004/09/18 14:35:50 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1999, by UCHIYAMA Yasushi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. The name of the developer may NOT be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 62 * SUCH DAMAGE. 63 */ 64 65 /* 66 * PCI Interrupt Router support. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: pci_intr_fixup.c,v 1.24.2.2 2004/09/18 14:35:50 skrll Exp $"); 71 72 #include "opt_pcibios.h" 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/malloc.h> 78 #include <sys/queue.h> 79 #include <sys/device.h> 80 81 #include <machine/bus.h> 82 #include <machine/intr.h> 83 84 #include <dev/pci/pcireg.h> 85 #include <dev/pci/pcivar.h> 86 #include <dev/pci/pcidevs.h> 87 88 #include <i386/pci/pci_intr_fixup.h> 89 #include <i386/pci/pcibios.h> 90 91 struct pciintr_link_map { 92 int link; 93 int clink; 94 int irq; 95 u_int16_t bitmap; 96 int fixup_stage; 97 SIMPLEQ_ENTRY(pciintr_link_map) list; 98 }; 99 100 pciintr_icu_tag_t pciintr_icu_tag; 101 pciintr_icu_handle_t pciintr_icu_handle; 102 103 #ifdef PCIBIOS_IRQS_HINT 104 int pcibios_irqs_hint = PCIBIOS_IRQS_HINT; 105 #endif 106 107 struct pciintr_link_map *pciintr_link_lookup(int); 108 struct pciintr_link_map *pciintr_link_alloc(struct pcibios_intr_routing *, 109 int); 110 struct pcibios_intr_routing *pciintr_pir_lookup(int, int); 111 static int pciintr_bitmap_count_irq(int, int *); 112 static int pciintr_bitmap_find_lowest_irq(int, int *); 113 int pciintr_link_init (void); 114 #ifdef PCIBIOS_INTR_GUESS 115 int pciintr_guess_irq(void); 116 #endif 117 int pciintr_link_fixup(void); 118 int pciintr_link_route(u_int16_t *); 119 int pciintr_irq_release(u_int16_t *); 120 int pciintr_header_fixup(pci_chipset_tag_t); 121 void pciintr_do_header_fixup(pci_chipset_tag_t, pcitag_t, void*); 122 123 SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list; 124 125 const struct pciintr_icu_table { 126 pci_vendor_id_t piit_vendor; 127 pci_product_id_t piit_product; 128 int (*piit_init)(pci_chipset_tag_t, 129 bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *, 130 pciintr_icu_handle_t *); 131 } pciintr_icu_table[] = { 132 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371MX, 133 piix_init }, 134 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_ISA, 135 piix_init }, 136 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371FB_ISA, 137 piix_init }, 138 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_ISA, 139 piix_init }, 140 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_LPC, 141 piix_init }, /* ICH */ 142 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_LPC, 143 piix_init }, /* ICH0 */ 144 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_LPC, 145 ich_init }, /* ICH2 */ 146 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BAM_LPC, 147 ich_init }, /* ICH2M */ 148 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_LPC, 149 ich_init }, /* ICH3S */ 150 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CAM_LPC, 151 ich_init }, /* ICH3M */ 152 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_LPC, 153 ich_init }, /* ICH4 */ 154 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_ISA, 155 ich_init }, /* ICH4M */ 156 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_LPC, 157 ich_init }, /* ICH5 */ 158 159 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C558, 160 opti82c558_init }, 161 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C700, 162 opti82c700_init }, 163 164 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_ISA, 165 via82c586_init }, 166 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C596A, 167 via82c586_init }, 168 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_ISA, 169 via82c586_init }, 170 171 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503, 172 sis85c503_init }, 173 174 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_PMC, 175 amd756_init }, 176 177 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1543, 178 ali1543_init }, 179 180 { 0, 0, 181 NULL }, 182 }; 183 184 const struct pciintr_icu_table *pciintr_icu_lookup(pcireg_t); 185 186 const struct pciintr_icu_table * 187 pciintr_icu_lookup(pcireg_t id) 188 { 189 const struct pciintr_icu_table *piit; 190 191 for (piit = pciintr_icu_table; 192 piit->piit_init != NULL; 193 piit++) { 194 if (PCI_VENDOR(id) == piit->piit_vendor && 195 PCI_PRODUCT(id) == piit->piit_product) 196 return (piit); 197 } 198 199 return (NULL); 200 } 201 202 struct pciintr_link_map * 203 pciintr_link_lookup(int link) 204 { 205 struct pciintr_link_map *l; 206 207 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 208 if (l->link == link) 209 return (l); 210 } 211 212 return (NULL); 213 } 214 215 struct pciintr_link_map * 216 pciintr_link_alloc(struct pcibios_intr_routing *pir, int pin) 217 { 218 int link = pir->linkmap[pin].link, clink, irq; 219 struct pciintr_link_map *l, *lstart; 220 221 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */ 222 /* 223 * Get the canonical link value for this entry. 224 */ 225 if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle, 226 link, &clink) != 0) { 227 /* 228 * ICU doesn't understand the link value. 229 * Just ignore this PIR entry. 230 */ 231 #ifdef DIAGNOSTIC 232 printf("pciintr_link_alloc: bus %d device %d: " 233 "link 0x%02x invalid\n", 234 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link); 235 #endif 236 return (NULL); 237 } 238 239 /* 240 * Check the link value by asking the ICU for the 241 * canonical link value. 242 * Also, determine if this PIRQ is mapped to an IRQ. 243 */ 244 if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle, 245 clink, &irq) != 0) { 246 /* 247 * ICU doesn't understand the canonical link value. 248 * Just ignore this PIR entry. 249 */ 250 #ifdef DIAGNOSTIC 251 printf("pciintr_link_alloc: " 252 "bus %d device %d link 0x%02x: " 253 "PIRQ 0x%02x invalid\n", 254 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link, 255 clink); 256 #endif 257 return (NULL); 258 } 259 } 260 261 l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT); 262 if (l == NULL) 263 panic("pciintr_link_alloc"); 264 265 memset(l, 0, sizeof(*l)); 266 267 l->link = link; 268 l->bitmap = pir->linkmap[pin].bitmap; 269 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */ 270 l->clink = clink; 271 l->irq = irq; /* maybe X86_PCI_INTERRUPT_LINE_NO_CONNECTION */ 272 } else { 273 l->clink = link; /* only for PCIBIOSVERBOSE diagnostic */ 274 l->irq = X86_PCI_INTERRUPT_LINE_NO_CONNECTION; 275 } 276 277 lstart = SIMPLEQ_FIRST(&pciintr_link_map_list); 278 if (lstart == NULL || lstart->link < l->link) 279 SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list); 280 else 281 SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list); 282 283 return (l); 284 } 285 286 struct pcibios_intr_routing * 287 pciintr_pir_lookup(int bus, int device) 288 { 289 struct pcibios_intr_routing *pir; 290 int entry; 291 292 if (pcibios_pir_table == NULL) 293 return (NULL); 294 295 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 296 pir = &pcibios_pir_table[entry]; 297 if (pir->bus == bus && 298 PIR_DEVFUNC_DEVICE(pir->device) == device) 299 return (pir); 300 } 301 302 return (NULL); 303 } 304 305 static int 306 pciintr_bitmap_count_irq(int irq_bitmap, int *irqp) 307 { 308 int i, bit, count = 0, irq = X86_PCI_INTERRUPT_LINE_NO_CONNECTION; 309 310 if (irq_bitmap != 0) { 311 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 312 if (irq_bitmap & bit) { 313 irq = i; 314 count++; 315 } 316 } 317 } 318 *irqp = irq; 319 return (count); 320 } 321 322 static int 323 pciintr_bitmap_find_lowest_irq(int irq_bitmap, int *irqp) 324 { 325 int i, bit; 326 327 if (irq_bitmap != 0) { 328 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 329 if (irq_bitmap & bit) { 330 *irqp = i; 331 return (1); /* found */ 332 } 333 } 334 } 335 return (0); /* not found */ 336 } 337 338 int 339 pciintr_link_init() 340 { 341 int entry, pin, link; 342 struct pcibios_intr_routing *pir; 343 struct pciintr_link_map *l; 344 345 if (pcibios_pir_table == NULL) { 346 /* No PIR table; can't do anything. */ 347 printf("pciintr_link_init: no PIR table\n"); 348 return (1); 349 } 350 351 SIMPLEQ_INIT(&pciintr_link_map_list); 352 353 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 354 pir = &pcibios_pir_table[entry]; 355 for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) { 356 link = pir->linkmap[pin].link; 357 if (link == 0) { 358 /* No connection for this pin. */ 359 continue; 360 } 361 /* 362 * Multiple devices may be wired to the same 363 * interrupt; check to see if we've seen this 364 * one already. If not, allocate a new link 365 * map entry and stuff it in the map. 366 */ 367 l = pciintr_link_lookup(link); 368 if (l == NULL) { 369 (void) pciintr_link_alloc(pir, pin); 370 } else if (pir->linkmap[pin].bitmap != l->bitmap) { 371 /* 372 * violates PCI IRQ Routing Table Specification 373 */ 374 #ifdef DIAGNOSTIC 375 printf("pciintr_link_init: " 376 "bus %d device %d link 0x%02x: " 377 "bad irq bitmap 0x%04x, " 378 "should be 0x%04x\n", 379 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), 380 link, pir->linkmap[pin].bitmap, l->bitmap); 381 #endif 382 /* safer value. */ 383 l->bitmap &= pir->linkmap[pin].bitmap; 384 /* XXX - or, should ignore this entry? */ 385 } 386 } 387 } 388 389 return (0); 390 } 391 392 #ifdef PCIBIOS_INTR_GUESS 393 /* 394 * No compatible PCI ICU found. 395 * Hopes the BIOS already setup the ICU. 396 */ 397 int 398 pciintr_guess_irq() 399 { 400 struct pciintr_link_map *l; 401 int irq, guessed = 0; 402 403 /* 404 * Stage 1: If only one IRQ is available for the link, use it. 405 */ 406 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 407 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 408 continue; 409 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 410 l->irq = irq; 411 l->fixup_stage = 1; 412 #ifdef PCIINTR_DEBUG 413 printf("pciintr_guess_irq (stage 1): " 414 "guessing PIRQ 0x%02x to be IRQ %d\n", 415 l->clink, l->irq); 416 #endif 417 guessed = 1; 418 } 419 } 420 421 return (guessed ? 0 : -1); 422 } 423 #endif /* PCIBIOS_INTR_GUESS */ 424 425 int 426 pciintr_link_fixup() 427 { 428 struct pciintr_link_map *l; 429 int irq; 430 u_int16_t pciirq = 0; 431 432 /* 433 * First stage: Attempt to connect PIRQs which aren't 434 * yet connected. 435 */ 436 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 437 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 438 /* 439 * Interrupt is already connected. Don't do 440 * anything to it. 441 * In this case, l->fixup_stage == 0. 442 */ 443 pciirq |= 1 << l->irq; 444 #ifdef PCIINTR_DEBUG 445 printf("pciintr_link_fixup: PIRQ 0x%02x already " 446 "connected to IRQ %d\n", l->clink, l->irq); 447 #endif 448 continue; 449 } 450 /* 451 * Interrupt isn't connected. Attempt to assign it to an IRQ. 452 */ 453 #ifdef PCIINTR_DEBUG 454 printf("pciintr_link_fixup: PIRQ 0x%02x not connected", 455 l->clink); 456 #endif 457 /* 458 * Just do the easy case now; we'll defer the harder ones 459 * to Stage 2. 460 */ 461 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 462 l->irq = irq; 463 l->fixup_stage = 1; 464 pciirq |= 1 << irq; 465 #ifdef PCIINTR_DEBUG 466 printf(", assigning IRQ %d", l->irq); 467 #endif 468 } 469 #ifdef PCIINTR_DEBUG 470 printf("\n"); 471 #endif 472 } 473 474 /* 475 * Stage 2: Attempt to connect PIRQs which we didn't 476 * connect in Stage 1. 477 */ 478 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 479 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 480 continue; 481 if (pciintr_bitmap_find_lowest_irq(l->bitmap & pciirq, 482 &l->irq)) { 483 /* 484 * This IRQ is a valid PCI IRQ already 485 * connected to another PIRQ, and also an 486 * IRQ our PIRQ can use; connect it up! 487 */ 488 l->fixup_stage = 2; 489 #ifdef PCIINTR_DEBUG 490 printf("pciintr_link_fixup (stage 2): " 491 "assigning IRQ %d to PIRQ 0x%02x\n", 492 l->irq, l->clink); 493 #endif 494 } 495 } 496 497 #ifdef PCIBIOS_IRQS_HINT 498 /* 499 * Stage 3: The worst case. I need configuration hint that 500 * user supplied a mask for the PCI irqs 501 */ 502 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 503 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 504 continue; 505 if (pciintr_bitmap_find_lowest_irq( 506 l->bitmap & pcibios_irqs_hint, &l->irq)) { 507 l->fixup_stage = 3; 508 #ifdef PCIINTR_DEBUG 509 printf("pciintr_link_fixup (stage 3): " 510 "assigning IRQ %d to PIRQ 0x%02x\n", 511 l->irq, l->clink); 512 #endif 513 } 514 } 515 #endif /* PCIBIOS_IRQS_HINT */ 516 517 return (0); 518 } 519 520 int 521 pciintr_link_route(u_int16_t *pciirq) 522 { 523 struct pciintr_link_map *l; 524 int rv = 0; 525 526 *pciirq = 0; 527 528 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 529 if (l->fixup_stage == 0) { 530 if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 531 /* Appropriate interrupt was not found. */ 532 #ifdef DIAGNOSTIC 533 printf("pciintr_link_route: " 534 "PIRQ 0x%02x: no IRQ, try " 535 "\"options PCIBIOS_IRQS_HINT=0x%04x\"\n", 536 l->clink, 537 /* suggest irq 9/10/11, if possible */ 538 (l->bitmap & 0x0e00) ? (l->bitmap & 0x0e00) 539 : l->bitmap); 540 #endif 541 } else { 542 /* BIOS setting has no problem */ 543 #ifdef PCIINTR_DEBUG 544 printf("pciintr_link_route: " 545 "route of PIRQ 0x%02x -> " 546 "IRQ %d preserved BIOS setting\n", 547 l->clink, l->irq); 548 #endif 549 *pciirq |= (1 << l->irq); 550 } 551 continue; /* nothing to do. */ 552 } 553 554 if (pciintr_icu_set_intr(pciintr_icu_tag, pciintr_icu_handle, 555 l->clink, l->irq) != 0 || 556 pciintr_icu_set_trigger(pciintr_icu_tag, 557 pciintr_icu_handle, 558 l->irq, IST_LEVEL) != 0) { 559 printf("pciintr_link_route: route of PIRQ 0x%02x -> " 560 "IRQ %d failed\n", l->clink, l->irq); 561 rv = 1; 562 } else { 563 /* 564 * Succssfully routed interrupt. Mark this as 565 * a PCI interrupt. 566 */ 567 *pciirq |= (1 << l->irq); 568 } 569 } 570 571 return (rv); 572 } 573 574 int 575 pciintr_irq_release(u_int16_t *pciirq) 576 { 577 int i, bit; 578 u_int16_t bios_pciirq; 579 int reg; 580 581 #ifdef PCIINTR_DEBUG 582 printf("pciintr_irq_release: fixup pciirq level/edge map 0x%04x\n", 583 *pciirq); 584 #endif 585 586 /* Get bios level/edge setting. */ 587 bios_pciirq = 0; 588 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 589 (void)pciintr_icu_get_trigger(pciintr_icu_tag, 590 pciintr_icu_handle, i, ®); 591 if (reg == IST_LEVEL) 592 bios_pciirq |= bit; 593 } 594 595 #ifdef PCIINTR_DEBUG 596 printf("pciintr_irq_release: bios pciirq level/edge map 0x%04x\n", 597 bios_pciirq); 598 #endif /* PCIINTR_DEBUG */ 599 600 /* fixup final level/edge setting. */ 601 *pciirq |= bios_pciirq; 602 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 603 if ((*pciirq & bit) == 0) 604 reg = IST_EDGE; 605 else 606 reg = IST_LEVEL; 607 (void) pciintr_icu_set_trigger(pciintr_icu_tag, 608 pciintr_icu_handle, i, reg); 609 610 } 611 612 #ifdef PCIINTR_DEBUG 613 printf("pciintr_irq_release: final pciirq level/edge map 0x%04x\n", 614 *pciirq); 615 #endif /* PCIINTR_DEBUG */ 616 617 return (0); 618 } 619 620 int 621 pciintr_header_fixup(pci_chipset_tag_t pc) 622 { 623 PCIBIOS_PRINTV(("------------------------------------------\n")); 624 PCIBIOS_PRINTV((" device vendor product pin PIRQ IRQ stage\n")); 625 PCIBIOS_PRINTV(("------------------------------------------\n")); 626 pci_device_foreach(pc, pcibios_max_bus, pciintr_do_header_fixup, NULL); 627 PCIBIOS_PRINTV(("------------------------------------------\n")); 628 629 return (0); 630 } 631 632 void 633 pciintr_do_header_fixup(pci_chipset_tag_t pc, pcitag_t tag, void *context) 634 { 635 struct pcibios_intr_routing *pir; 636 struct pciintr_link_map *l; 637 int pin, irq, link; 638 int bus, device, function; 639 pcireg_t intr, id; 640 641 pci_decompose_tag(pc, tag, &bus, &device, &function); 642 id = pci_conf_read(pc, tag, PCI_ID_REG); 643 644 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 645 pin = PCI_INTERRUPT_PIN(intr); 646 irq = PCI_INTERRUPT_LINE(intr); 647 648 #if 0 649 if (pin == 0) { 650 /* 651 * No interrupt used. 652 */ 653 return; 654 } 655 #endif 656 657 pir = pciintr_pir_lookup(bus, device); 658 if (pir == NULL || (link = pir->linkmap[pin - 1].link) == 0) { 659 /* 660 * Interrupt not connected; no 661 * need to change. 662 */ 663 return; 664 } 665 666 l = pciintr_link_lookup(link); 667 if (l == NULL) { 668 #ifdef PCIINTR_DEBUG 669 /* 670 * No link map entry. 671 * Probably pciintr_icu_getclink() or pciintr_icu_get_intr() 672 * was failed. 673 */ 674 printf("pciintr_header_fixup: no entry for link 0x%02x " 675 "(%d:%d:%d:%c)\n", link, bus, device, function, 676 '@' + pin); 677 #endif 678 return; 679 } 680 681 #ifdef PCIBIOSVERBOSE 682 if (pcibiosverbose) { 683 printf("%03d:%02d:%d 0x%04x 0x%04x %c 0x%02x", 684 bus, device, function, PCI_VENDOR(id), PCI_PRODUCT(id), 685 '@' + pin, l->clink); 686 if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 687 printf(" -"); 688 else 689 printf(" %3d", l->irq); 690 printf(" %d ", l->fixup_stage); 691 } 692 #endif 693 694 /* 695 * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck 696 * with them. 697 */ 698 if (irq == 14 || irq == 15) { 699 PCIBIOS_PRINTV((" WARNING: ignored\n")); 700 return; 701 } 702 703 if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 704 /* Appropriate interrupt was not found. */ 705 if (pciintr_icu_tag == NULL && 706 irq != 0 && irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 707 /* 708 * Do not print warning, 709 * if no compatible PCI ICU found, 710 * but the irq is already assigned by BIOS. 711 */ 712 PCIBIOS_PRINTV(("\n")); 713 } else { 714 PCIBIOS_PRINTV((" WARNING: missing IRQ\n")); 715 } 716 return; 717 } 718 719 if (l->irq == irq) { 720 /* don't have to reconfigure */ 721 PCIBIOS_PRINTV((" already assigned\n")); 722 return; 723 } 724 725 if (irq == 0 || irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 726 PCIBIOS_PRINTV((" fixed up\n")); 727 } else { 728 /* routed by BIOS, but inconsistent */ 729 #ifdef PCIBIOS_INTR_FIXUP_FORCE 730 /* believe PCI IRQ Routing table */ 731 PCIBIOS_PRINTV((" WARNING: overriding irq %d\n", irq)); 732 #else 733 /* believe PCI Interrupt Configuration Register (default) */ 734 PCIBIOS_PRINTV((" WARNING: preserving irq %d\n", irq)); 735 return; 736 #endif 737 } 738 739 intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT); 740 intr |= (l->irq << PCI_INTERRUPT_LINE_SHIFT); 741 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr); 742 } 743 744 int 745 pci_intr_fixup(pci_chipset_tag_t pc, bus_space_tag_t iot, u_int16_t *pciirq) 746 { 747 const struct pciintr_icu_table *piit = NULL; 748 pcitag_t icutag; 749 pcireg_t icuid; 750 751 /* 752 * Attempt to initialize our PCI interrupt router. If 753 * the PIR Table is present in ROM, use the location 754 * specified by the PIR Table, and use the compat ID, 755 * if present. Otherwise, we have to look for the router 756 * ourselves (the PCI-ISA bridge). 757 * 758 * A number of buggy BIOS implementations leave the router 759 * entry as 000:00:0, which is typically not the correct 760 * device/function. If the router device address is set to 761 * this value, and the compatible router entry is undefined 762 * (zero is the correct value to indicate undefined), then we 763 * work on the basis it is most likely an error, and search 764 * the entire device-space of bus 0 (but obviously starting 765 * with 000:00:0, in case that really is the right one). 766 */ 767 if (pcibios_pir_header.signature != 0 && 768 (pcibios_pir_header.router_bus != 0 || 769 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc) != 0 || 770 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc) != 0 || 771 pcibios_pir_header.compat_router != 0)) { 772 icutag = pci_make_tag(pc, pcibios_pir_header.router_bus, 773 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc), 774 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc)); 775 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 776 if ((piit = pciintr_icu_lookup(icuid)) == NULL) { 777 /* 778 * if we fail to look up an ICU at given 779 * PCI address, try compat ID next. 780 */ 781 icuid = pcibios_pir_header.compat_router; 782 piit = pciintr_icu_lookup(icuid); 783 } 784 } else { 785 int device, maxdevs = pci_bus_maxdevs(pc, 0); 786 787 /* 788 * Search configuration space for a known interrupt 789 * router. 790 */ 791 for (device = 0; device < maxdevs; device++) { 792 const struct pci_quirkdata *qd; 793 int function, nfuncs; 794 pcireg_t bhlcr; 795 796 icutag = pci_make_tag(pc, 0, device, 0); 797 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 798 799 /* Invalid vendor ID value? */ 800 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 801 continue; 802 /* XXX Not invalid, but we've done this ~forever. */ 803 if (PCI_VENDOR(icuid) == 0) 804 continue; 805 806 qd = pci_lookup_quirkdata(PCI_VENDOR(icuid), 807 PCI_PRODUCT(icuid)); 808 809 bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG); 810 if (PCI_HDRTYPE_MULTIFN(bhlcr) || 811 (qd != NULL && 812 (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0)) 813 nfuncs = 8; 814 else 815 nfuncs = 1; 816 817 for (function = 0; function < nfuncs; function++) { 818 icutag = pci_make_tag(pc, 0, device, function); 819 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 820 821 /* Invalid vendor ID value? */ 822 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 823 continue; 824 /* Not invalid, but we've done this ~forever */ 825 if (PCI_VENDOR(icuid) == 0) 826 continue; 827 828 piit = pciintr_icu_lookup(icuid); 829 if (piit != NULL) 830 goto found; 831 } 832 } 833 834 /* 835 * Invalidate the ICU ID. If we failed to find the 836 * interrupt router (piit == NULL) we don't want to 837 * display a spurious device address below containing 838 * the product information of the last device we 839 * looked at. 840 */ 841 icuid = 0; 842 found:; 843 } 844 845 if (piit == NULL) { 846 printf("pci_intr_fixup: no compatible PCI ICU found"); 847 if (pcibios_pir_header.signature != 0 && icuid != 0) 848 printf(": ICU vendor 0x%04x product 0x%04x", 849 PCI_VENDOR(icuid), PCI_PRODUCT(icuid)); 850 printf("\n"); 851 #ifdef PCIBIOS_INTR_GUESS 852 if (pciintr_link_init()) 853 return (-1); /* non-fatal */ 854 if (pciintr_guess_irq()) 855 return (-1); /* non-fatal */ 856 if (pciintr_header_fixup(pc)) 857 return (1); /* fatal */ 858 return (0); /* success! */ 859 #else 860 return (-1); /* non-fatal */ 861 #endif 862 } 863 864 /* 865 * Initialize the PCI ICU. 866 */ 867 if ((*piit->piit_init)(pc, iot, icutag, &pciintr_icu_tag, 868 &pciintr_icu_handle) != 0) 869 return (-1); /* non-fatal */ 870 871 /* 872 * Initialize the PCI interrupt link map. 873 */ 874 if (pciintr_link_init()) 875 return (-1); /* non-fatal */ 876 877 /* 878 * Fix up the link->IRQ mappings. 879 */ 880 if (pciintr_link_fixup() != 0) 881 return (-1); /* non-fatal */ 882 883 /* 884 * Now actually program the PCI ICU with the new 885 * routing information. 886 */ 887 if (pciintr_link_route(pciirq) != 0) 888 return (1); /* fatal */ 889 890 /* 891 * Now that we've routed all of the PIRQs, rewrite the PCI 892 * configuration headers to reflect the new mapping. 893 */ 894 if (pciintr_header_fixup(pc) != 0) 895 return (1); /* fatal */ 896 897 /* 898 * Free any unused PCI IRQs for ISA devices. 899 */ 900 if (pciintr_irq_release(pciirq) != 0) 901 return (-1); /* non-fatal */ 902 903 /* 904 * All done! 905 */ 906 return (0); /* success! */ 907 } 908
Indexes created Wed Oct 15 16:09:53 GMT 2025