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pci_intr_fixup.c revision 1.26
      1 /*	$NetBSD: pci_intr_fixup.c,v 1.26 2003/10/25 18:40:58 christos Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1999, by UCHIYAMA Yasushi
     42  * All rights reserved.
     43  *
     44  * Redistribution and use in source and binary forms, with or without
     45  * modification, are permitted provided that the following conditions
     46  * are met:
     47  * 1. Redistributions of source code must retain the above copyright
     48  *    notice, this list of conditions and the following disclaimer.
     49  * 2. The name of the developer may NOT be used to endorse or promote products
     50  *    derived from this software without specific prior written permission.
     51  *
     52  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     62  * SUCH DAMAGE.
     63  */
     64 
     65 /*
     66  * PCI Interrupt Router support.
     67  */
     68 
     69 #include <sys/cdefs.h>
     70 __KERNEL_RCSID(0, "$NetBSD: pci_intr_fixup.c,v 1.26 2003/10/25 18:40:58 christos Exp $");
     71 
     72 #include "opt_pcibios.h"
     73 
     74 #include <sys/param.h>
     75 #include <sys/systm.h>
     76 #include <sys/kernel.h>
     77 #include <sys/malloc.h>
     78 #include <sys/queue.h>
     79 #include <sys/device.h>
     80 
     81 #include <machine/bus.h>
     82 #include <machine/intr.h>
     83 
     84 #include <dev/pci/pcireg.h>
     85 #include <dev/pci/pcivar.h>
     86 #include <dev/pci/pcidevs.h>
     87 
     88 #include <i386/pci/pci_intr_fixup.h>
     89 #include <i386/pci/pcibios.h>
     90 
     91 struct pciintr_link_map {
     92 	int link;
     93 	int clink;
     94 	int irq;
     95 	u_int16_t bitmap;
     96 	int fixup_stage;
     97 	SIMPLEQ_ENTRY(pciintr_link_map) list;
     98 };
     99 
    100 pciintr_icu_tag_t pciintr_icu_tag;
    101 pciintr_icu_handle_t pciintr_icu_handle;
    102 
    103 #ifdef PCIBIOS_IRQS_HINT
    104 int pcibios_irqs_hint = PCIBIOS_IRQS_HINT;
    105 #endif
    106 
    107 struct pciintr_link_map *pciintr_link_lookup __P((int));
    108 struct pciintr_link_map *pciintr_link_alloc __P((struct pcibios_intr_routing *,
    109 	int));
    110 struct pcibios_intr_routing *pciintr_pir_lookup __P((int, int));
    111 static int pciintr_bitmap_count_irq __P((int, int *));
    112 static int pciintr_bitmap_find_lowest_irq __P((int, int *));
    113 int	pciintr_link_init __P((void));
    114 #ifdef PCIBIOS_INTR_GUESS
    115 int	pciintr_guess_irq __P((void));
    116 #endif
    117 int	pciintr_link_fixup __P((void));
    118 int	pciintr_link_route __P((u_int16_t *));
    119 int	pciintr_irq_release __P((u_int16_t *));
    120 int	pciintr_header_fixup __P((pci_chipset_tag_t));
    121 void	pciintr_do_header_fixup __P((pci_chipset_tag_t, pcitag_t, void*));
    122 
    123 SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list;
    124 
    125 const struct pciintr_icu_table {
    126 	pci_vendor_id_t	piit_vendor;
    127 	pci_product_id_t piit_product;
    128 	int (*piit_init) __P((pci_chipset_tag_t,
    129 		bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *,
    130 		pciintr_icu_handle_t *));
    131 } pciintr_icu_table[] = {
    132 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371MX,
    133 	  piix_init },
    134 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371AB_ISA,
    135 	  piix_init },
    136 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371FB_ISA,
    137 	  piix_init },
    138 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82371SB_ISA,
    139 	  piix_init },
    140 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82801BA_LPC,
    141 	  piix_init },
    142 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82801BAM_LPC,
    143 	  piix_init },
    144 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82801DB_LPC,
    145 	  piix_init },
    146 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82801EB_LPC,
    147 	  piix_init },
    148 
    149 	{ PCI_VENDOR_OPTI,	PCI_PRODUCT_OPTI_82C558,
    150 	  opti82c558_init },
    151 	{ PCI_VENDOR_OPTI,	PCI_PRODUCT_OPTI_82C700,
    152 	  opti82c700_init },
    153 
    154 	{ PCI_VENDOR_VIATECH,	PCI_PRODUCT_VIATECH_VT82C586_ISA,
    155 	  via82c586_init },
    156 	{ PCI_VENDOR_VIATECH,   PCI_PRODUCT_VIATECH_VT82C596A,
    157 	  via82c586_init },
    158 	{ PCI_VENDOR_VIATECH,	PCI_PRODUCT_VIATECH_VT82C686A_ISA,
    159 	  via82c586_init },
    160 
    161 	{ PCI_VENDOR_SIS,	PCI_PRODUCT_SIS_85C503,
    162 	  sis85c503_init },
    163 
    164 	{ PCI_VENDOR_AMD,	PCI_PRODUCT_AMD_PBC756_PMC,
    165 	  amd756_init },
    166 
    167 	{ PCI_VENDOR_ALI,	PCI_PRODUCT_ALI_M1543,
    168 	  ali1543_init },
    169 
    170 	{ 0,			0,
    171 	  NULL },
    172 };
    173 
    174 const struct pciintr_icu_table *pciintr_icu_lookup __P((pcireg_t));
    175 
    176 const struct pciintr_icu_table *
    177 pciintr_icu_lookup(id)
    178 	pcireg_t id;
    179 {
    180 	const struct pciintr_icu_table *piit;
    181 
    182 	for (piit = pciintr_icu_table;
    183 	     piit->piit_init != NULL;
    184 	     piit++) {
    185 		if (PCI_VENDOR(id) == piit->piit_vendor &&
    186 		    PCI_PRODUCT(id) == piit->piit_product)
    187 			return (piit);
    188 	}
    189 
    190 	return (NULL);
    191 }
    192 
    193 struct pciintr_link_map *
    194 pciintr_link_lookup(link)
    195 	int link;
    196 {
    197 	struct pciintr_link_map *l;
    198 
    199 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
    200 		if (l->link == link)
    201 			return (l);
    202 	}
    203 
    204 	return (NULL);
    205 }
    206 
    207 struct pciintr_link_map *
    208 pciintr_link_alloc(pir, pin)
    209 	struct pcibios_intr_routing *pir;
    210 	int pin;
    211 {
    212 	int link = pir->linkmap[pin].link, clink, irq;
    213 	struct pciintr_link_map *l, *lstart;
    214 
    215 	if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */
    216 		/*
    217 		 * Get the canonical link value for this entry.
    218 		 */
    219 		if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle,
    220 		    link, &clink) != 0) {
    221 			/*
    222 			 * ICU doesn't understand the link value.
    223 			 * Just ignore this PIR entry.
    224 			 */
    225 #ifdef DIAGNOSTIC
    226 			printf("pciintr_link_alloc: bus %d device %d: "
    227 			    "link 0x%02x invalid\n",
    228 			    pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link);
    229 #endif
    230 			return (NULL);
    231 		}
    232 
    233 		/*
    234 		 * Check the link value by asking the ICU for the
    235 		 * canonical link value.
    236 		 * Also, determine if this PIRQ is mapped to an IRQ.
    237 		 */
    238 		if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle,
    239 		    clink, &irq) != 0) {
    240 			/*
    241 			 * ICU doesn't understand the canonical link value.
    242 			 * Just ignore this PIR entry.
    243 			 */
    244 #ifdef DIAGNOSTIC
    245 			printf("pciintr_link_alloc: "
    246 			    "bus %d device %d link 0x%02x: "
    247 			    "PIRQ 0x%02x invalid\n",
    248 			    pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link,
    249 			    clink);
    250 #endif
    251 			return (NULL);
    252 		}
    253 	}
    254 
    255 	l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT);
    256 	if (l == NULL)
    257 		panic("pciintr_link_alloc");
    258 
    259 	memset(l, 0, sizeof(*l));
    260 
    261 	l->link = link;
    262 	l->bitmap = pir->linkmap[pin].bitmap;
    263 	if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */
    264 		l->clink = clink;
    265 		l->irq = irq; /* maybe X86_PCI_INTERRUPT_LINE_NO_CONNECTION */
    266 	} else {
    267 		l->clink = link; /* only for PCIBIOSVERBOSE diagnostic */
    268 		l->irq = X86_PCI_INTERRUPT_LINE_NO_CONNECTION;
    269 	}
    270 
    271 	lstart = SIMPLEQ_FIRST(&pciintr_link_map_list);
    272 	if (lstart == NULL || lstart->link < l->link)
    273 		SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list);
    274 	else
    275 		SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list);
    276 
    277 	return (l);
    278 }
    279 
    280 struct pcibios_intr_routing *
    281 pciintr_pir_lookup(bus, device)
    282 	int bus, device;
    283 {
    284 	struct pcibios_intr_routing *pir;
    285 	int entry;
    286 
    287 	if (pcibios_pir_table == NULL)
    288 		return (NULL);
    289 
    290 	for (entry = 0; entry < pcibios_pir_table_nentries; entry++) {
    291 		pir = &pcibios_pir_table[entry];
    292 		if (pir->bus == bus &&
    293 		    PIR_DEVFUNC_DEVICE(pir->device) == device)
    294 			return (pir);
    295 	}
    296 
    297 	return (NULL);
    298 }
    299 
    300 static int
    301 pciintr_bitmap_count_irq(irq_bitmap, irqp)
    302 	int irq_bitmap, *irqp;
    303 {
    304 	int i, bit, count = 0, irq = X86_PCI_INTERRUPT_LINE_NO_CONNECTION;
    305 
    306 	if (irq_bitmap != 0) {
    307 		for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
    308 			if (irq_bitmap & bit) {
    309 				irq = i;
    310 				count++;
    311 			}
    312 		}
    313 	}
    314 	*irqp = irq;
    315 	return (count);
    316 }
    317 
    318 static int
    319 pciintr_bitmap_find_lowest_irq(irq_bitmap, irqp)
    320 	int irq_bitmap, *irqp;
    321 {
    322 	int i, bit;
    323 
    324 	if (irq_bitmap != 0) {
    325 		for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
    326 			if (irq_bitmap & bit) {
    327 				*irqp = i;
    328 				return (1); /* found */
    329 			}
    330 		}
    331 	}
    332 	return (0); /* not found */
    333 }
    334 
    335 int
    336 pciintr_link_init()
    337 {
    338 	int entry, pin, link;
    339 	struct pcibios_intr_routing *pir;
    340 	struct pciintr_link_map *l;
    341 
    342 	if (pcibios_pir_table == NULL) {
    343 		/* No PIR table; can't do anything. */
    344 		printf("pciintr_link_init: no PIR table\n");
    345 		return (1);
    346 	}
    347 
    348 	SIMPLEQ_INIT(&pciintr_link_map_list);
    349 
    350 	for (entry = 0; entry < pcibios_pir_table_nentries; entry++) {
    351 		pir = &pcibios_pir_table[entry];
    352 		for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) {
    353 			link = pir->linkmap[pin].link;
    354 			if (link == 0) {
    355 				/* No connection for this pin. */
    356 				continue;
    357 			}
    358 			/*
    359 			 * Multiple devices may be wired to the same
    360 			 * interrupt; check to see if we've seen this
    361 			 * one already.  If not, allocate a new link
    362 			 * map entry and stuff it in the map.
    363 			 */
    364 			l = pciintr_link_lookup(link);
    365 			if (l == NULL) {
    366 				(void) pciintr_link_alloc(pir, pin);
    367 			} else if (pir->linkmap[pin].bitmap != l->bitmap) {
    368 				/*
    369 				 * violates PCI IRQ Routing Table Specification
    370 				 */
    371 #ifdef DIAGNOSTIC
    372 				printf("pciintr_link_init: "
    373 				    "bus %d device %d link 0x%02x: "
    374 				    "bad irq bitmap 0x%04x, "
    375 				    "should be 0x%04x\n",
    376 				    pir->bus, PIR_DEVFUNC_DEVICE(pir->device),
    377 				    link, pir->linkmap[pin].bitmap, l->bitmap);
    378 #endif
    379 				/* safer value. */
    380 				l->bitmap &= pir->linkmap[pin].bitmap;
    381 				/* XXX - or, should ignore this entry? */
    382 			}
    383 		}
    384 	}
    385 
    386 	return (0);
    387 }
    388 
    389 #ifdef PCIBIOS_INTR_GUESS
    390 /*
    391  * No compatible PCI ICU found.
    392  * Hopes the BIOS already setup the ICU.
    393  */
    394 int
    395 pciintr_guess_irq()
    396 {
    397 	struct pciintr_link_map *l;
    398 	int irq, guessed = 0;
    399 
    400 	/*
    401 	 * Stage 1: If only one IRQ is available for the link, use it.
    402 	 */
    403 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
    404 		if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION)
    405 			continue;
    406 		if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) {
    407 			l->irq = irq;
    408 			l->fixup_stage = 1;
    409 #ifdef PCIINTR_DEBUG
    410 			printf("pciintr_guess_irq (stage 1): "
    411 			    "guessing PIRQ 0x%02x to be IRQ %d\n",
    412 			    l->clink, l->irq);
    413 #endif
    414 			guessed = 1;
    415 		}
    416 	}
    417 
    418 	return (guessed ? 0 : -1);
    419 }
    420 #endif /* PCIBIOS_INTR_GUESS */
    421 
    422 int
    423 pciintr_link_fixup()
    424 {
    425 	struct pciintr_link_map *l;
    426 	int irq;
    427 	u_int16_t pciirq = 0;
    428 
    429 	/*
    430 	 * First stage: Attempt to connect PIRQs which aren't
    431 	 * yet connected.
    432 	 */
    433 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
    434 		if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) {
    435 			/*
    436 			 * Interrupt is already connected.  Don't do
    437 			 * anything to it.
    438 			 * In this case, l->fixup_stage == 0.
    439 			 */
    440 			pciirq |= 1 << l->irq;
    441 #ifdef PCIINTR_DEBUG
    442 			printf("pciintr_link_fixup: PIRQ 0x%02x already "
    443 			    "connected to IRQ %d\n", l->clink, l->irq);
    444 #endif
    445 			continue;
    446 		}
    447 		/*
    448 		 * Interrupt isn't connected.  Attempt to assign it to an IRQ.
    449 		 */
    450 #ifdef PCIINTR_DEBUG
    451 		printf("pciintr_link_fixup: PIRQ 0x%02x not connected",
    452 		    l->clink);
    453 #endif
    454 		/*
    455 		 * Just do the easy case now; we'll defer the harder ones
    456 		 * to Stage 2.
    457 		 */
    458 		if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) {
    459 			l->irq = irq;
    460 			l->fixup_stage = 1;
    461 			pciirq |= 1 << irq;
    462 #ifdef PCIINTR_DEBUG
    463 			printf(", assigning IRQ %d", l->irq);
    464 #endif
    465 		}
    466 #ifdef PCIINTR_DEBUG
    467 		printf("\n");
    468 #endif
    469 	}
    470 
    471 	/*
    472 	 * Stage 2: Attempt to connect PIRQs which we didn't
    473 	 * connect in Stage 1.
    474 	 */
    475 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
    476 		if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION)
    477 			continue;
    478 		if (pciintr_bitmap_find_lowest_irq(l->bitmap & pciirq,
    479 		    &l->irq)) {
    480 			/*
    481 			 * This IRQ is a valid PCI IRQ already
    482 			 * connected to another PIRQ, and also an
    483 			 * IRQ our PIRQ can use; connect it up!
    484 			 */
    485 			l->fixup_stage = 2;
    486 #ifdef PCIINTR_DEBUG
    487 			printf("pciintr_link_fixup (stage 2): "
    488 			       "assigning IRQ %d to PIRQ 0x%02x\n",
    489 			       l->irq, l->clink);
    490 #endif
    491 		}
    492 	}
    493 
    494 #ifdef PCIBIOS_IRQS_HINT
    495 	/*
    496 	 * Stage 3: The worst case. I need configuration hint that
    497 	 * user supplied a mask for the PCI irqs
    498 	 */
    499 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
    500 		if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION)
    501 			continue;
    502 		if (pciintr_bitmap_find_lowest_irq(
    503 		    l->bitmap & pcibios_irqs_hint, &l->irq)) {
    504 			l->fixup_stage = 3;
    505 #ifdef PCIINTR_DEBUG
    506 			printf("pciintr_link_fixup (stage 3): "
    507 			       "assigning IRQ %d to PIRQ 0x%02x\n",
    508 			       l->irq, l->clink);
    509 #endif
    510 		}
    511 	}
    512 #endif /* PCIBIOS_IRQS_HINT */
    513 
    514 	return (0);
    515 }
    516 
    517 int
    518 pciintr_link_route(pciirq)
    519 	u_int16_t *pciirq;
    520 {
    521 	struct pciintr_link_map *l;
    522 	int rv = 0;
    523 
    524 	*pciirq = 0;
    525 
    526 	SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) {
    527 		if (l->fixup_stage == 0) {
    528 			if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) {
    529 				/* Appropriate interrupt was not found. */
    530 #ifdef DIAGNOSTIC
    531 				printf("pciintr_link_route: "
    532 				    "PIRQ 0x%02x: no IRQ, try "
    533 				    "\"options PCIBIOS_IRQS_HINT=0x%04x\"\n",
    534 				    l->clink,
    535 				    /* suggest irq 9/10/11, if possible */
    536 				    (l->bitmap & 0x0e00) ? (l->bitmap & 0x0e00)
    537 				    : l->bitmap);
    538 #endif
    539 			} else {
    540 				/* BIOS setting has no problem */
    541 #ifdef PCIINTR_DEBUG
    542 				printf("pciintr_link_route: "
    543 				    "route of PIRQ 0x%02x -> "
    544 				    "IRQ %d preserved BIOS setting\n",
    545 				    l->clink, l->irq);
    546 #endif
    547 				*pciirq |= (1 << l->irq);
    548 			}
    549 			continue; /* nothing to do. */
    550 		}
    551 
    552 		if (pciintr_icu_set_intr(pciintr_icu_tag, pciintr_icu_handle,
    553 					 l->clink, l->irq) != 0 ||
    554 		    pciintr_icu_set_trigger(pciintr_icu_tag,
    555 					    pciintr_icu_handle,
    556 					    l->irq, IST_LEVEL) != 0) {
    557 			printf("pciintr_link_route: route of PIRQ 0x%02x -> "
    558 			    "IRQ %d failed\n", l->clink, l->irq);
    559 			rv = 1;
    560 		} else {
    561 			/*
    562 			 * Succssfully routed interrupt.  Mark this as
    563 			 * a PCI interrupt.
    564 			 */
    565 			*pciirq |= (1 << l->irq);
    566 		}
    567 	}
    568 
    569 	return (rv);
    570 }
    571 
    572 int
    573 pciintr_irq_release(pciirq)
    574 	u_int16_t *pciirq;
    575 {
    576 	int i, bit;
    577 	u_int16_t bios_pciirq;
    578 	int reg;
    579 
    580 #ifdef PCIINTR_DEBUG
    581 	printf("pciintr_irq_release: fixup pciirq level/edge map 0x%04x\n",
    582 	    *pciirq);
    583 #endif
    584 
    585 	/* Get bios level/edge setting. */
    586 	bios_pciirq = 0;
    587 	for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
    588 		(void)pciintr_icu_get_trigger(pciintr_icu_tag,
    589 		    pciintr_icu_handle, i, &reg);
    590 		if (reg == IST_LEVEL)
    591 			bios_pciirq |= bit;
    592 	}
    593 
    594 #ifdef PCIINTR_DEBUG
    595 	printf("pciintr_irq_release: bios  pciirq level/edge map 0x%04x\n",
    596 	    bios_pciirq);
    597 #endif /* PCIINTR_DEBUG */
    598 
    599 	/* fixup final level/edge setting. */
    600 	*pciirq |= bios_pciirq;
    601 	for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
    602 		if ((*pciirq & bit) == 0)
    603 			reg = IST_EDGE;
    604 		else
    605 			reg = IST_LEVEL;
    606 		(void) pciintr_icu_set_trigger(pciintr_icu_tag,
    607 			    pciintr_icu_handle, i, reg);
    608 
    609 	}
    610 
    611 #ifdef PCIINTR_DEBUG
    612 	printf("pciintr_irq_release: final pciirq level/edge map 0x%04x\n",
    613 	    *pciirq);
    614 #endif /* PCIINTR_DEBUG */
    615 
    616 	return (0);
    617 }
    618 
    619 int
    620 pciintr_header_fixup(pc)
    621 	pci_chipset_tag_t pc;
    622 {
    623 	PCIBIOS_PRINTV(("------------------------------------------\n"));
    624 	PCIBIOS_PRINTV(("  device vendor product pin PIRQ IRQ stage\n"));
    625 	PCIBIOS_PRINTV(("------------------------------------------\n"));
    626 	pci_device_foreach(pc, pcibios_max_bus, pciintr_do_header_fixup, NULL);
    627 	PCIBIOS_PRINTV(("------------------------------------------\n"));
    628 
    629 	return (0);
    630 }
    631 
    632 void
    633 pciintr_do_header_fixup(pc, tag, context)
    634 	pci_chipset_tag_t pc;
    635 	pcitag_t tag;
    636 	void *context;
    637 {
    638 	struct pcibios_intr_routing *pir;
    639 	struct pciintr_link_map *l;
    640 	int pin, irq, link;
    641 	int bus, device, function;
    642 	pcireg_t intr, id;
    643 
    644 	pci_decompose_tag(pc, tag, &bus, &device, &function);
    645 	id = pci_conf_read(pc, tag, PCI_ID_REG);
    646 
    647 	intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
    648 	pin = PCI_INTERRUPT_PIN(intr);
    649 	irq = PCI_INTERRUPT_LINE(intr);
    650 
    651 #if 0
    652 	if (pin == 0) {
    653 		/*
    654 		 * No interrupt used.
    655 		 */
    656 		return;
    657 	}
    658 #endif
    659 
    660 	pir = pciintr_pir_lookup(bus, device);
    661 	if (pir == NULL || (link = pir->linkmap[pin - 1].link) == 0) {
    662 		/*
    663 		 * Interrupt not connected; no
    664 		 * need to change.
    665 		 */
    666 		return;
    667 	}
    668 
    669 	l = pciintr_link_lookup(link);
    670 	if (l == NULL) {
    671 #ifdef PCIINTR_DEBUG
    672 		/*
    673 		 * No link map entry.
    674 		 * Probably pciintr_icu_getclink() or pciintr_icu_get_intr()
    675 		 * was failed.
    676 		 */
    677 		printf("pciintr_header_fixup: no entry for link 0x%02x "
    678 		       "(%d:%d:%d:%c)\n", link, bus, device, function,
    679 		       '@' + pin);
    680 #endif
    681 		return;
    682 	}
    683 
    684 #ifdef PCIBIOSVERBOSE
    685 	if (pcibiosverbose) {
    686 		printf("%03d:%02d:%d 0x%04x 0x%04x   %c  0x%02x",
    687 		    bus, device, function, PCI_VENDOR(id), PCI_PRODUCT(id),
    688 		    '@' + pin, l->clink);
    689 		if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION)
    690 			printf("   -");
    691 		else
    692 			printf(" %3d", l->irq);
    693 		printf("  %d   ", l->fixup_stage);
    694 	}
    695 #endif
    696 
    697 	/*
    698 	 * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck
    699 	 * with them.
    700 	 */
    701 	if (irq == 14 || irq == 15) {
    702 		PCIBIOS_PRINTV((" WARNING: ignored\n"));
    703 		return;
    704 	}
    705 
    706 	if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) {
    707 		/* Appropriate interrupt was not found. */
    708 		if (pciintr_icu_tag == NULL &&
    709 		    irq != 0 && irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) {
    710 			/*
    711 			 * Do not print warning,
    712 			 * if no compatible PCI ICU found,
    713 			 * but the irq is already assigned by BIOS.
    714 			 */
    715 			PCIBIOS_PRINTV(("\n"));
    716 		} else {
    717 			PCIBIOS_PRINTV((" WARNING: missing IRQ\n"));
    718 		}
    719 		return;
    720 	}
    721 
    722 	if (l->irq == irq) {
    723 		/* don't have to reconfigure */
    724 		PCIBIOS_PRINTV((" already assigned\n"));
    725 		return;
    726 	}
    727 
    728 	if (irq == 0 || irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) {
    729 		PCIBIOS_PRINTV((" fixed up\n"));
    730 	} else {
    731 		/* routed by BIOS, but inconsistent */
    732 #ifdef PCIBIOS_INTR_FIXUP_FORCE
    733 		/* believe PCI IRQ Routing table */
    734 		PCIBIOS_PRINTV((" WARNING: overriding irq %d\n", irq));
    735 #else
    736 		/* believe PCI Interrupt Configuration Register (default) */
    737 		PCIBIOS_PRINTV((" WARNING: preserving irq %d\n", irq));
    738 		return;
    739 #endif
    740 	}
    741 
    742 	intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT);
    743 	intr |= (l->irq << PCI_INTERRUPT_LINE_SHIFT);
    744 	pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
    745 }
    746 
    747 int
    748 pci_intr_fixup(pc, iot, pciirq)
    749 	pci_chipset_tag_t pc;
    750 	bus_space_tag_t iot;
    751 	u_int16_t *pciirq;
    752 {
    753 	const struct pciintr_icu_table *piit = NULL;
    754 	pcitag_t icutag;
    755 	pcireg_t icuid;
    756 
    757 	/*
    758 	 * Attempt to initialize our PCI interrupt router.  If
    759 	 * the PIR Table is present in ROM, use the location
    760 	 * specified by the PIR Table, and use the compat ID,
    761 	 * if present.  Otherwise, we have to look for the router
    762 	 * ourselves (the PCI-ISA bridge).
    763 	 *
    764 	 * A number of buggy BIOS implementations leave the router
    765 	 * entry as 000:00:0, which is typically not the correct
    766 	 * device/function.  If the router device address is set to
    767 	 * this value, and the compatible router entry is undefined
    768 	 * (zero is the correct value to indicate undefined), then we
    769 	 * work on the basis it is most likely an error, and search
    770 	 * the entire device-space of bus 0 (but obviously starting
    771 	 * with 000:00:0, in case that really is the right one).
    772 	 */
    773 	if (pcibios_pir_header.signature != 0 &&
    774 	    (pcibios_pir_header.router_bus != 0 ||
    775 	     PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc) != 0 ||
    776 	     PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc) != 0 ||
    777 	     pcibios_pir_header.compat_router != 0)) {
    778 		icutag = pci_make_tag(pc, pcibios_pir_header.router_bus,
    779 		    PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc),
    780 		    PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc));
    781 		icuid = pcibios_pir_header.compat_router;
    782 		if (icuid == 0 ||
    783 		    (piit = pciintr_icu_lookup(icuid)) == NULL) {
    784 			/*
    785 			 * No compat ID, or don't know the compat ID?  Read
    786 			 * it from the configuration header.
    787 			 */
    788 			icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
    789 		}
    790 		if (piit == NULL)
    791 			piit = pciintr_icu_lookup(icuid);
    792 	} else {
    793 		int device, maxdevs = pci_bus_maxdevs(pc, 0);
    794 
    795 		/*
    796 		 * Search configuration space for a known interrupt
    797 		 * router.
    798 		 */
    799 		for (device = 0; device < maxdevs; device++) {
    800 			const struct pci_quirkdata *qd;
    801 			int function, nfuncs;
    802 			pcireg_t bhlcr;
    803 
    804 			icutag = pci_make_tag(pc, 0, device, 0);
    805 			icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
    806 
    807 			/* Invalid vendor ID value? */
    808 			if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID)
    809 				continue;
    810 			/* XXX Not invalid, but we've done this ~forever. */
    811 			if (PCI_VENDOR(icuid) == 0)
    812 				continue;
    813 
    814 			qd = pci_lookup_quirkdata(PCI_VENDOR(icuid),
    815 			    PCI_PRODUCT(icuid));
    816 
    817 			bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG);
    818 			if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
    819 			    (qd != NULL &&
    820 			     (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
    821 				nfuncs = 8;
    822 			else
    823 				nfuncs = 1;
    824 
    825 			for (function = 0; function < nfuncs; function++) {
    826 				icutag = pci_make_tag(pc, 0, device, function);
    827 				icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
    828 
    829 				/* Invalid vendor ID value? */
    830 				if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID)
    831 					continue;
    832 				/* Not invalid, but we've done this ~forever */
    833 				if (PCI_VENDOR(icuid) == 0)
    834 					continue;
    835 
    836 				piit = pciintr_icu_lookup(icuid);
    837 				if (piit != NULL)
    838 					goto found;
    839 			}
    840 		}
    841 
    842 		/*
    843 		 * Invalidate the ICU ID.  If we failed to find the
    844 		 * interrupt router (piit == NULL) we don't want to
    845 		 * display a spurious device address below containing
    846 		 * the product information of the last device we
    847 		 * looked at.
    848 		 */
    849 		icuid = 0;
    850 found:;
    851 	}
    852 
    853 	if (piit == NULL) {
    854 		printf("pci_intr_fixup: no compatible PCI ICU found");
    855 		if (pcibios_pir_header.signature != 0 && icuid != 0)
    856 			printf(": ICU vendor 0x%04x product 0x%04x",
    857 			    PCI_VENDOR(icuid), PCI_PRODUCT(icuid));
    858 		printf("\n");
    859 #ifdef PCIBIOS_INTR_GUESS
    860 		if (pciintr_link_init())
    861 			return (-1);	/* non-fatal */
    862 		if (pciintr_guess_irq())
    863 			return (-1);	/* non-fatal */
    864 		if (pciintr_header_fixup(pc))
    865 			return (1);	/* fatal */
    866 		return (0);		/* success! */
    867 #else
    868 		return (-1);		/* non-fatal */
    869 #endif
    870 	}
    871 
    872 	/*
    873 	 * Initialize the PCI ICU.
    874 	 */
    875 	if ((*piit->piit_init)(pc, iot, icutag, &pciintr_icu_tag,
    876 	    &pciintr_icu_handle) != 0)
    877 		return (-1);		/* non-fatal */
    878 
    879 	/*
    880 	 * Initialize the PCI interrupt link map.
    881 	 */
    882 	if (pciintr_link_init())
    883 		return (-1);		/* non-fatal */
    884 
    885 	/*
    886 	 * Fix up the link->IRQ mappings.
    887 	 */
    888 	if (pciintr_link_fixup() != 0)
    889 		return (-1);		/* non-fatal */
    890 
    891 	/*
    892 	 * Now actually program the PCI ICU with the new
    893 	 * routing information.
    894 	 */
    895 	if (pciintr_link_route(pciirq) != 0)
    896 		return (1);		/* fatal */
    897 
    898 	/*
    899 	 * Now that we've routed all of the PIRQs, rewrite the PCI
    900 	 * configuration headers to reflect the new mapping.
    901 	 */
    902 	if (pciintr_header_fixup(pc) != 0)
    903 		return (1);		/* fatal */
    904 
    905 	/*
    906 	 * Free any unused PCI IRQs for ISA devices.
    907 	 */
    908 	if (pciintr_irq_release(pciirq) != 0)
    909 		return (-1);		/* non-fatal */
    910 
    911 	/*
    912 	 * All done!
    913 	 */
    914 	return (0);			/* success! */
    915 }
    916