pci_intr_fixup.c revision 1.35.2.2
1 /* $NetBSD: pci_intr_fixup.c,v 1.35.2.2 2006/02/18 15:38:37 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1999, by UCHIYAMA Yasushi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. The name of the developer may NOT be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 62 * SUCH DAMAGE. 63 */ 64 65 /* 66 * PCI Interrupt Router support. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: pci_intr_fixup.c,v 1.35.2.2 2006/02/18 15:38:37 yamt Exp $"); 71 72 #include "opt_pcibios.h" 73 #include "opt_pcifixup.h" 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/malloc.h> 79 #include <sys/queue.h> 80 #include <sys/device.h> 81 82 #include <machine/bus.h> 83 #include <machine/intr.h> 84 85 #include <dev/pci/pcireg.h> 86 #include <dev/pci/pcivar.h> 87 #include <dev/pci/pcidevs.h> 88 89 #include <i386/pci/pci_intr_fixup.h> 90 #include <i386/pci/pcibios.h> 91 92 struct pciintr_link_map { 93 int link; 94 int clink; 95 int irq; 96 uint16_t bitmap; 97 int fixup_stage; 98 SIMPLEQ_ENTRY(pciintr_link_map) list; 99 }; 100 101 pciintr_icu_tag_t pciintr_icu_tag; 102 pciintr_icu_handle_t pciintr_icu_handle; 103 104 #ifdef PCIBIOS_IRQS_HINT 105 int pcibios_irqs_hint = PCIBIOS_IRQS_HINT; 106 #endif 107 108 struct pciintr_link_map *pciintr_link_lookup(int); 109 struct pciintr_link_map *pciintr_link_alloc(struct pcibios_intr_routing *, 110 int); 111 struct pcibios_intr_routing *pciintr_pir_lookup(int, int); 112 static int pciintr_bitmap_count_irq(int, int *); 113 static int pciintr_bitmap_find_lowest_irq(int, int *); 114 int pciintr_link_init (void); 115 #ifdef PCIBIOS_INTR_GUESS 116 int pciintr_guess_irq(void); 117 #endif 118 int pciintr_link_fixup(void); 119 int pciintr_link_route(uint16_t *); 120 int pciintr_irq_release(uint16_t *); 121 int pciintr_header_fixup(pci_chipset_tag_t); 122 void pciintr_do_header_fixup(pci_chipset_tag_t, pcitag_t, void*); 123 124 SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list; 125 126 const struct pciintr_icu_table { 127 pci_vendor_id_t piit_vendor; 128 pci_product_id_t piit_product; 129 int (*piit_init)(pci_chipset_tag_t, 130 bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *, 131 pciintr_icu_handle_t *); 132 } pciintr_icu_table[] = { 133 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371MX, 134 piix_init }, 135 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_ISA, 136 piix_init }, 137 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371FB_ISA, 138 piix_init }, 139 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_ISA, 140 piix_init }, 141 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82440MX_ISA, 142 piix_init }, 143 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_LPC, 144 piix_init }, /* ICH */ 145 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_LPC, 146 piix_init }, /* ICH0 */ 147 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_LPC, 148 ich_init }, /* ICH2 */ 149 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BAM_LPC, 150 ich_init }, /* ICH2M */ 151 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_LPC, 152 ich_init }, /* ICH3S */ 153 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CAM_LPC, 154 ich_init }, /* ICH3M */ 155 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_LPC, 156 ich_init }, /* ICH4 */ 157 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_ISA, 158 ich_init }, /* ICH4M */ 159 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_LPC, 160 ich_init }, /* ICH5 */ 161 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_LPC, 162 ich_init }, /* ICH6/ICH6R */ 163 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FBM_LPC, 164 ich_init }, /* ICH6M */ 165 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_LPC, 166 ich_init }, /* ICH7/ICH7R */ 167 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GBM_LPC, 168 ich_init }, /* ICH7-M */ 169 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GHM_LPC, 170 ich_init }, /* ICH7DH/ICH7-M DH */ 171 172 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C558, 173 opti82c558_init }, 174 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C700, 175 opti82c700_init }, 176 177 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_ISA, 178 via82c586_init }, 179 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C596A, 180 via82c586_init }, 181 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_ISA, 182 via82c586_init }, 183 184 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8231, 185 via8231_init }, 186 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8233A, 187 via8231_init }, 188 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8235, 189 via8231_init }, 190 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237, 191 via8231_init }, 192 193 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503, 194 sis85c503_init }, 195 196 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_PMC, 197 amd756_init }, 198 199 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1543, 200 ali1543_init }, 201 202 { 0, 0, 203 NULL }, 204 }; 205 206 const struct pciintr_icu_table *pciintr_icu_lookup(pcireg_t); 207 208 const struct pciintr_icu_table * 209 pciintr_icu_lookup(pcireg_t id) 210 { 211 const struct pciintr_icu_table *piit; 212 213 for (piit = pciintr_icu_table; 214 piit->piit_init != NULL; 215 piit++) { 216 if (PCI_VENDOR(id) == piit->piit_vendor && 217 PCI_PRODUCT(id) == piit->piit_product) 218 return (piit); 219 } 220 221 return (NULL); 222 } 223 224 struct pciintr_link_map * 225 pciintr_link_lookup(int link) 226 { 227 struct pciintr_link_map *l; 228 229 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 230 if (l->link == link) 231 return (l); 232 } 233 234 return (NULL); 235 } 236 237 struct pciintr_link_map * 238 pciintr_link_alloc(struct pcibios_intr_routing *pir, int pin) 239 { 240 int link = pir->linkmap[pin].link, clink, irq; 241 struct pciintr_link_map *l, *lstart; 242 243 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */ 244 /* 245 * Get the canonical link value for this entry. 246 */ 247 if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle, 248 link, &clink) != 0) { 249 /* 250 * ICU doesn't understand the link value. 251 * Just ignore this PIR entry. 252 */ 253 #ifdef DIAGNOSTIC 254 printf("pciintr_link_alloc: bus %d device %d: " 255 "link 0x%02x invalid\n", 256 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link); 257 #endif 258 return (NULL); 259 } 260 261 /* 262 * Check the link value by asking the ICU for the 263 * canonical link value. 264 * Also, determine if this PIRQ is mapped to an IRQ. 265 */ 266 if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle, 267 clink, &irq) != 0) { 268 /* 269 * ICU doesn't understand the canonical link value. 270 * Just ignore this PIR entry. 271 */ 272 #ifdef DIAGNOSTIC 273 printf("pciintr_link_alloc: " 274 "bus %d device %d link 0x%02x: " 275 "PIRQ 0x%02x invalid\n", 276 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link, 277 clink); 278 #endif 279 return (NULL); 280 } 281 } 282 283 l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT); 284 if (l == NULL) 285 panic("pciintr_link_alloc"); 286 287 memset(l, 0, sizeof(*l)); 288 289 l->link = link; 290 l->bitmap = pir->linkmap[pin].bitmap; 291 if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */ 292 l->clink = clink; 293 l->irq = irq; /* maybe X86_PCI_INTERRUPT_LINE_NO_CONNECTION */ 294 } else { 295 l->clink = link; /* only for PCIBIOSVERBOSE diagnostic */ 296 l->irq = X86_PCI_INTERRUPT_LINE_NO_CONNECTION; 297 } 298 299 lstart = SIMPLEQ_FIRST(&pciintr_link_map_list); 300 if (lstart == NULL || lstart->link < l->link) 301 SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list); 302 else 303 SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list); 304 305 return (l); 306 } 307 308 struct pcibios_intr_routing * 309 pciintr_pir_lookup(int bus, int device) 310 { 311 struct pcibios_intr_routing *pir; 312 int entry; 313 314 if (pcibios_pir_table == NULL) 315 return (NULL); 316 317 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 318 pir = &pcibios_pir_table[entry]; 319 if (pir->bus == bus && 320 PIR_DEVFUNC_DEVICE(pir->device) == device) 321 return (pir); 322 } 323 324 return (NULL); 325 } 326 327 static int 328 pciintr_bitmap_count_irq(int irq_bitmap, int *irqp) 329 { 330 int i, bit, count = 0, irq = X86_PCI_INTERRUPT_LINE_NO_CONNECTION; 331 332 if (irq_bitmap != 0) { 333 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 334 if (irq_bitmap & bit) { 335 irq = i; 336 count++; 337 } 338 } 339 } 340 *irqp = irq; 341 return (count); 342 } 343 344 static int 345 pciintr_bitmap_find_lowest_irq(int irq_bitmap, int *irqp) 346 { 347 int i, bit; 348 349 if (irq_bitmap != 0) { 350 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 351 if (irq_bitmap & bit) { 352 *irqp = i; 353 return (1); /* found */ 354 } 355 } 356 } 357 return (0); /* not found */ 358 } 359 360 int 361 pciintr_link_init(void) 362 { 363 int entry, pin, link; 364 struct pcibios_intr_routing *pir; 365 struct pciintr_link_map *l; 366 367 if (pcibios_pir_table == NULL) { 368 /* No PIR table; can't do anything. */ 369 printf("pciintr_link_init: no PIR table\n"); 370 return (1); 371 } 372 373 SIMPLEQ_INIT(&pciintr_link_map_list); 374 375 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) { 376 pir = &pcibios_pir_table[entry]; 377 for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) { 378 link = pir->linkmap[pin].link; 379 if (link == 0) { 380 /* No connection for this pin. */ 381 continue; 382 } 383 /* 384 * Multiple devices may be wired to the same 385 * interrupt; check to see if we've seen this 386 * one already. If not, allocate a new link 387 * map entry and stuff it in the map. 388 */ 389 l = pciintr_link_lookup(link); 390 if (l == NULL) { 391 (void) pciintr_link_alloc(pir, pin); 392 } else if (pir->linkmap[pin].bitmap != l->bitmap) { 393 /* 394 * violates PCI IRQ Routing Table Specification 395 */ 396 #ifdef DIAGNOSTIC 397 printf("pciintr_link_init: " 398 "bus %d device %d link 0x%02x: " 399 "bad irq bitmap 0x%04x, " 400 "should be 0x%04x\n", 401 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), 402 link, pir->linkmap[pin].bitmap, l->bitmap); 403 #endif 404 /* safer value. */ 405 l->bitmap &= pir->linkmap[pin].bitmap; 406 /* XXX - or, should ignore this entry? */ 407 } 408 } 409 } 410 411 return (0); 412 } 413 414 #ifdef PCIBIOS_INTR_GUESS 415 /* 416 * No compatible PCI ICU found. 417 * Hopes the BIOS already setup the ICU. 418 */ 419 int 420 pciintr_guess_irq(void) 421 { 422 struct pciintr_link_map *l; 423 int irq, guessed = 0; 424 425 /* 426 * Stage 1: If only one IRQ is available for the link, use it. 427 */ 428 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 429 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 430 continue; 431 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 432 l->irq = irq; 433 l->fixup_stage = 1; 434 #ifdef PCIINTR_DEBUG 435 printf("pciintr_guess_irq (stage 1): " 436 "guessing PIRQ 0x%02x to be IRQ %d\n", 437 l->clink, l->irq); 438 #endif 439 guessed = 1; 440 } 441 } 442 443 return (guessed ? 0 : -1); 444 } 445 #endif /* PCIBIOS_INTR_GUESS */ 446 447 int 448 pciintr_link_fixup(void) 449 { 450 struct pciintr_link_map *l; 451 int irq; 452 uint16_t pciirq = 0; 453 454 /* 455 * First stage: Attempt to connect PIRQs which aren't 456 * yet connected. 457 */ 458 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 459 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 460 /* 461 * Interrupt is already connected. Don't do 462 * anything to it. 463 * In this case, l->fixup_stage == 0. 464 */ 465 pciirq |= 1 << l->irq; 466 #ifdef PCIINTR_DEBUG 467 printf("pciintr_link_fixup: PIRQ 0x%02x already " 468 "connected to IRQ %d\n", l->clink, l->irq); 469 #endif 470 continue; 471 } 472 /* 473 * Interrupt isn't connected. Attempt to assign it to an IRQ. 474 */ 475 #ifdef PCIINTR_DEBUG 476 printf("pciintr_link_fixup: PIRQ 0x%02x not connected", 477 l->clink); 478 #endif 479 /* 480 * Just do the easy case now; we'll defer the harder ones 481 * to Stage 2. 482 */ 483 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) { 484 l->irq = irq; 485 l->fixup_stage = 1; 486 pciirq |= 1 << irq; 487 #ifdef PCIINTR_DEBUG 488 printf(", assigning IRQ %d", l->irq); 489 #endif 490 } 491 #ifdef PCIINTR_DEBUG 492 printf("\n"); 493 #endif 494 } 495 496 /* 497 * Stage 2: Attempt to connect PIRQs which we didn't 498 * connect in Stage 1. 499 */ 500 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 501 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 502 continue; 503 if (pciintr_bitmap_find_lowest_irq(l->bitmap & pciirq, 504 &l->irq)) { 505 /* 506 * This IRQ is a valid PCI IRQ already 507 * connected to another PIRQ, and also an 508 * IRQ our PIRQ can use; connect it up! 509 */ 510 l->fixup_stage = 2; 511 #ifdef PCIINTR_DEBUG 512 printf("pciintr_link_fixup (stage 2): " 513 "assigning IRQ %d to PIRQ 0x%02x\n", 514 l->irq, l->clink); 515 #endif 516 } 517 } 518 519 #ifdef PCIBIOS_IRQS_HINT 520 /* 521 * Stage 3: The worst case. I need configuration hint that 522 * user supplied a mask for the PCI irqs 523 */ 524 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 525 if (l->irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 526 continue; 527 if (pciintr_bitmap_find_lowest_irq( 528 l->bitmap & pcibios_irqs_hint, &l->irq)) { 529 l->fixup_stage = 3; 530 #ifdef PCIINTR_DEBUG 531 printf("pciintr_link_fixup (stage 3): " 532 "assigning IRQ %d to PIRQ 0x%02x\n", 533 l->irq, l->clink); 534 #endif 535 } 536 } 537 #endif /* PCIBIOS_IRQS_HINT */ 538 539 return (0); 540 } 541 542 int 543 pciintr_link_route(uint16_t *pciirq) 544 { 545 struct pciintr_link_map *l; 546 int rv = 0; 547 548 *pciirq = 0; 549 550 SIMPLEQ_FOREACH(l, &pciintr_link_map_list, list) { 551 if (l->fixup_stage == 0) { 552 if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 553 /* Appropriate interrupt was not found. */ 554 #ifdef DIAGNOSTIC 555 printf("pciintr_link_route: " 556 "PIRQ 0x%02x: no IRQ, try " 557 "\"options PCIBIOS_IRQS_HINT=0x%04x\"\n", 558 l->clink, 559 /* suggest irq 9/10/11, if possible */ 560 (l->bitmap & 0x0e00) ? (l->bitmap & 0x0e00) 561 : l->bitmap); 562 #endif 563 } else { 564 /* BIOS setting has no problem */ 565 #ifdef PCIINTR_DEBUG 566 printf("pciintr_link_route: " 567 "route of PIRQ 0x%02x -> " 568 "IRQ %d preserved BIOS setting\n", 569 l->clink, l->irq); 570 #endif 571 *pciirq |= (1 << l->irq); 572 } 573 continue; /* nothing to do. */ 574 } 575 576 if (pciintr_icu_set_intr(pciintr_icu_tag, pciintr_icu_handle, 577 l->clink, l->irq) != 0 || 578 pciintr_icu_set_trigger(pciintr_icu_tag, 579 pciintr_icu_handle, 580 l->irq, IST_LEVEL) != 0) { 581 printf("pciintr_link_route: route of PIRQ 0x%02x -> " 582 "IRQ %d failed\n", l->clink, l->irq); 583 rv = 1; 584 } else { 585 /* 586 * Succssfully routed interrupt. Mark this as 587 * a PCI interrupt. 588 */ 589 *pciirq |= (1 << l->irq); 590 } 591 } 592 593 return (rv); 594 } 595 596 int 597 pciintr_irq_release(uint16_t *pciirq) 598 { 599 int i, bit; 600 uint16_t bios_pciirq; 601 int reg; 602 603 #ifdef PCIINTR_DEBUG 604 printf("pciintr_irq_release: fixup pciirq level/edge map 0x%04x\n", 605 *pciirq); 606 #endif 607 608 /* Get bios level/edge setting. */ 609 bios_pciirq = 0; 610 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 611 (void)pciintr_icu_get_trigger(pciintr_icu_tag, 612 pciintr_icu_handle, i, ®); 613 if (reg == IST_LEVEL) 614 bios_pciirq |= bit; 615 } 616 617 #ifdef PCIINTR_DEBUG 618 printf("pciintr_irq_release: bios pciirq level/edge map 0x%04x\n", 619 bios_pciirq); 620 #endif /* PCIINTR_DEBUG */ 621 622 /* fixup final level/edge setting. */ 623 *pciirq |= bios_pciirq; 624 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) { 625 if ((*pciirq & bit) == 0) 626 reg = IST_EDGE; 627 else 628 reg = IST_LEVEL; 629 (void) pciintr_icu_set_trigger(pciintr_icu_tag, 630 pciintr_icu_handle, i, reg); 631 632 } 633 634 #ifdef PCIINTR_DEBUG 635 printf("pciintr_irq_release: final pciirq level/edge map 0x%04x\n", 636 *pciirq); 637 #endif /* PCIINTR_DEBUG */ 638 639 return (0); 640 } 641 642 int 643 pciintr_header_fixup(pci_chipset_tag_t pc) 644 { 645 PCIBIOS_PRINTV(("------------------------------------------\n")); 646 PCIBIOS_PRINTV((" device vendor product pin PIRQ IRQ stage\n")); 647 PCIBIOS_PRINTV(("------------------------------------------\n")); 648 pci_device_foreach(pc, pcibios_max_bus, pciintr_do_header_fixup, NULL); 649 PCIBIOS_PRINTV(("------------------------------------------\n")); 650 651 return (0); 652 } 653 654 void 655 pciintr_do_header_fixup(pci_chipset_tag_t pc, pcitag_t tag, void *context) 656 { 657 struct pcibios_intr_routing *pir; 658 struct pciintr_link_map *l; 659 int pin, irq, link; 660 int bus, device, function; 661 pcireg_t intr, id; 662 663 pci_decompose_tag(pc, tag, &bus, &device, &function); 664 id = pci_conf_read(pc, tag, PCI_ID_REG); 665 666 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 667 pin = PCI_INTERRUPT_PIN(intr); 668 irq = PCI_INTERRUPT_LINE(intr); 669 670 #if 0 671 if (pin == 0) { 672 /* 673 * No interrupt used. 674 */ 675 return; 676 } 677 #endif 678 679 pir = pciintr_pir_lookup(bus, device); 680 if (pir == NULL || (link = pir->linkmap[pin - 1].link) == 0) { 681 /* 682 * Interrupt not connected; no 683 * need to change. 684 */ 685 return; 686 } 687 688 l = pciintr_link_lookup(link); 689 if (l == NULL) { 690 #ifdef PCIINTR_DEBUG 691 /* 692 * No link map entry. 693 * Probably pciintr_icu_getclink() or pciintr_icu_get_intr() 694 * was failed. 695 */ 696 printf("pciintr_header_fixup: no entry for link 0x%02x " 697 "(%d:%d:%d:%c)\n", link, bus, device, function, 698 '@' + pin); 699 #endif 700 return; 701 } 702 703 #ifdef PCIBIOSVERBOSE 704 if (pcibiosverbose) { 705 printf("%03d:%02d:%d 0x%04x 0x%04x %c 0x%02x", 706 bus, device, function, PCI_VENDOR(id), PCI_PRODUCT(id), 707 '@' + pin, l->clink); 708 if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) 709 printf(" -"); 710 else 711 printf(" %3d", l->irq); 712 printf(" %d ", l->fixup_stage); 713 } 714 #endif 715 716 /* 717 * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck 718 * with them. 719 */ 720 if (irq == 14 || irq == 15) { 721 PCIBIOS_PRINTV((" WARNING: ignored\n")); 722 return; 723 } 724 725 if (l->irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 726 /* Appropriate interrupt was not found. */ 727 if (pciintr_icu_tag == NULL && 728 irq != 0 && irq != X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 729 /* 730 * Do not print warning, 731 * if no compatible PCI ICU found, 732 * but the irq is already assigned by BIOS. 733 */ 734 PCIBIOS_PRINTV(("\n")); 735 } else { 736 PCIBIOS_PRINTV((" WARNING: missing IRQ\n")); 737 } 738 return; 739 } 740 741 if (l->irq == irq) { 742 /* don't have to reconfigure */ 743 PCIBIOS_PRINTV((" already assigned\n")); 744 return; 745 } 746 747 if (irq == 0 || irq == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) { 748 PCIBIOS_PRINTV((" fixed up\n")); 749 } else { 750 /* routed by BIOS, but inconsistent */ 751 #ifdef PCI_INTR_FIXUP_FORCE 752 /* believe PCI IRQ Routing table */ 753 PCIBIOS_PRINTV((" WARNING: overriding irq %d\n", irq)); 754 #else 755 /* believe PCI Interrupt Configuration Register (default) */ 756 PCIBIOS_PRINTV((" WARNING: preserving irq %d\n", irq)); 757 return; 758 #endif 759 } 760 761 intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT); 762 intr |= (l->irq << PCI_INTERRUPT_LINE_SHIFT); 763 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr); 764 } 765 766 int 767 pci_intr_fixup(pci_chipset_tag_t pc, bus_space_tag_t iot, uint16_t *pciirq) 768 { 769 const struct pciintr_icu_table *piit = NULL; 770 pcitag_t icutag; 771 pcireg_t icuid; 772 773 /* 774 * Attempt to initialize our PCI interrupt router. If 775 * the PIR Table is present in ROM, use the location 776 * specified by the PIR Table, and use the compat ID, 777 * if present. Otherwise, we have to look for the router 778 * ourselves (the PCI-ISA bridge). 779 * 780 * A number of buggy BIOS implementations leave the router 781 * entry as 000:00:0, which is typically not the correct 782 * device/function. If the router device address is set to 783 * this value, and the compatible router entry is undefined 784 * (zero is the correct value to indicate undefined), then we 785 * work on the basis it is most likely an error, and search 786 * the entire device-space of bus 0 (but obviously starting 787 * with 000:00:0, in case that really is the right one). 788 */ 789 if (pcibios_pir_header.signature != 0 && 790 (pcibios_pir_header.router_bus != 0 || 791 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc) != 0 || 792 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc) != 0 || 793 pcibios_pir_header.compat_router != 0)) { 794 icutag = pci_make_tag(pc, pcibios_pir_header.router_bus, 795 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc), 796 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc)); 797 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 798 if ((piit = pciintr_icu_lookup(icuid)) == NULL) { 799 /* 800 * if we fail to look up an ICU at given 801 * PCI address, try compat ID next. 802 */ 803 icuid = pcibios_pir_header.compat_router; 804 piit = pciintr_icu_lookup(icuid); 805 } 806 } else { 807 int device, maxdevs = pci_bus_maxdevs(pc, 0); 808 809 /* 810 * Search configuration space for a known interrupt 811 * router. 812 */ 813 for (device = 0; device < maxdevs; device++) { 814 const struct pci_quirkdata *qd; 815 int function, nfuncs; 816 pcireg_t bhlcr; 817 818 icutag = pci_make_tag(pc, 0, device, 0); 819 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 820 821 /* Invalid vendor ID value? */ 822 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 823 continue; 824 /* XXX Not invalid, but we've done this ~forever. */ 825 if (PCI_VENDOR(icuid) == 0) 826 continue; 827 828 qd = pci_lookup_quirkdata(PCI_VENDOR(icuid), 829 PCI_PRODUCT(icuid)); 830 831 bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG); 832 if (PCI_HDRTYPE_MULTIFN(bhlcr) || 833 (qd != NULL && 834 (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0)) 835 nfuncs = 8; 836 else 837 nfuncs = 1; 838 839 for (function = 0; function < nfuncs; function++) { 840 icutag = pci_make_tag(pc, 0, device, function); 841 icuid = pci_conf_read(pc, icutag, PCI_ID_REG); 842 843 /* Invalid vendor ID value? */ 844 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID) 845 continue; 846 /* Not invalid, but we've done this ~forever */ 847 if (PCI_VENDOR(icuid) == 0) 848 continue; 849 850 piit = pciintr_icu_lookup(icuid); 851 if (piit != NULL) 852 goto found; 853 } 854 } 855 856 /* 857 * Invalidate the ICU ID. If we failed to find the 858 * interrupt router (piit == NULL) we don't want to 859 * display a spurious device address below containing 860 * the product information of the last device we 861 * looked at. 862 */ 863 icuid = 0; 864 found:; 865 } 866 867 if (piit == NULL) { 868 printf("pci_intr_fixup: no compatible PCI ICU found"); 869 if (pcibios_pir_header.signature != 0 && icuid != 0) 870 printf(": ICU vendor 0x%04x product 0x%04x", 871 PCI_VENDOR(icuid), PCI_PRODUCT(icuid)); 872 printf("\n"); 873 #ifdef PCIBIOS_INTR_GUESS 874 if (pciintr_link_init()) 875 return (-1); /* non-fatal */ 876 if (pciintr_guess_irq()) 877 return (-1); /* non-fatal */ 878 if (pciintr_header_fixup(pc)) 879 return (1); /* fatal */ 880 return (0); /* success! */ 881 #else 882 return (-1); /* non-fatal */ 883 #endif 884 } 885 886 /* 887 * Initialize the PCI ICU. 888 */ 889 if ((*piit->piit_init)(pc, iot, icutag, &pciintr_icu_tag, 890 &pciintr_icu_handle) != 0) 891 return (-1); /* non-fatal */ 892 893 /* 894 * Initialize the PCI interrupt link map. 895 */ 896 if (pciintr_link_init()) 897 return (-1); /* non-fatal */ 898 899 /* 900 * Fix up the link->IRQ mappings. 901 */ 902 if (pciintr_link_fixup() != 0) 903 return (-1); /* non-fatal */ 904 905 /* 906 * Now actually program the PCI ICU with the new 907 * routing information. 908 */ 909 if (pciintr_link_route(pciirq) != 0) 910 return (1); /* fatal */ 911 912 /* 913 * Now that we've routed all of the PIRQs, rewrite the PCI 914 * configuration headers to reflect the new mapping. 915 */ 916 if (pciintr_header_fixup(pc) != 0) 917 return (1); /* fatal */ 918 919 /* 920 * Free any unused PCI IRQs for ISA devices. 921 */ 922 if (pciintr_irq_release(pciirq) != 0) 923 return (-1); /* non-fatal */ 924 925 /* 926 * All done! 927 */ 928 return (0); /* success! */ 929 } 930
Indexes created Wed Oct 15 16:09:53 GMT 2025