pci_intr_fixup.c revision 1.9 1 /* $NetBSD: pci_intr_fixup.c,v 1.9 2000/07/22 17:43:36 soda Exp $ */
2
3 /*-
4 * Copyright (c) 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Copyright (c) 1999, by UCHIYAMA Yasushi
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. The name of the developer may NOT be used to endorse or promote products
50 * derived from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62 * SUCH DAMAGE.
63 */
64
65 /*
66 * PCI Interrupt Router support.
67 */
68
69 #include "opt_pcibios.h"
70
71 #include <sys/param.h>
72 #include <sys/systm.h>
73 #include <sys/kernel.h>
74 #include <sys/malloc.h>
75 #include <sys/queue.h>
76 #include <sys/device.h>
77
78 #include <machine/bus.h>
79 #include <machine/intr.h>
80
81 #include <dev/pci/pcireg.h>
82 #include <dev/pci/pcivar.h>
83 #include <dev/pci/pcidevs.h>
84
85 #include <i386/isa/icu.h>
86 #include <i386/pci/pci_intr_fixup.h>
87 #include <i386/pci/pcibios.h>
88
89 struct pciintr_link_map {
90 int link;
91 int clink;
92 int irq;
93 u_int16_t bitmap;
94 int fixup_stage;
95 SIMPLEQ_ENTRY(pciintr_link_map) list;
96 };
97
98 pciintr_icu_tag_t pciintr_icu_tag;
99 pciintr_icu_handle_t pciintr_icu_handle;
100
101 #ifdef PCIBIOS_IRQS_HINT
102 int pcibios_irqs_hint = PCIBIOS_IRQS_HINT;
103 #endif
104
105 struct pciintr_link_map *pciintr_link_lookup __P((int));
106 struct pciintr_link_map *pciintr_link_alloc __P((struct pcibios_intr_routing *,
107 int));
108 struct pcibios_intr_routing *pciintr_pir_lookup __P((int, int));
109 static int pciintr_bitmap_count_irq __P((int, int *));
110 static int pciintr_bitmap_find_lowest_irq __P((int, int *));
111 int pciintr_link_init __P((void));
112 int pciintr_link_fixup __P((void));
113 int pciintr_link_route __P((u_int16_t *));
114 int pciintr_irq_release __P((u_int16_t *));
115 int pciintr_header_fixup __P((pci_chipset_tag_t));
116 void pciintr_do_header_fixup __P((pci_chipset_tag_t, pcitag_t));
117
118 SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list;
119
120 const struct pciintr_icu_table {
121 pci_vendor_id_t piit_vendor;
122 pci_product_id_t piit_product;
123 int (*piit_init) __P((pci_chipset_tag_t,
124 bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *,
125 pciintr_icu_handle_t *));
126 } pciintr_icu_table[] = {
127 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371MX,
128 piix_init },
129 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_ISA,
130 piix_init },
131 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371FB_ISA,
132 piix_init },
133 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_ISA,
134 piix_init },
135
136 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C558,
137 opti82c558_init },
138 { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C700,
139 opti82c700_init },
140
141 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_ISA,
142 via82c586_init, },
143
144 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503,
145 sis85c503_init },
146
147 { 0, 0,
148 NULL },
149 };
150
151 const struct pciintr_icu_table *pciintr_icu_lookup __P((pcireg_t));
152
153 const struct pciintr_icu_table *
154 pciintr_icu_lookup(id)
155 pcireg_t id;
156 {
157 const struct pciintr_icu_table *piit;
158
159 for (piit = pciintr_icu_table;
160 piit->piit_init != NULL;
161 piit++) {
162 if (PCI_VENDOR(id) == piit->piit_vendor &&
163 PCI_PRODUCT(id) == piit->piit_product)
164 return (piit);
165 }
166
167 return (NULL);
168 }
169
170 struct pciintr_link_map *
171 pciintr_link_lookup(link)
172 int link;
173 {
174 struct pciintr_link_map *l;
175
176 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL;
177 l = SIMPLEQ_NEXT(l, list)) {
178 if (l->link == link)
179 return (l);
180 }
181
182 return (NULL);
183 }
184
185 struct pciintr_link_map *
186 pciintr_link_alloc(pir, pin)
187 struct pcibios_intr_routing *pir;
188 int pin;
189 {
190 int link = pir->linkmap[pin].link, clink, irq;
191 struct pciintr_link_map *l, *lstart;
192
193 /*
194 * Get the canonical link value for this entry.
195 */
196 if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle, link,
197 &clink) != 0) {
198 /*
199 * ICU doesn't understand the link value.
200 * Just ignore this PIR entry.
201 */
202 #ifdef DIAGNOSTIC
203 printf("pciintr_link_alloc: bus %d device %d: "
204 "link 0x%02x invalid\n",
205 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link);
206 #endif
207 return (NULL);
208 }
209
210 /*
211 * Check the link value by asking the ICU for the canonical link value.
212 * Also, determine if this PIRQ is mapped to an IRQ.
213 */
214 if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle, clink,
215 &irq) != 0) {
216 /*
217 * ICU doesn't understand the canonical link value.
218 * Just ignore this PIR entry.
219 */
220 #ifdef DIAGNOSTIC
221 printf("pciintr_link_alloc: bus %d device %d link 0x%02x: "
222 "PIRQ 0x%02x invalid\n",
223 pir->bus, PIR_DEVFUNC_DEVICE(pir->device), link, clink);
224 #endif
225 return (NULL);
226 }
227
228 l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT);
229 if (l == NULL)
230 panic("pciintr_link_alloc");
231
232 memset(l, 0, sizeof(*l));
233
234 l->link = link;
235 l->bitmap = pir->linkmap[pin].bitmap;
236 l->clink = clink;
237 l->irq = irq; /* may be I386_PCI_INTERRUPT_LINE_NO_CONNECTION */
238
239 lstart = SIMPLEQ_FIRST(&pciintr_link_map_list);
240 if (lstart == NULL || lstart->link < l->link)
241 SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list);
242 else
243 SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list);
244
245 return (l);
246 }
247
248 struct pcibios_intr_routing *
249 pciintr_pir_lookup(bus, device)
250 int bus, device;
251 {
252 struct pcibios_intr_routing *pir;
253 int entry;
254
255 if (pcibios_pir_table == NULL)
256 return (NULL);
257
258 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) {
259 pir = &pcibios_pir_table[entry];
260 if (pir->bus == bus &&
261 PIR_DEVFUNC_DEVICE(pir->device) == device)
262 return (pir);
263 }
264
265 return (NULL);
266 }
267
268 static int
269 pciintr_bitmap_count_irq(irq_bitmap, irqp)
270 int irq_bitmap, *irqp;
271 {
272 int i, bit, count = 0, irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION;
273
274 if (irq_bitmap != 0) {
275 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
276 if (irq_bitmap & bit) {
277 irq = i;
278 count++;
279 }
280 }
281 }
282 *irqp = irq;
283 return (count);
284 }
285
286 static int
287 pciintr_bitmap_find_lowest_irq(irq_bitmap, irqp)
288 int irq_bitmap, *irqp;
289 {
290 int i, bit;
291
292 if (irq_bitmap != 0) {
293 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
294 if (irq_bitmap & bit) {
295 *irqp = i;
296 return (1); /* found */
297 }
298 }
299 }
300 return (0); /* not found */
301 }
302
303 int
304 pciintr_link_init()
305 {
306 int entry, pin, error, link;
307 struct pcibios_intr_routing *pir;
308 struct pciintr_link_map *l;
309
310 if (pcibios_pir_table == NULL) {
311 /* No PIR table; can't do anything. */
312 printf("pciintr_link_init: no PIR table\n");
313 return (1);
314 }
315
316 error = 0;
317 SIMPLEQ_INIT(&pciintr_link_map_list);
318
319 for (entry = 0; entry < pcibios_pir_table_nentries; entry++) {
320 pir = &pcibios_pir_table[entry];
321 for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) {
322 link = pir->linkmap[pin].link;
323 if (link == 0) {
324 /* No connection for this pin. */
325 continue;
326 }
327 /*
328 * Multiple devices may be wired to the same
329 * interrupt; check to see if we've seen this
330 * one already. If not, allocate a new link
331 * map entry and stuff it in the map.
332 */
333 l = pciintr_link_lookup(link);
334 if (l == NULL) {
335 (void) pciintr_link_alloc(pir, pin);
336 } else if (pir->linkmap[pin].bitmap != l->bitmap) {
337 /*
338 * violates PCI IRQ Routing Table Specification
339 */
340 #ifdef DIAGNOSTIC
341 printf("pciintr_link_init: "
342 "bus %d device %d link 0x%02x: "
343 "bad irq bitmap 0x%04x, "
344 "should be 0x%04x\n",
345 pir->bus, PIR_DEVFUNC_DEVICE(pir->device),
346 link, pir->linkmap[pin].bitmap, l->bitmap);
347 #endif
348 /* safer value. */
349 l->bitmap &= pir->linkmap[pin].bitmap;
350 /* XXX - or, should ignore this entry? */
351 }
352 }
353 }
354
355 return (error);
356 }
357
358 int
359 pciintr_link_fixup()
360 {
361 struct pciintr_link_map *l;
362 int irq;
363 u_int16_t pciirq = 0;
364
365 /*
366 * First stage: Attempt to connect PIRQs which aren't
367 * yet connected.
368 */
369 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL;
370 l = SIMPLEQ_NEXT(l, list)) {
371 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
372 /*
373 * Interrupt is already connected. Don't do
374 * anything to it.
375 * In this case, l->fixup_stage == 0.
376 */
377 pciirq |= 1 << l->irq;
378 #ifdef PCIINTR_DEBUG
379 printf("pciintr_link_fixup: PIRQ 0x%02x already "
380 "connected to IRQ %d\n", l->clink, l->irq);
381 #endif
382 continue;
383 }
384 /*
385 * Interrupt isn't connected. Attempt to assign it to an IRQ.
386 */
387 #ifdef PCIINTR_DEBUG
388 printf("pciintr_link_fixup: PIRQ 0x%02x not connected",
389 l->clink);
390 #endif
391 /*
392 * Just do the easy case now; we'll defer the harder ones
393 * to Stage 2.
394 */
395 if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) {
396 l->irq = irq;
397 l->fixup_stage = 1;
398 pciirq |= 1 << irq;
399 #ifdef PCIINTR_DEBUG
400 printf(", assigning IRQ %d", l->irq);
401 #endif
402 }
403 #ifdef PCIINTR_DEBUG
404 printf("\n");
405 #endif
406 }
407
408 /*
409 * Stage 2: Attempt to connect PIRQs which we didn't
410 * connect in Stage 1.
411 */
412 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL;
413 l = SIMPLEQ_NEXT(l, list)) {
414 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
415 continue;
416 if (pciintr_bitmap_find_lowest_irq(l->bitmap & pciirq,
417 &l->irq)) {
418 /*
419 * This IRQ is a valid PCI IRQ already
420 * connected to another PIRQ, and also an
421 * IRQ our PIRQ can use; connect it up!
422 */
423 l->fixup_stage = 2;
424 #ifdef PCIINTR_DEBUG
425 printf("pciintr_link_fixup (stage 2): "
426 "assigning IRQ %d to PIRQ 0x%02x\n",
427 l->irq, l->clink);
428 #endif
429 }
430 }
431
432 #ifdef PCIBIOS_IRQS_HINT
433 /*
434 * Stage 3: The worst case. I need configuration hint that
435 * user supplied a mask for the PCI irqs
436 */
437 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL;
438 l = SIMPLEQ_NEXT(l, list)) {
439 if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
440 continue;
441 if (pciintr_bitmap_find_lowest_irq(
442 l->bitmap & pcibios_irqs_hint, &l->irq)) {
443 l->fixup_stage = 3;
444 #ifdef PCIINTR_DEBUG
445 printf("pciintr_link_fixup (stage 3): "
446 "assigning IRQ %d to PIRQ 0x%02x\n",
447 l->irq, l->clink);
448 #endif
449 }
450 }
451 #endif /* PCIBIOS_IRQS_HINT */
452
453 return (0);
454 }
455
456 int
457 pciintr_link_route(pciirq)
458 u_int16_t *pciirq;
459 {
460 struct pciintr_link_map *l;
461 int rv = 0;
462
463 *pciirq = 0;
464
465 for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL;
466 l = SIMPLEQ_NEXT(l, list)) {
467 if (l->fixup_stage == 0) {
468 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
469 /* Appropriate interrupt was not found. */
470 #ifdef DIAGNOSTIC
471 printf("pciintr_link_route: "
472 "PIRQ 0x%02x: no IRQ, try "
473 "\"options PCIBIOS_IRQS_HINT=0x%04x\"\n",
474 l->clink,
475 /* suggest irq 9/10/11, if possible */
476 (l->bitmap & 0x0e00) ? (l->bitmap & 0x0e00)
477 : l->bitmap);
478 #endif
479 } else {
480 /* BIOS setting has no problem */
481 #ifdef PCIINTR_DEBUG
482 printf("pciintr_link_route: "
483 "route of PIRQ 0x%02x -> "
484 "IRQ %d preserved BIOS setting\n",
485 l->clink, l->irq);
486 #endif
487 *pciirq |= (1 << l->irq);
488 }
489 continue; /* nothing to do. */
490 }
491
492 if (pciintr_icu_set_intr(pciintr_icu_tag, pciintr_icu_handle,
493 l->clink, l->irq) != 0 ||
494 pciintr_icu_set_trigger(pciintr_icu_tag,
495 pciintr_icu_handle,
496 l->irq, IST_LEVEL) != 0) {
497 printf("pciintr_link_route: route of PIRQ 0x%02x -> "
498 "IRQ %d failed\n", l->clink, l->irq);
499 rv = 1;
500 } else {
501 /*
502 * Succssfully routed interrupt. Mark this as
503 * a PCI interrupt.
504 */
505 *pciirq |= (1 << l->irq);
506 }
507 }
508
509 return (rv);
510 }
511
512 int
513 pciintr_irq_release(pciirq)
514 u_int16_t *pciirq;
515 {
516 int i, bit;
517
518 for (i = 0, bit = 1; i < 16; i++, bit <<= 1) {
519 if ((*pciirq & bit) == 0)
520 (void) pciintr_icu_set_trigger(pciintr_icu_tag,
521 pciintr_icu_handle, i, IST_EDGE);
522 }
523
524 return (0);
525 }
526
527 int
528 pciintr_header_fixup(pc)
529 pci_chipset_tag_t pc;
530 {
531 PCIBIOS_PRINTV(("------------------------------------------\n"));
532 PCIBIOS_PRINTV((" device vendor product pin PIRQ IRQ stage\n"));
533 PCIBIOS_PRINTV(("------------------------------------------\n"));
534 pci_device_foreach(pc, pcibios_max_bus, pciintr_do_header_fixup);
535 PCIBIOS_PRINTV(("------------------------------------------\n"));
536
537 return (0);
538 }
539
540 void
541 pciintr_do_header_fixup(pc, tag)
542 pci_chipset_tag_t pc;
543 pcitag_t tag;
544 {
545 struct pcibios_intr_routing *pir;
546 struct pciintr_link_map *l;
547 int pin, irq, link;
548 int bus, device, function;
549 pcireg_t intr, id;
550
551 pci_decompose_tag(pc, tag, &bus, &device, &function);
552 id = pci_conf_read(pc, tag, PCI_ID_REG);
553
554 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
555 pin = PCI_INTERRUPT_PIN(intr);
556 irq = PCI_INTERRUPT_LINE(intr);
557
558 if (pin == 0) {
559 /*
560 * No interrupt used.
561 */
562 return;
563 }
564
565 pir = pciintr_pir_lookup(bus, device);
566 if (pir == NULL || (link = pir->linkmap[pin - 1].link) == 0) {
567 /*
568 * Interrupt not connected; no
569 * need to change.
570 */
571 return;
572 }
573
574 l = pciintr_link_lookup(link);
575 if (l == NULL) {
576 #ifdef PCIINTR_DEBUG
577 /*
578 * No link map entry.
579 * Probably pciintr_icu_getclink() or pciintr_icu_get_intr()
580 * was failed.
581 */
582 printf("pciintr_header_fixup: no entry for link 0x%02x "
583 "(%d:%d:%d:%c)\n", link, bus, device, function,
584 '@' + pin);
585 #endif
586 return;
587 }
588
589 #ifdef PCIBIOSVERBOSE
590 if (pcibiosverbose) {
591 printf("%03d:%02d:%d 0x%04x 0x%04x %c 0x%02x",
592 bus, device, function, PCI_VENDOR(id), PCI_PRODUCT(id),
593 '@' + pin, l->clink);
594 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
595 printf(" -");
596 else
597 printf(" %3d", l->irq);
598 printf(" %d ", l->fixup_stage);
599 }
600 #endif
601
602 /*
603 * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck
604 * with them.
605 */
606 if (irq == 14 || irq == 15) {
607 PCIBIOS_PRINTV((" WARNING: ignored\n"));
608 return;
609 }
610
611 if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
612 /* Appropriate interrupt was not found. */
613 PCIBIOS_PRINTV((" WARNING: missing IRQ\n"));
614 return;
615 }
616
617 if (l->irq == irq) {
618 /* don't have to reconfigure */
619 PCIBIOS_PRINTV((" already assigned\n"));
620 return;
621 }
622
623 if (irq == 0 || irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
624 PCIBIOS_PRINTV((" fixed up\n"));
625 } else {
626 /* routed by BIOS, but inconsistent */
627 #ifdef PCIBIOS_INTR_FIXUP_FORCE
628 /* believe PCI IRQ Routing table */
629 PCIBIOS_PRINTV((" WARNING: overriding irq %d\n", irq));
630 #else
631 /* believe PCI Interrupt Configuration Register (default) */
632 PCIBIOS_PRINTV((" WARNING: preserving irq %d\n", irq));
633 return;
634 #endif
635 }
636
637 intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT);
638 intr |= (l->irq << PCI_INTERRUPT_LINE_SHIFT);
639 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
640 }
641
642 int
643 pci_intr_fixup(pc, iot, pciirq)
644 pci_chipset_tag_t pc;
645 bus_space_tag_t iot;
646 u_int16_t *pciirq;
647 {
648 const struct pciintr_icu_table *piit = NULL;
649 pcitag_t icutag;
650 pcireg_t icuid;
651
652 /*
653 * Attempt to initialize our PCI interrupt router. If
654 * the PIR Table is present in ROM, use the location
655 * specified by the PIR Table, and use the compat ID,
656 * if present. Otherwise, we have to look for the router
657 * ourselves (the PCI-ISA bridge).
658 */
659 if (pcibios_pir_header.signature != 0) {
660 icutag = pci_make_tag(pc, pcibios_pir_header.router_bus,
661 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc),
662 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc));
663 icuid = pcibios_pir_header.compat_router;
664 if (icuid == 0 ||
665 (piit = pciintr_icu_lookup(icuid)) == NULL) {
666 /*
667 * No compat ID, or don't know the compat ID? Read
668 * it from the configuration header.
669 */
670 icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
671 }
672 if (piit == NULL)
673 piit = pciintr_icu_lookup(icuid);
674 } else {
675 int device, maxdevs = pci_bus_maxdevs(pc, 0);
676
677 /*
678 * Search configuration space for a known interrupt
679 * router.
680 */
681 for (device = 0; device < maxdevs; device++) {
682 icutag = pci_make_tag(pc, 0, device, 0);
683 icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
684
685 /* Invalid vendor ID value? */
686 if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID)
687 continue;
688 /* XXX Not invalid, but we've done this ~forever. */
689 if (PCI_VENDOR(icuid) == 0)
690 continue;
691
692 piit = pciintr_icu_lookup(icuid);
693 if (piit != NULL)
694 break;
695 }
696 }
697
698 if (piit == NULL) {
699 printf("pci_intr_fixup: no compatible PCI ICU found\n");
700 return (-1); /* non-fatal */
701 }
702
703 /*
704 * Initialize the PCI ICU.
705 */
706 if ((*piit->piit_init)(pc, iot, icutag, &pciintr_icu_tag,
707 &pciintr_icu_handle) != 0)
708 return (-1); /* non-fatal */
709
710 /*
711 * Initialize the PCI interrupt link map.
712 */
713 if (pciintr_link_init())
714 return (-1); /* non-fatal */
715
716 /*
717 * Fix up the link->IRQ mappings.
718 */
719 if (pciintr_link_fixup() != 0)
720 return (-1); /* non-fatal */
721
722 /*
723 * Now actually program the PCI ICU with the new
724 * routing information.
725 */
726 if (pciintr_link_route(pciirq) != 0)
727 return (1); /* fatal */
728
729 /*
730 * Now that we've routed all of the PIRQs, rewrite the PCI
731 * configuration headers to reflect the new mapping.
732 */
733 if (pciintr_header_fixup(pc) != 0)
734 return (1); /* fatal */
735
736 /*
737 * Free any unused PCI IRQs for ISA devices.
738 */
739 if (pciintr_irq_release(pciirq) != 0)
740 return (-1); /* non-fatal */
741
742 /*
743 * All done!
744 */
745 return (0); /* success! */
746 }
747