pcibios.c revision 1.7
1 /* $NetBSD: pcibios.c,v 1.7 2001/11/15 07:03:35 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1999, by UCHIYAMA Yasushi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. The name of the developer may NOT be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 62 * SUCH DAMAGE. 63 */ 64 65 /* 66 * Interface to the PCI BIOS and PCI Interrupt Routing table. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: pcibios.c,v 1.7 2001/11/15 07:03:35 lukem Exp $"); 71 72 #include "opt_pcibios.h" 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/device.h> 77 #include <sys/malloc.h> 78 79 #include <dev/isa/isareg.h> 80 #include <machine/isa_machdep.h> 81 82 #include <dev/pci/pcireg.h> 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/pcidevs.h> 85 86 #include <i386/pci/pcibios.h> 87 #ifdef PCIBIOS_INTR_FIXUP 88 #include <i386/pci/pci_intr_fixup.h> 89 #endif 90 #ifdef PCIBIOS_BUS_FIXUP 91 #include <i386/pci/pci_bus_fixup.h> 92 #endif 93 #ifdef PCIBIOS_ADDR_FIXUP 94 #include <i386/pci/pci_addr_fixup.h> 95 #endif 96 97 #include <machine/bios32.h> 98 99 #ifdef PCIBIOSVERBOSE 100 int pcibiosverbose = 1; 101 #endif 102 103 int pcibios_present; 104 105 struct pcibios_pir_header pcibios_pir_header; 106 struct pcibios_intr_routing *pcibios_pir_table; 107 int pcibios_pir_table_nentries; 108 int pcibios_max_bus; 109 110 struct bios32_entry pcibios_entry; 111 112 void pcibios_pir_init __P((void)); 113 114 int pcibios_get_status __P((u_int32_t *, u_int32_t *, u_int32_t *, 115 u_int32_t *, u_int32_t *, u_int32_t *, u_int32_t *)); 116 int pcibios_get_intr_routing __P((struct pcibios_intr_routing *, 117 int *, u_int16_t *)); 118 119 int pcibios_return_code __P((u_int16_t, const char *)); 120 121 void pcibios_print_exclirq __P((void)); 122 #ifdef PCIINTR_DEBUG 123 void pcibios_print_pir_table __P((void)); 124 #endif 125 126 #define PCI_IRQ_TABLE_START 0xf0000 127 #define PCI_IRQ_TABLE_END 0xfffff 128 129 void 130 pcibios_init() 131 { 132 struct bios32_entry_info ei; 133 u_int32_t rev_maj, rev_min, mech1, mech2, scmech1, scmech2; 134 135 if (bios32_service(BIOS32_MAKESIG('$', 'P', 'C', 'I'), 136 &pcibios_entry, &ei) == 0) { 137 /* 138 * No PCI BIOS found; will fall back on old 139 * mechanism. 140 */ 141 return; 142 } 143 144 /* 145 * We've located the PCI BIOS service; get some information 146 * about it. 147 */ 148 if (pcibios_get_status(&rev_maj, &rev_min, &mech1, &mech2, 149 &scmech1, &scmech2, &pcibios_max_bus) != PCIBIOS_SUCCESS) { 150 /* 151 * We can't use the PCI BIOS; will fall back on old 152 * mechanism. 153 */ 154 return; 155 } 156 157 printf("PCI BIOS rev. %d.%d found at 0x%lx\n", rev_maj, rev_min >> 4, 158 ei.bei_entry); 159 #ifdef PCIBIOSVERBOSE 160 printf("pcibios: config mechanism %s%s, special cycles %s%s, " 161 "last bus %d\n", 162 mech1 ? "[1]" : "[x]", 163 mech2 ? "[2]" : "[x]", 164 scmech1 ? "[1]" : "[x]", 165 scmech2 ? "[2]" : "[x]", 166 pcibios_max_bus); 167 168 #endif 169 170 /* 171 * The PCI BIOS tells us the config mechanism; fill it in now 172 * so that pci_mode_detect() doesn't have to look for it. 173 */ 174 pci_mode = mech1 ? 1 : 2; 175 176 pcibios_present = 1; 177 178 /* 179 * Find the PCI IRQ Routing table. 180 */ 181 pcibios_pir_init(); 182 183 #ifdef PCIBIOS_INTR_FIXUP 184 if (pcibios_pir_table != NULL) { 185 int rv; 186 u_int16_t pciirq; 187 188 /* 189 * Fixup interrupt routing. 190 */ 191 rv = pci_intr_fixup(NULL, I386_BUS_SPACE_IO, &pciirq); 192 switch (rv) { 193 case -1: 194 /* Non-fatal error. */ 195 printf("Warning: unable to fix up PCI interrupt " 196 "routing\n"); 197 break; 198 199 case 1: 200 /* Fatal error. */ 201 panic("pcibios_init: interrupt fixup failed"); 202 break; 203 } 204 205 /* 206 * XXX Clear `pciirq' from the ISA interrupt allocation 207 * XXX mask. 208 */ 209 } 210 #endif 211 212 #ifdef PCIBIOS_BUS_FIXUP 213 pcibios_max_bus = pci_bus_fixup(NULL, 0); 214 #ifdef PCIBIOSVERBOSE 215 printf("PCI bus #%d is the last bus\n", pcibios_max_bus); 216 #endif 217 #endif 218 219 #ifdef PCIBIOS_ADDR_FIXUP 220 pci_addr_fixup(NULL, pcibios_max_bus); 221 #endif 222 } 223 224 void 225 pcibios_pir_init() 226 { 227 char devinfo[256]; 228 paddr_t pa; 229 caddr_t p; 230 unsigned char cksum; 231 u_int16_t tablesize; 232 u_int8_t rev_maj, rev_min; 233 int i; 234 235 for (pa = PCI_IRQ_TABLE_START; pa < PCI_IRQ_TABLE_END; pa += 16) { 236 p = (caddr_t)ISA_HOLE_VADDR(pa); 237 if (*(int *)p != BIOS32_MAKESIG('$', 'P', 'I', 'R')) 238 continue; 239 240 rev_min = *(p + 4); 241 rev_maj = *(p + 5); 242 tablesize = *(u_int16_t *)(p + 6); 243 244 cksum = 0; 245 for (i = 0; i < tablesize; i++) 246 cksum += *(unsigned char *)(p + i); 247 248 printf("PCI IRQ Routing Table rev. %d.%d found at 0x%lx, " 249 "size %d bytes (%d entries)\n", rev_maj, rev_min, pa, 250 tablesize, (tablesize - 32) / 16); 251 252 if (cksum != 0) { 253 printf("pcibios_pir_init: bad IRQ table checksum\n"); 254 continue; 255 } 256 257 if (tablesize < 32 || (tablesize % 16) != 0) { 258 printf("pcibios_pir_init: bad IRQ table size\n"); 259 continue; 260 } 261 262 if (rev_maj != 1 || rev_min != 0) { 263 printf("pcibios_pir_init: unsupported IRQ table " 264 "version\n"); 265 continue; 266 } 267 268 /* 269 * We can handle this table! Make a copy of it. 270 */ 271 memcpy(&pcibios_pir_header, p, 32); 272 pcibios_pir_table = malloc(tablesize - 32, M_DEVBUF, 273 M_NOWAIT); 274 if (pcibios_pir_table == NULL) { 275 printf("pcibios_pir_init: no memory for $PIR\n"); 276 return; 277 } 278 memcpy(pcibios_pir_table, p + 32, tablesize - 32); 279 pcibios_pir_table_nentries = (tablesize - 32) / 16; 280 281 printf("PCI Interrupt Router at %03d:%02d:%01d", 282 pcibios_pir_header.router_bus, 283 PIR_DEVFUNC_DEVICE(pcibios_pir_header.router_devfunc), 284 PIR_DEVFUNC_FUNCTION(pcibios_pir_header.router_devfunc)); 285 if (pcibios_pir_header.compat_router != 0) { 286 pci_devinfo(pcibios_pir_header.compat_router, 0, 0, 287 devinfo); 288 printf(" (%s)", devinfo); 289 } 290 printf("\n"); 291 pcibios_print_exclirq(); 292 #ifdef PCIINTR_DEBUG 293 pcibios_print_pir_table(); 294 #endif 295 return; 296 } 297 298 /* 299 * If there was no PIR table found, try using the PCI BIOS 300 * Get Interrupt Routing call. 301 * 302 * XXX The interface to this call sucks; just allocate enough 303 * XXX room for 32 entries. 304 */ 305 pcibios_pir_table_nentries = 32; 306 pcibios_pir_table = malloc(pcibios_pir_table_nentries * 307 sizeof(*pcibios_pir_table), M_DEVBUF, M_NOWAIT); 308 if (pcibios_pir_table == NULL) { 309 printf("pcibios_pir_init: no memory for $PIR\n"); 310 return; 311 } 312 if (pcibios_get_intr_routing(pcibios_pir_table, 313 &pcibios_pir_table_nentries, 314 &pcibios_pir_header.exclusive_irq) != PCIBIOS_SUCCESS) { 315 printf("No PCI IRQ Routing information available.\n"); 316 free(pcibios_pir_table, M_DEVBUF); 317 pcibios_pir_table = NULL; 318 pcibios_pir_table_nentries = 0; 319 return; 320 } 321 printf("PCI BIOS has %d Interrupt Routing table entries\n", 322 pcibios_pir_table_nentries); 323 pcibios_print_exclirq(); 324 #ifdef PCIINTR_DEBUG 325 pcibios_print_pir_table(); 326 #endif 327 } 328 329 int 330 pcibios_get_status(rev_maj, rev_min, mech1, mech2, scmech1, scmech2, maxbus) 331 u_int32_t *rev_maj, *rev_min, *mech1, *mech2, *scmech1, *scmech2, 332 *maxbus; 333 { 334 u_int16_t ax, bx, cx; 335 u_int32_t edx; 336 int rv; 337 338 __asm __volatile("lcall (%%edi) ; \ 339 jc 1f ; \ 340 xor %%ah, %%ah ; \ 341 1:" 342 : "=a" (ax), "=b" (bx), "=c" (cx), "=d" (edx) 343 : "0" (0xb101), "D" (&pcibios_entry)); 344 345 rv = pcibios_return_code(ax, "pcibios_get_status"); 346 if (rv != PCIBIOS_SUCCESS) 347 return (rv); 348 349 if (edx != BIOS32_MAKESIG('P', 'C', 'I', ' ')) 350 return (PCIBIOS_SERVICE_NOT_PRESENT); /* XXX */ 351 352 /* 353 * Fill in the various pieces if info we're looking for. 354 */ 355 *mech1 = ax & 1; 356 *mech2 = ax & (1 << 1); 357 *scmech1 = ax & (1 << 4); 358 *scmech2 = ax & (1 << 5); 359 *rev_maj = (bx >> 8) & 0xff; 360 *rev_min = bx & 0xff; 361 *maxbus = cx & 0xff; 362 363 return (PCIBIOS_SUCCESS); 364 } 365 366 int 367 pcibios_get_intr_routing(table, nentries, exclirq) 368 struct pcibios_intr_routing *table; 369 int *nentries; 370 u_int16_t *exclirq; 371 { 372 u_int16_t ax, bx; 373 int rv; 374 struct { 375 u_int16_t size; 376 caddr_t offset; 377 u_int16_t segment; 378 } __attribute__((__packed__)) args; 379 380 args.size = *nentries * sizeof(*table); 381 args.offset = (caddr_t)table; 382 args.segment = GSEL(GDATA_SEL, SEL_KPL); 383 384 memset(table, 0, args.size); 385 386 __asm __volatile("lcall (%%esi) ; \ 387 jc 1f ; \ 388 xor %%ah, %%ah ; \ 389 1: movw %w2, %%ds ; \ 390 movw %w2, %%es" 391 : "=a" (ax), "=b" (bx) 392 : "r" GSEL(GDATA_SEL, SEL_KPL), "0" (0xb10e), "1" (0), 393 "D" (&args), "S" (&pcibios_entry)); 394 395 rv = pcibios_return_code(ax, "pcibios_get_intr_routing"); 396 if (rv != PCIBIOS_SUCCESS) 397 return (rv); 398 399 *nentries = args.size / sizeof(*table); 400 *exclirq = bx; 401 402 return (PCIBIOS_SUCCESS); 403 } 404 405 int 406 pcibios_return_code(ax, func) 407 u_int16_t ax; 408 const char *func; 409 { 410 const char *errstr; 411 int rv = ax >> 8; 412 413 switch (rv) { 414 case PCIBIOS_SUCCESS: 415 return (PCIBIOS_SUCCESS); 416 417 case PCIBIOS_SERVICE_NOT_PRESENT: 418 errstr = "service not present"; 419 break; 420 421 case PCIBIOS_FUNCTION_NOT_SUPPORTED: 422 errstr = "function not supported"; 423 break; 424 425 case PCIBIOS_BAD_VENDOR_ID: 426 errstr = "bad vendor ID"; 427 break; 428 429 case PCIBIOS_DEVICE_NOT_FOUND: 430 errstr = "device not found"; 431 break; 432 433 case PCIBIOS_BAD_REGISTER_NUMBER: 434 errstr = "bad register number"; 435 break; 436 437 case PCIBIOS_SET_FAILED: 438 errstr = "set failed"; 439 break; 440 441 case PCIBIOS_BUFFER_TOO_SMALL: 442 errstr = "buffer too small"; 443 break; 444 445 default: 446 printf("%s: unknown return code 0x%x\n", func, rv); 447 return (rv); 448 } 449 450 printf("%s: %s\n", func, errstr); 451 return (rv); 452 } 453 454 void 455 pcibios_print_exclirq() 456 { 457 int i; 458 459 if (pcibios_pir_header.exclusive_irq) { 460 printf("PCI Exclusive IRQs:"); 461 for (i = 0; i < 16; i++) { 462 if (pcibios_pir_header.exclusive_irq & (1 << i)) 463 printf(" %d", i); 464 } 465 printf("\n"); 466 } 467 } 468 469 #ifdef PCIINTR_DEBUG 470 void 471 pcibios_print_pir_table() 472 { 473 int i, j; 474 475 for (i = 0; i < pcibios_pir_table_nentries; i++) { 476 printf("PIR Entry %d:\n", i); 477 printf("\tBus: %d Device: %d\n", 478 pcibios_pir_table[i].bus, 479 PIR_DEVFUNC_DEVICE(pcibios_pir_table[i].device)); 480 for (j = 0; j < 4; j++) { 481 printf("\t\tINT%c: link 0x%02x bitmap 0x%04x\n", 482 'A' + j, 483 pcibios_pir_table[i].linkmap[j].link, 484 pcibios_pir_table[i].linkmap[j].bitmap); 485 } 486 } 487 } 488 #endif 489 490 void 491 pci_device_foreach(pc, maxbus, func, context) 492 pci_chipset_tag_t pc; 493 int maxbus; 494 void (*func) __P((pci_chipset_tag_t, pcitag_t, void *)); 495 void *context; 496 { 497 pci_device_foreach_min(pc, 0, maxbus, func, context); 498 } 499 500 void 501 pci_device_foreach_min(pc, minbus, maxbus, func, context) 502 pci_chipset_tag_t pc; 503 int minbus; 504 int maxbus; 505 void (*func) __P((pci_chipset_tag_t, pcitag_t, void *)); 506 void *context; 507 { 508 const struct pci_quirkdata *qd; 509 int bus, device, function, maxdevs, nfuncs; 510 pcireg_t id, bhlcr; 511 pcitag_t tag; 512 513 for (bus = minbus; bus <= maxbus; bus++) { 514 maxdevs = pci_bus_maxdevs(pc, bus); 515 for (device = 0; device < maxdevs; device++) { 516 tag = pci_make_tag(pc, bus, device, 0); 517 id = pci_conf_read(pc, tag, PCI_ID_REG); 518 519 /* Invalid vendor ID value? */ 520 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 521 continue; 522 /* XXX Not invalid, but we've done this ~forever. */ 523 if (PCI_VENDOR(id) == 0) 524 continue; 525 526 qd = pci_lookup_quirkdata(PCI_VENDOR(id), 527 PCI_PRODUCT(id)); 528 529 bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG); 530 if (PCI_HDRTYPE_MULTIFN(bhlcr) || 531 (qd != NULL && 532 (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0)) 533 nfuncs = 8; 534 else 535 nfuncs = 1; 536 537 for (function = 0; function < nfuncs; function++) { 538 tag = pci_make_tag(pc, bus, device, function); 539 id = pci_conf_read(pc, tag, PCI_ID_REG); 540 541 /* Invalid vendor ID value? */ 542 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 543 continue; 544 /* 545 * XXX Not invalid, but we've done this 546 * ~forever. 547 */ 548 if (PCI_VENDOR(id) == 0) 549 continue; 550 (*func)(pc, tag, context); 551 } 552 } 553 } 554 } 555
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