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piix.c revision 1.2.8.1
      1 /*	$NetBSD: piix.c,v 1.2.8.1 2002/01/10 19:45:05 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1999, by UCHIYAMA Yasushi
     42  * All rights reserved.
     43  *
     44  * Redistribution and use in source and binary forms, with or without
     45  * modification, are permitted provided that the following conditions
     46  * are met:
     47  * 1. Redistributions of source code must retain the above copyright
     48  *    notice, this list of conditions and the following disclaimer.
     49  * 2. The name of the developer may NOT be used to endorse or promote products
     50  *    derived from this software without specific prior written permission.
     51  *
     52  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     62  * SUCH DAMAGE.
     63  */
     64 
     65 /*
     66  * Support for the Intel PIIX PCI-ISA bridge interrupt controller.
     67  */
     68 
     69 #include <sys/cdefs.h>
     70 __KERNEL_RCSID(0, "$NetBSD: piix.c,v 1.2.8.1 2002/01/10 19:45:05 thorpej Exp $");
     71 
     72 #include <sys/param.h>
     73 #include <sys/systm.h>
     74 #include <sys/device.h>
     75 #include <sys/malloc.h>
     76 
     77 #include <machine/intr.h>
     78 #include <machine/bus.h>
     79 
     80 #include <dev/pci/pcivar.h>
     81 #include <dev/pci/pcireg.h>
     82 #include <dev/pci/pcidevs.h>
     83 
     84 #include <i386/pci/pci_intr_fixup.h>
     85 #include <i386/pci/piixreg.h>
     86 #include <i386/pci/piixvar.h>
     87 
     88 #ifdef PIIX_DEBUG
     89 #define	DPRINTF(arg) printf arg
     90 #else
     91 #define	DPRINTF(arg)
     92 #endif
     93 
     94 int	piix_getclink __P((pciintr_icu_handle_t, int, int *));
     95 int	piix_get_intr __P((pciintr_icu_handle_t, int, int *));
     96 int	piix_set_intr __P((pciintr_icu_handle_t, int, int));
     97 #ifdef PIIX_DEBUG
     98 void	piix_pir_dump __P((struct piix_handle *));
     99 #endif
    100 
    101 const struct pciintr_icu piix_pci_icu = {
    102 	piix_getclink,
    103 	piix_get_intr,
    104 	piix_set_intr,
    105 	piix_get_trigger,
    106 	piix_set_trigger,
    107 };
    108 
    109 int
    110 piix_init(pc, iot, tag, ptagp, phandp)
    111 	pci_chipset_tag_t pc;
    112 	bus_space_tag_t iot;
    113 	pcitag_t tag;
    114 	pciintr_icu_tag_t *ptagp;
    115 	pciintr_icu_handle_t *phandp;
    116 {
    117 	struct piix_handle *ph;
    118 
    119 	ph = malloc(sizeof(*ph), M_DEVBUF, M_NOWAIT);
    120 	if (ph == NULL)
    121 		return (1);
    122 
    123 	ph->ph_iot = iot;
    124 	ph->ph_pc = pc;
    125 	ph->ph_tag = tag;
    126 
    127 	if (bus_space_map(iot, PIIX_REG_ELCR, PIIX_REG_ELCR_SIZE, 0,
    128 	    &ph->ph_elcr_ioh) != 0) {
    129 		free(ph, M_DEVBUF);
    130 		return (1);
    131 	}
    132 
    133 #ifdef PIIX_DEBUG
    134 	piix_pir_dump(ph);
    135 #endif
    136 	*ptagp = &piix_pci_icu;
    137 	*phandp = ph;
    138 	return (0);
    139 }
    140 
    141 int
    142 piix_getclink(v, link, clinkp)
    143 	pciintr_icu_handle_t v;
    144 	int link, *clinkp;
    145 {
    146 	DPRINTF(("PIIX link value 0x%x: ", link));
    147 
    148 	/* Pattern 1: simple. */
    149 	if (PIIX_LEGAL_LINK(link - 1)) {
    150 		*clinkp = link - 1;
    151 		DPRINTF(("PIRQ %d (simple)\n", *clinkp));
    152 		return (0);
    153 	}
    154 
    155 	/* Pattern 2: configuration register offset */
    156 	if (link >= 0x60 && link <= 0x63) {
    157 		*clinkp = link - 0x60;
    158 		DPRINTF(("PIRQ %d (register offset)\n", *clinkp));
    159 		return (0);
    160 	}
    161 
    162 	DPRINTF(("bogus IRQ selection source\n"));
    163 	return (1);
    164 }
    165 
    166 int
    167 piix_get_intr(v, clink, irqp)
    168 	pciintr_icu_handle_t v;
    169 	int clink, *irqp;
    170 {
    171 	struct piix_handle *ph = v;
    172 	int shift;
    173 	pcireg_t reg;
    174 
    175 	if (PIIX_LEGAL_LINK(clink) == 0)
    176 		return (1);
    177 
    178 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, PIIX_CFG_PIRQ);
    179 	shift = clink << 3;
    180 	if ((reg >> shift) & PIIX_CFG_PIRQ_NONE)
    181 		*irqp = I386_PCI_INTERRUPT_LINE_NO_CONNECTION;
    182 	else
    183 		*irqp = PIIX_PIRQ(reg, clink);
    184 
    185 	return (0);
    186 }
    187 
    188 int
    189 piix_set_intr(v, clink, irq)
    190 	pciintr_icu_handle_t v;
    191 	int clink, irq;
    192 {
    193 	struct piix_handle *ph = v;
    194 	int shift;
    195 	pcireg_t reg;
    196 
    197 	if (PIIX_LEGAL_LINK(clink) == 0 || PIIX_LEGAL_IRQ(irq) == 0)
    198 		return (1);
    199 
    200 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, PIIX_CFG_PIRQ);
    201 	shift = clink << 3;
    202 	reg &= ~((PIIX_CFG_PIRQ_NONE | PIIX_CFG_PIRQ_MASK) << shift);
    203 	reg |= irq << shift;
    204 	pci_conf_write(ph->ph_pc, ph->ph_tag, PIIX_CFG_PIRQ, reg);
    205 
    206 	return (0);
    207 }
    208 
    209 int
    210 piix_get_trigger(v, irq, triggerp)
    211 	pciintr_icu_handle_t v;
    212 	int irq, *triggerp;
    213 {
    214 	struct piix_handle *ph = v;
    215 	int off, bit;
    216 	u_int8_t elcr;
    217 
    218 	if (PIIX_LEGAL_IRQ(irq) == 0)
    219 		return (1);
    220 
    221 	off = (irq > 7) ? 1 : 0;
    222 	bit = irq & 7;
    223 
    224 	elcr = bus_space_read_1(ph->ph_iot, ph->ph_elcr_ioh, off);
    225 	if (elcr & (1 << bit))
    226 		*triggerp = IST_LEVEL;
    227 	else
    228 		*triggerp = IST_EDGE;
    229 
    230 	return (0);
    231 }
    232 
    233 int
    234 piix_set_trigger(v, irq, trigger)
    235 	pciintr_icu_handle_t v;
    236 	int irq, trigger;
    237 {
    238 	struct piix_handle *ph = v;
    239 	int off, bit;
    240 	u_int8_t elcr;
    241 
    242 	if (PIIX_LEGAL_IRQ(irq) == 0)
    243 		return (1);
    244 
    245 	off = (irq > 7) ? 1 : 0;
    246 	bit = irq & 7;
    247 
    248 	elcr = bus_space_read_1(ph->ph_iot, ph->ph_elcr_ioh, off);
    249 	if (trigger == IST_LEVEL)
    250 		elcr |= (1 << bit);
    251 	else
    252 		elcr &= ~(1 << bit);
    253 	bus_space_write_1(ph->ph_iot, ph->ph_elcr_ioh, off, elcr);
    254 
    255 	return (0);
    256 }
    257 
    258 #ifdef PIIX_DEBUG
    259 void
    260 piix_pir_dump(ph)
    261 	struct piix_handle *ph;
    262 {
    263 	int i, irq;
    264 	pcireg_t irqs = pci_conf_read(ph->ph_pc, ph->ph_tag, PIIX_CFG_PIRQ);
    265 	u_int8_t elcr[2];
    266 
    267 	elcr[0] = bus_space_read_1(ph->ph_iot, ph->ph_elcr_ioh, 0);
    268 	elcr[1] = bus_space_read_1(ph->ph_iot, ph->ph_elcr_ioh, 1);
    269 
    270 	for (i = 0; i < 4; i++) {
    271 		irq = PIIX_PIRQ(irqs, i);
    272 		if (irq & PIIX_CFG_PIRQ_NONE)
    273 			printf("PIIX PIRQ %d: irq none (0x%x)\n", i, irq);
    274 		else
    275 			printf("PIIX PIRQ %d: irq %d\n", i, irq);
    276 	}
    277 	printf("PIIX irq:");
    278 	for (i = 0; i < 16; i++)
    279 		printf(" %2d", i);
    280 	printf("\n");
    281 	printf(" trigger:");
    282 	for (i = 0; i < 16; i++)
    283 		printf("  %c", (elcr[(i & 8) ? 1 : 0] & (1 << (i & 7))) ?
    284 		       'L' : 'E');
    285 	printf("\n");
    286 }
    287 #endif /* PIIX_DEBUG */
    288