via82c586.c revision 1.10
1 /* $NetBSD: via82c586.c,v 1.10 2006/11/16 01:32:39 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1999, by UCHIYAMA Yasushi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. The name of the developer may NOT be used to endorse or promote products 50 * derived from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 62 * SUCH DAMAGE. 63 */ 64 65 /* 66 * Support for the VIA 82c586 PCI-ISA bridge interrupt controller. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: via82c586.c,v 1.10 2006/11/16 01:32:39 christos Exp $"); 71 72 #include <sys/param.h> 73 #include <sys/systm.h> 74 #include <sys/device.h> 75 76 #include <machine/intr.h> 77 #include <machine/bus.h> 78 79 #include <dev/pci/pcivar.h> 80 #include <dev/pci/pcireg.h> 81 #include <dev/pci/pcidevs.h> 82 83 #include <i386/pci/pci_intr_fixup.h> 84 #include <i386/pci/via82c586reg.h> 85 #include <i386/pci/piixvar.h> 86 87 int via82c586_getclink(pciintr_icu_handle_t, int, int *); 88 int via82c586_get_intr(pciintr_icu_handle_t, int, int *); 89 int via82c586_set_intr(pciintr_icu_handle_t, int, int); 90 int via82c586_get_trigger(pciintr_icu_handle_t, int, int *); 91 int via82c586_set_trigger(pciintr_icu_handle_t, int, int); 92 93 const struct pciintr_icu via82c586_pci_icu = { 94 via82c586_getclink, 95 via82c586_get_intr, 96 via82c586_set_intr, 97 via82c586_get_trigger, 98 via82c586_set_trigger, 99 }; 100 101 const int vp3_cfg_trigger_shift[] = { 102 VP3_CFG_TRIGGER_SHIFT_PIRQA, 103 VP3_CFG_TRIGGER_SHIFT_PIRQB, 104 VP3_CFG_TRIGGER_SHIFT_PIRQC, 105 VP3_CFG_TRIGGER_SHIFT_PIRQD, 106 }; 107 108 #define VP3_TRIGGER(reg, pirq) (((reg) >> vp3_cfg_trigger_shift[(pirq)]) & \ 109 VP3_CFG_TRIGGER_MASK) 110 111 const int vp3_cfg_intr_shift[] = { 112 VP3_CFG_INTR_SHIFT_PIRQA, 113 VP3_CFG_INTR_SHIFT_PIRQB, 114 VP3_CFG_INTR_SHIFT_PIRQC, 115 VP3_CFG_INTR_SHIFT_PIRQD, 116 VP3_CFG_INTR_SHIFT_PIRQ0, 117 VP3_CFG_INTR_SHIFT_PIRQ1, 118 VP3_CFG_INTR_SHIFT_PIRQ2, 119 }; 120 121 #define VP3_PIRQ(reg, pirq) (((reg) >> vp3_cfg_intr_shift[(pirq)]) & \ 122 VP3_CFG_INTR_MASK) 123 124 int 125 via82c586_init(pci_chipset_tag_t pc, bus_space_tag_t iot, pcitag_t tag, 126 pciintr_icu_tag_t *ptagp, pciintr_icu_handle_t *phandp) 127 { 128 pcireg_t reg; 129 130 if (piix_init(pc, iot, tag, ptagp, phandp) == 0) { 131 *ptagp = &via82c586_pci_icu; 132 133 /* 134 * Enable EISA ELCR. 135 */ 136 reg = pci_conf_read(pc, tag, VP3_CFG_KBDMISCCTRL12_REG); 137 reg |= VP3_CFG_MISCCTRL2_EISA4D04D1PORT_ENABLE << 138 VP3_CFG_MISCCTRL2_SHIFT; 139 pci_conf_write(pc, tag, VP3_CFG_KBDMISCCTRL12_REG, reg); 140 141 return (0); 142 } 143 144 return (1); 145 } 146 147 int 148 via82c586_getclink(pciintr_icu_handle_t v, int link, int *clinkp) 149 { 150 151 if (VP3_LEGAL_LINK(link - 1)) { 152 *clinkp = link - 1; 153 return (0); 154 } 155 156 return (1); 157 } 158 159 int 160 via82c586_get_intr(pciintr_icu_handle_t v, int clink, int *irqp) 161 { 162 struct piix_handle *ph = v; 163 pcireg_t reg; 164 int val; 165 166 if (VP3_LEGAL_LINK(clink) == 0) 167 return (1); 168 169 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VP3_CFG_PIRQ_REG); 170 val = VP3_PIRQ(reg, clink); 171 *irqp = (val == VP3_PIRQ_NONE) ? 172 X86_PCI_INTERRUPT_LINE_NO_CONNECTION : val; 173 174 return (0); 175 } 176 177 int 178 via82c586_set_intr(pciintr_icu_handle_t v, int clink, int irq) 179 { 180 struct piix_handle *ph = v; 181 int shift, val; 182 pcireg_t reg; 183 184 if (VP3_LEGAL_LINK(clink) == 0 || VP3_LEGAL_IRQ(irq) == 0) 185 return (1); 186 187 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VP3_CFG_PIRQ_REG); 188 via82c586_get_intr(v, clink, &val); 189 shift = vp3_cfg_intr_shift[clink]; 190 reg &= ~(VP3_CFG_INTR_MASK << shift); 191 reg |= (irq << shift); 192 pci_conf_write(ph->ph_pc, ph->ph_tag, VP3_CFG_PIRQ_REG, reg); 193 if (via82c586_get_intr(v, clink, &val) != 0 || 194 val != irq) 195 return (1); 196 197 return (0); 198 } 199 200 int 201 via82c586_get_trigger(pciintr_icu_handle_t v, int irq, int *triggerp) 202 { 203 struct piix_handle *ph = v; 204 int i, error, check_consistency, pciirq, pcitrigger = IST_NONE; 205 pcireg_t reg; 206 207 if (VP3_LEGAL_IRQ(irq) == 0) 208 return (1); 209 210 check_consistency = 0; 211 for (i = 0; i <= 3; i++) { 212 via82c586_get_intr(v, i, &pciirq); 213 if (pciirq == irq) { 214 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, 215 VP3_CFG_PIRQ_REG); 216 if (VP3_TRIGGER(reg, i) == VP3_CFG_TRIGGER_EDGE) 217 pcitrigger = IST_EDGE; 218 else 219 pcitrigger = IST_LEVEL; 220 check_consistency = 1; 221 break; 222 } 223 } 224 225 error = piix_get_trigger(v, irq, triggerp); 226 if (error == 0 && check_consistency && pcitrigger != *triggerp) 227 return (1); 228 return (error); 229 } 230 231 int 232 via82c586_set_trigger(pciintr_icu_handle_t v, int irq, int trigger) 233 { 234 struct piix_handle *ph = v; 235 int i, pciirq, shift, testtrig; 236 pcireg_t reg; 237 238 if (VP3_LEGAL_IRQ(irq) == 0) 239 return (1); 240 241 for (i = 0; i <= 3; i++) { 242 via82c586_get_intr(v, i, &pciirq); 243 if (pciirq == irq) { 244 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, 245 VP3_CFG_PIRQ_REG); 246 shift = vp3_cfg_trigger_shift[i]; 247 if (trigger == IST_LEVEL) 248 reg &= ~(VP3_CFG_TRIGGER_MASK << shift); 249 else 250 reg |= (VP3_CFG_TRIGGER_EDGE << shift); 251 pci_conf_write(ph->ph_pc, ph->ph_tag, 252 VP3_CFG_PIRQ_REG, reg); 253 break; 254 } 255 } 256 257 if (piix_set_trigger(v, irq, trigger) != 0 || 258 via82c586_get_trigger(v, irq, &testtrig) != 0 || 259 testtrig != trigger) 260 return (1); 261 262 return (0); 263 } 264
Indexes created Tue Sep 30 07:10:03 GMT 2025