pciide_pnpbios.c revision 1.10
1 /* $NetBSD: pciide_pnpbios.c,v 1.10 2003/10/08 11:10:18 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1999 Soren S. Jorvang. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 /* 29 * Handle the weird "almost PCI" IDE on Toshiba Porteges. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: pciide_pnpbios.c,v 1.10 2003/10/08 11:10:18 bouyer Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 #include <sys/malloc.h> 39 40 #include <machine/bus.h> 41 42 #include <dev/isa/isavar.h> 43 #include <dev/isa/isadmavar.h> 44 45 #include <i386/pnpbios/pnpbiosvar.h> 46 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcidevs.h> 50 51 #include <dev/pci/pciidereg.h> 52 #include <dev/pci/pciidevar.h> 53 54 static int pciide_pnpbios_match(struct device *, struct cfdata *, void *); 55 static void pciide_pnpbios_attach(struct device *, struct device *, void *); 56 void pciide_pnpbios_setup_channel(struct channel_softc *); 57 58 extern void pciide_channel_dma_setup(struct pciide_channel *); 59 extern int pciide_dma_init(void *, int, int, void *, size_t, int); 60 extern void pciide_dma_start(void *, int, int); 61 extern int pciide_dma_finish(void *, int, int, int); 62 extern int pciide_compat_intr (void *); 63 64 CFATTACH_DECL(pciide_pnpbios, sizeof(struct pciide_softc), 65 pciide_pnpbios_match, pciide_pnpbios_attach, NULL, NULL); 66 67 int 68 pciide_pnpbios_match(parent, match, aux) 69 struct device *parent; 70 struct cfdata *match; 71 void *aux; 72 { 73 struct pnpbiosdev_attach_args *aa = aux; 74 75 if (strcmp(aa->idstr, "TOS7300") == 0) 76 return 1; 77 78 return 0; 79 } 80 81 void 82 pciide_pnpbios_attach(parent, self, aux) 83 struct device *parent, *self; 84 void *aux; 85 { 86 struct pciide_softc *sc = (void *)self; 87 struct pnpbiosdev_attach_args *aa = aux; 88 struct pciide_channel *cp; 89 struct channel_softc *wdc_cp; 90 bus_space_tag_t compat_iot; 91 bus_space_handle_t cmd_ioh, ctl_ioh; 92 93 printf("\n"); 94 pnpbios_print_devres(self, aa); 95 96 printf("%s: Toshiba Extended IDE Controller\n", self->dv_xname); 97 98 if (pnpbios_io_map(aa->pbt, aa->resc, 2, &sc->sc_dma_iot, 99 &sc->sc_dma_ioh) != 0) { 100 printf("%s: unable to map DMA registers\n", self->dv_xname); 101 return; 102 } 103 if (pnpbios_io_map(aa->pbt, aa->resc, 0, &compat_iot, 104 &cmd_ioh) != 0) { 105 printf("%s: unable to map command registers\n", self->dv_xname); 106 return; 107 } 108 if (pnpbios_io_map(aa->pbt, aa->resc, 1, &compat_iot, 109 &ctl_ioh) != 0) { 110 printf("%s: unable to map control register\n", self->dv_xname); 111 return; 112 } 113 114 sc->sc_dmat = &pci_bus_dma_tag; 115 116 sc->sc_dma_ok = 1; 117 sc->sc_wdcdev.dma_arg = sc; 118 sc->sc_wdcdev.dma_init = pciide_dma_init; 119 sc->sc_wdcdev.dma_start = pciide_dma_start; 120 sc->sc_wdcdev.dma_finish = pciide_dma_finish; 121 sc->sc_wdcdev.channels = sc->wdc_chanarray; 122 sc->sc_wdcdev.nchannels = 1; 123 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32; 124 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA; 125 #if 0 /* XXX */ 126 sc->sc_wdcdev.cap |= WDC_CAPABILITY_MODE; 127 #endif 128 sc->sc_wdcdev.PIO_cap = 4; 129 sc->sc_wdcdev.DMA_cap = 2; /* XXX */ 130 sc->sc_wdcdev.UDMA_cap = 2; /* XXX */ 131 sc->sc_wdcdev.set_modes = pciide_pnpbios_setup_channel; 132 133 cp = &sc->pciide_channels[0]; 134 sc->wdc_chanarray[0] = &cp->wdc_channel; 135 cp->wdc_channel.channel = 0; 136 cp->wdc_channel.wdc = &sc->sc_wdcdev; 137 cp->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue), 138 M_DEVBUF, M_NOWAIT); 139 if (cp->wdc_channel.ch_queue == NULL) { 140 printf("%s: unable to allocate memory for command queue\n", 141 self->dv_xname); 142 return; 143 } 144 145 wdc_cp = &cp->wdc_channel; 146 wdc_cp->cmd_iot = compat_iot; 147 wdc_cp->cmd_ioh = cmd_ioh; 148 wdc_cp->ctl_iot = wdc_cp->data32iot = compat_iot; 149 wdc_cp->ctl_ioh = wdc_cp->data32ioh = ctl_ioh; 150 151 cp->compat = 1; 152 153 cp->ih = pnpbios_intr_establish(aa->pbt, aa->resc, 0, IPL_BIO, 154 pciide_compat_intr, cp); 155 156 wdcattach(wdc_cp); 157 } 158 159 void 160 pciide_pnpbios_setup_channel(chp) 161 struct channel_softc *chp; 162 { 163 struct pciide_channel *cp = (struct pciide_channel *)chp; 164 165 pciide_channel_dma_setup(cp); 166 } 167
Indexes created Tue Oct 14 15:09:51 GMT 2025