pciide_pnpbios.c revision 1.14
1 /* $NetBSD: pciide_pnpbios.c,v 1.14 2004/01/03 22:56:53 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1999 Soren S. Jorvang. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 /* 29 * Handle the weird "almost PCI" IDE on Toshiba Porteges. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: pciide_pnpbios.c,v 1.14 2004/01/03 22:56:53 thorpej Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 #include <sys/malloc.h> 39 40 #include <machine/bus.h> 41 42 #include <dev/ic/wdcreg.h> 43 #include <dev/isa/isavar.h> 44 #include <dev/isa/isadmavar.h> 45 46 #include <i386/pnpbios/pnpbiosvar.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pcidevs.h> 51 52 #include <dev/pci/pciidereg.h> 53 #include <dev/pci/pciidevar.h> 54 55 static int pciide_pnpbios_match(struct device *, struct cfdata *, void *); 56 static void pciide_pnpbios_attach(struct device *, struct device *, void *); 57 void pciide_pnpbios_setup_channel(struct wdc_channel *); 58 59 extern void pciide_channel_dma_setup(struct pciide_channel *); 60 extern int pciide_dma_init(void *, int, int, void *, size_t, int); 61 extern void pciide_dma_start(void *, int, int); 62 extern int pciide_dma_finish(void *, int, int, int); 63 extern int pciide_compat_intr (void *); 64 65 CFATTACH_DECL(pciide_pnpbios, sizeof(struct pciide_softc), 66 pciide_pnpbios_match, pciide_pnpbios_attach, NULL, NULL); 67 68 int 69 pciide_pnpbios_match(parent, match, aux) 70 struct device *parent; 71 struct cfdata *match; 72 void *aux; 73 { 74 struct pnpbiosdev_attach_args *aa = aux; 75 76 if (strcmp(aa->idstr, "TOS7300") == 0) 77 return 1; 78 79 return 0; 80 } 81 82 void 83 pciide_pnpbios_attach(parent, self, aux) 84 struct device *parent, *self; 85 void *aux; 86 { 87 struct pciide_softc *sc = (void *)self; 88 struct pnpbiosdev_attach_args *aa = aux; 89 struct pciide_channel *cp; 90 struct wdc_channel *wdc_cp; 91 bus_space_tag_t compat_iot; 92 bus_space_handle_t cmd_baseioh, ctl_ioh; 93 int i; 94 95 printf("\n"); 96 pnpbios_print_devres(self, aa); 97 98 printf("%s: Toshiba Extended IDE Controller\n", self->dv_xname); 99 100 if (pnpbios_io_map(aa->pbt, aa->resc, 2, &sc->sc_dma_iot, 101 &sc->sc_dma_ioh) != 0) { 102 printf("%s: unable to map DMA registers\n", self->dv_xname); 103 return; 104 } 105 if (pnpbios_io_map(aa->pbt, aa->resc, 0, &compat_iot, 106 &cmd_baseioh) != 0) { 107 printf("%s: unable to map command registers\n", self->dv_xname); 108 return; 109 } 110 if (pnpbios_io_map(aa->pbt, aa->resc, 1, &compat_iot, 111 &ctl_ioh) != 0) { 112 printf("%s: unable to map control register\n", self->dv_xname); 113 return; 114 } 115 116 sc->sc_dmat = &pci_bus_dma_tag; 117 118 sc->sc_dma_ok = 1; 119 sc->sc_wdcdev.dma_arg = sc; 120 sc->sc_wdcdev.dma_init = pciide_dma_init; 121 sc->sc_wdcdev.dma_start = pciide_dma_start; 122 sc->sc_wdcdev.dma_finish = pciide_dma_finish; 123 sc->sc_wdcdev.channels = sc->wdc_chanarray; 124 sc->sc_wdcdev.nchannels = 1; 125 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32; 126 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA; 127 #if 0 /* XXX */ 128 sc->sc_wdcdev.cap |= WDC_CAPABILITY_MODE; 129 #endif 130 sc->sc_wdcdev.PIO_cap = 4; 131 sc->sc_wdcdev.DMA_cap = 2; /* XXX */ 132 sc->sc_wdcdev.UDMA_cap = 2; /* XXX */ 133 sc->sc_wdcdev.set_modes = pciide_pnpbios_setup_channel; 134 135 cp = &sc->pciide_channels[0]; 136 sc->wdc_chanarray[0] = &cp->wdc_channel; 137 cp->wdc_channel.ch_channel = 0; 138 cp->wdc_channel.ch_wdc = &sc->sc_wdcdev; 139 cp->wdc_channel.ch_queue = malloc(sizeof(struct ata_queue), 140 M_DEVBUF, M_NOWAIT); 141 if (cp->wdc_channel.ch_queue == NULL) { 142 printf("%s: unable to allocate memory for command queue\n", 143 self->dv_xname); 144 return; 145 } 146 147 wdc_cp = &cp->wdc_channel; 148 wdc_cp->cmd_iot = compat_iot; 149 wdc_cp->cmd_baseioh = cmd_baseioh; 150 151 for (i = 0; i < WDC_NREG; i++) { 152 if (bus_space_subregion(wdc_cp->cmd_iot, wdc_cp->cmd_baseioh, i, 153 i == 0 ? 4 : 1, &wdc_cp->cmd_iohs[i]) != 0) { 154 printf("%s: unable to subregion control register\n", 155 self->dv_xname); 156 return; 157 } 158 } 159 160 wdc_cp->ctl_iot = wdc_cp->data32iot = compat_iot; 161 wdc_cp->ctl_ioh = wdc_cp->data32ioh = ctl_ioh; 162 163 cp->compat = 1; 164 165 cp->ih = pnpbios_intr_establish(aa->pbt, aa->resc, 0, IPL_BIO, 166 pciide_compat_intr, cp); 167 168 wdcattach(wdc_cp); 169 } 170 171 void 172 pciide_pnpbios_setup_channel(chp) 173 struct wdc_channel *chp; 174 { 175 struct pciide_channel *cp = (struct pciide_channel *)chp; 176 177 pciide_channel_dma_setup(cp); 178 } 179
Indexes created Mon Oct 13 21:09:55 GMT 2025