disasm_extract.c revision 1.2.30.1 1 1.2.30.1 skrll /* $NetBSD: disasm_extract.c,v 1.2.30.1 2016/10/05 20:55:29 skrll Exp $ */
2 1.1 cherry
3 1.1 cherry /*-
4 1.2.30.1 skrll * Copyright (c) 2000-2006 Marcel Moolenaar
5 1.1 cherry * All rights reserved.
6 1.1 cherry *
7 1.1 cherry * Redistribution and use in source and binary forms, with or without
8 1.1 cherry * modification, are permitted provided that the following conditions
9 1.1 cherry * are met:
10 1.1 cherry *
11 1.1 cherry * 1. Redistributions of source code must retain the above copyright
12 1.1 cherry * notice, this list of conditions and the following disclaimer.
13 1.1 cherry * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 cherry * notice, this list of conditions and the following disclaimer in the
15 1.1 cherry * documentation and/or other materials provided with the distribution.
16 1.1 cherry *
17 1.1 cherry * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 cherry * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 cherry * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 cherry * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 cherry * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 cherry * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 cherry * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 cherry * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 cherry * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 1.1 cherry * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 cherry */
28 1.1 cherry
29 1.1 cherry #include <sys/cdefs.h>
30 1.2.30.1 skrll /* __FBSDID("$FreeBSD: releng/10.1/sys/ia64/disasm/disasm_extract.c 159916 2006-06-24 19:21:11Z marcel $"); */
31 1.1 cherry
32 1.1 cherry #include <sys/param.h>
33 1.1 cherry #include <sys/systm.h>
34 1.1 cherry
35 1.1 cherry #include <ia64/disasm/disasm_int.h>
36 1.1 cherry #include <ia64/disasm/disasm.h>
37 1.1 cherry
38 1.1 cherry #define FRAG(o,l) ((int)((o << 8) | (l & 0xff)))
39 1.1 cherry #define FRAG_OFS(f) (f >> 8)
40 1.1 cherry #define FRAG_LEN(f) (f & 0xff)
41 1.1 cherry
42 1.1 cherry /*
43 1.1 cherry * Support functions.
44 1.1 cherry */
45 1.1 cherry static void
46 1.1 cherry asm_cmpltr_add(struct asm_inst *i, enum asm_cmpltr_class c,
47 1.1 cherry enum asm_cmpltr_type t)
48 1.1 cherry {
49 1.1 cherry
50 1.1 cherry i->i_cmpltr[i->i_ncmpltrs].c_class = c;
51 1.1 cherry i->i_cmpltr[i->i_ncmpltrs].c_type = t;
52 1.1 cherry i->i_ncmpltrs++;
53 1.1 cherry KASSERT(i->i_ncmpltrs < 6);
54 1.1 cherry }
55 1.1 cherry
56 1.1 cherry static void
57 1.1 cherry asm_hint(struct asm_inst *i, enum asm_cmpltr_class c)
58 1.1 cherry {
59 1.1 cherry
60 1.1 cherry switch (FIELD(i->i_bits, 28, 2)) { /* hint */
61 1.1 cherry case 0:
62 1.1 cherry asm_cmpltr_add(i, c, ASM_CT_NONE);
63 1.1 cherry break;
64 1.1 cherry case 1:
65 1.1 cherry asm_cmpltr_add(i, c, ASM_CT_NT1);
66 1.1 cherry break;
67 1.1 cherry case 2:
68 1.1 cherry asm_cmpltr_add(i, c, ASM_CT_NT2);
69 1.1 cherry break;
70 1.1 cherry case 3:
71 1.1 cherry asm_cmpltr_add(i, c, ASM_CT_NTA);
72 1.1 cherry break;
73 1.1 cherry }
74 1.1 cherry }
75 1.1 cherry
76 1.1 cherry static void
77 1.1 cherry asm_sf(struct asm_inst *i)
78 1.1 cherry {
79 1.1 cherry
80 1.1 cherry switch (FIELD(i->i_bits, 34, 2)) {
81 1.1 cherry case 0:
82 1.1 cherry asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S0);
83 1.1 cherry break;
84 1.1 cherry case 1:
85 1.1 cherry asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S1);
86 1.1 cherry break;
87 1.1 cherry case 2:
88 1.1 cherry asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S2);
89 1.1 cherry break;
90 1.1 cherry case 3:
91 1.1 cherry asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S3);
92 1.1 cherry break;
93 1.1 cherry }
94 1.1 cherry }
95 1.1 cherry
96 1.1 cherry static void
97 1.1 cherry asm_brhint(struct asm_inst *i)
98 1.1 cherry {
99 1.1 cherry uint64_t bits = i->i_bits;
100 1.1 cherry
101 1.1 cherry switch (FIELD(bits, 33, 2)) { /* bwh */
102 1.1 cherry case 0:
103 1.1 cherry asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_SPTK);
104 1.1 cherry break;
105 1.1 cherry case 1:
106 1.1 cherry asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_SPNT);
107 1.1 cherry break;
108 1.1 cherry case 2:
109 1.1 cherry asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_DPTK);
110 1.1 cherry break;
111 1.1 cherry case 3:
112 1.1 cherry asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_DPNT);
113 1.1 cherry break;
114 1.1 cherry }
115 1.1 cherry
116 1.1 cherry if (FIELD(bits, 12, 1)) /* ph */
117 1.1 cherry asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_MANY);
118 1.1 cherry else
119 1.1 cherry asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_FEW);
120 1.1 cherry
121 1.1 cherry if (FIELD(bits, 35, 1)) /* dh */
122 1.1 cherry asm_cmpltr_add(i, ASM_CC_DH, ASM_CT_CLR);
123 1.1 cherry else
124 1.1 cherry asm_cmpltr_add(i, ASM_CC_DH, ASM_CT_NONE);
125 1.1 cherry }
126 1.1 cherry
127 1.1 cherry static void
128 1.1 cherry asm_brphint(struct asm_inst *i)
129 1.1 cherry {
130 1.1 cherry uint64_t bits = i->i_bits;
131 1.1 cherry
132 1.1 cherry switch (FIELD(bits, 3, 2)) { /* ipwh, indwh */
133 1.1 cherry case 0:
134 1.1 cherry asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_SPTK);
135 1.1 cherry break;
136 1.1 cherry case 1:
137 1.1 cherry asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_LOOP);
138 1.1 cherry break;
139 1.1 cherry case 2:
140 1.1 cherry asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_DPTK);
141 1.1 cherry break;
142 1.1 cherry case 3:
143 1.1 cherry asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_EXIT);
144 1.1 cherry break;
145 1.1 cherry }
146 1.1 cherry
147 1.1 cherry if (FIELD(bits, 5, 1)) /* ph */
148 1.1 cherry asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_MANY);
149 1.1 cherry else
150 1.1 cherry asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_FEW);
151 1.1 cherry
152 1.1 cherry switch (FIELD(bits, 0, 3)) { /* pvec */
153 1.1 cherry case 0:
154 1.1 cherry asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_DC_DC);
155 1.1 cherry break;
156 1.1 cherry case 1:
157 1.1 cherry asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_DC_NT);
158 1.1 cherry break;
159 1.1 cherry case 2:
160 1.1 cherry asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_DC);
161 1.1 cherry break;
162 1.1 cherry case 3:
163 1.1 cherry asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_TK);
164 1.1 cherry break;
165 1.1 cherry case 4:
166 1.1 cherry asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_NT);
167 1.1 cherry break;
168 1.1 cherry case 5:
169 1.1 cherry asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_DC);
170 1.1 cherry break;
171 1.1 cherry case 6:
172 1.1 cherry asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_TK);
173 1.1 cherry break;
174 1.1 cherry case 7:
175 1.1 cherry asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_NT);
176 1.1 cherry break;
177 1.1 cherry }
178 1.1 cherry
179 1.1 cherry if (FIELD(bits, 35, 1)) /* ih */
180 1.1 cherry asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_IMP);
181 1.1 cherry else
182 1.1 cherry asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_NONE);
183 1.1 cherry }
184 1.1 cherry
185 1.1 cherry static enum asm_oper_type
186 1.1 cherry asm_normalize(struct asm_inst *i, enum asm_op op)
187 1.1 cherry {
188 1.1 cherry enum asm_oper_type ot = ASM_OPER_NONE;
189 1.1 cherry
190 1.1 cherry switch (op) {
191 1.1 cherry case ASM_OP_BR_CALL:
192 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CALL);
193 1.1 cherry op = ASM_OP_BR;
194 1.1 cherry break;
195 1.1 cherry case ASM_OP_BR_CEXIT:
196 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CEXIT);
197 1.1 cherry op = ASM_OP_BR;
198 1.1 cherry break;
199 1.1 cherry case ASM_OP_BR_CLOOP:
200 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CLOOP);
201 1.1 cherry op = ASM_OP_BR;
202 1.1 cherry break;
203 1.1 cherry case ASM_OP_BR_COND:
204 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_COND);
205 1.1 cherry op = ASM_OP_BR;
206 1.1 cherry break;
207 1.1 cherry case ASM_OP_BR_CTOP:
208 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CTOP);
209 1.1 cherry op = ASM_OP_BR;
210 1.1 cherry break;
211 1.1 cherry case ASM_OP_BR_IA:
212 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_IA);
213 1.1 cherry op = ASM_OP_BR;
214 1.1 cherry break;
215 1.1 cherry case ASM_OP_BR_RET:
216 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_RET);
217 1.1 cherry op = ASM_OP_BR;
218 1.1 cherry break;
219 1.1 cherry case ASM_OP_BR_WEXIT:
220 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_WEXIT);
221 1.1 cherry op = ASM_OP_BR;
222 1.1 cherry break;
223 1.1 cherry case ASM_OP_BR_WTOP:
224 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_WTOP);
225 1.1 cherry op = ASM_OP_BR;
226 1.1 cherry break;
227 1.1 cherry case ASM_OP_BREAK_B:
228 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B);
229 1.1 cherry op = ASM_OP_BREAK;
230 1.1 cherry break;
231 1.1 cherry case ASM_OP_BREAK_F:
232 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F);
233 1.1 cherry op = ASM_OP_BREAK;
234 1.1 cherry break;
235 1.1 cherry case ASM_OP_BREAK_I:
236 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
237 1.1 cherry op = ASM_OP_BREAK;
238 1.1 cherry break;
239 1.1 cherry case ASM_OP_BREAK_M:
240 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
241 1.1 cherry op = ASM_OP_BREAK;
242 1.1 cherry break;
243 1.1 cherry case ASM_OP_BREAK_X:
244 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X);
245 1.1 cherry op = ASM_OP_BREAK;
246 1.1 cherry break;
247 1.1 cherry case ASM_OP_BRL_COND:
248 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_COND);
249 1.1 cherry op = ASM_OP_BRL;
250 1.1 cherry break;
251 1.1 cherry case ASM_OP_BRL_CALL:
252 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CALL);
253 1.1 cherry op = ASM_OP_BRL;
254 1.1 cherry break;
255 1.1 cherry case ASM_OP_BRP_:
256 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_NONE);
257 1.1 cherry op = ASM_OP_BRP;
258 1.1 cherry break;
259 1.1 cherry case ASM_OP_BRP_RET:
260 1.1 cherry asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_RET);
261 1.1 cherry op = ASM_OP_BRP;
262 1.1 cherry break;
263 1.1 cherry case ASM_OP_BSW_0:
264 1.1 cherry asm_cmpltr_add(i, ASM_CC_BSW, ASM_CT_0);
265 1.1 cherry op = ASM_OP_BSW;
266 1.1 cherry break;
267 1.1 cherry case ASM_OP_BSW_1:
268 1.1 cherry asm_cmpltr_add(i, ASM_CC_BSW, ASM_CT_1);
269 1.1 cherry op = ASM_OP_BSW;
270 1.1 cherry break;
271 1.1 cherry case ASM_OP_CHK_A_CLR:
272 1.1 cherry asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_A);
273 1.1 cherry asm_cmpltr_add(i, ASM_CC_ACLR, ASM_CT_CLR);
274 1.1 cherry op = ASM_OP_CHK;
275 1.1 cherry break;
276 1.1 cherry case ASM_OP_CHK_A_NC:
277 1.1 cherry asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_A);
278 1.1 cherry asm_cmpltr_add(i, ASM_CC_ACLR, ASM_CT_NC);
279 1.1 cherry op = ASM_OP_CHK;
280 1.1 cherry break;
281 1.1 cherry case ASM_OP_CHK_S:
282 1.1 cherry asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
283 1.1 cherry op = ASM_OP_CHK;
284 1.1 cherry break;
285 1.1 cherry case ASM_OP_CHK_S_I:
286 1.1 cherry asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
287 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
288 1.1 cherry op = ASM_OP_CHK;
289 1.1 cherry break;
290 1.1 cherry case ASM_OP_CHK_S_M:
291 1.1 cherry asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
292 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
293 1.1 cherry op = ASM_OP_CHK;
294 1.1 cherry break;
295 1.1 cherry case ASM_OP_CLRRRB_:
296 1.1 cherry asm_cmpltr_add(i, ASM_CC_CLRRRB, ASM_CT_NONE);
297 1.1 cherry op = ASM_OP_CLRRRB;
298 1.1 cherry break;
299 1.1 cherry case ASM_OP_CLRRRB_PR:
300 1.1 cherry asm_cmpltr_add(i, ASM_CC_CLRRRB, ASM_CT_PR);
301 1.1 cherry op = ASM_OP_CLRRRB;
302 1.1 cherry break;
303 1.1 cherry case ASM_OP_CMP_EQ:
304 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
305 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
306 1.1 cherry op = ASM_OP_CMP;
307 1.1 cherry break;
308 1.1 cherry case ASM_OP_CMP_EQ_AND:
309 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
310 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
311 1.1 cherry op = ASM_OP_CMP;
312 1.1 cherry break;
313 1.1 cherry case ASM_OP_CMP_EQ_OR:
314 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
315 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
316 1.1 cherry op = ASM_OP_CMP;
317 1.1 cherry break;
318 1.1 cherry case ASM_OP_CMP_EQ_OR_ANDCM:
319 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
320 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
321 1.1 cherry op = ASM_OP_CMP;
322 1.1 cherry break;
323 1.1 cherry case ASM_OP_CMP_EQ_UNC:
324 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
325 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
326 1.1 cherry op = ASM_OP_CMP;
327 1.1 cherry break;
328 1.1 cherry case ASM_OP_CMP_GE_AND:
329 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
330 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
331 1.1 cherry op = ASM_OP_CMP;
332 1.1 cherry break;
333 1.1 cherry case ASM_OP_CMP_GE_OR:
334 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
335 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
336 1.1 cherry op = ASM_OP_CMP;
337 1.1 cherry break;
338 1.1 cherry case ASM_OP_CMP_GE_OR_ANDCM:
339 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
340 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
341 1.1 cherry op = ASM_OP_CMP;
342 1.1 cherry break;
343 1.1 cherry case ASM_OP_CMP_GT_AND:
344 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
345 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
346 1.1 cherry op = ASM_OP_CMP;
347 1.1 cherry break;
348 1.1 cherry case ASM_OP_CMP_GT_OR:
349 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
350 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
351 1.1 cherry op = ASM_OP_CMP;
352 1.1 cherry break;
353 1.1 cherry case ASM_OP_CMP_GT_OR_ANDCM:
354 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
355 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
356 1.1 cherry op = ASM_OP_CMP;
357 1.1 cherry break;
358 1.1 cherry case ASM_OP_CMP_LE_AND:
359 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
360 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
361 1.1 cherry op = ASM_OP_CMP;
362 1.1 cherry break;
363 1.1 cherry case ASM_OP_CMP_LE_OR:
364 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
365 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
366 1.1 cherry op = ASM_OP_CMP;
367 1.1 cherry break;
368 1.1 cherry case ASM_OP_CMP_LE_OR_ANDCM:
369 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
370 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
371 1.1 cherry op = ASM_OP_CMP;
372 1.1 cherry break;
373 1.1 cherry case ASM_OP_CMP_LT:
374 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
375 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
376 1.1 cherry op = ASM_OP_CMP;
377 1.1 cherry break;
378 1.1 cherry case ASM_OP_CMP_LT_AND:
379 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
380 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
381 1.1 cherry op = ASM_OP_CMP;
382 1.1 cherry break;
383 1.1 cherry case ASM_OP_CMP_LT_OR:
384 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
385 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
386 1.1 cherry op = ASM_OP_CMP;
387 1.1 cherry break;
388 1.1 cherry case ASM_OP_CMP_LT_OR_ANDCM:
389 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
390 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
391 1.1 cherry op = ASM_OP_CMP;
392 1.1 cherry break;
393 1.1 cherry case ASM_OP_CMP_LT_UNC:
394 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
395 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
396 1.1 cherry op = ASM_OP_CMP;
397 1.1 cherry break;
398 1.1 cherry case ASM_OP_CMP_LTU:
399 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
400 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
401 1.1 cherry op = ASM_OP_CMP;
402 1.1 cherry break;
403 1.1 cherry case ASM_OP_CMP_LTU_UNC:
404 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
405 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
406 1.1 cherry op = ASM_OP_CMP;
407 1.1 cherry break;
408 1.1 cherry case ASM_OP_CMP_NE_AND:
409 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
410 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
411 1.1 cherry op = ASM_OP_CMP;
412 1.1 cherry break;
413 1.1 cherry case ASM_OP_CMP_NE_OR:
414 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
415 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
416 1.1 cherry op = ASM_OP_CMP;
417 1.1 cherry break;
418 1.1 cherry case ASM_OP_CMP_NE_OR_ANDCM:
419 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
420 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
421 1.1 cherry op = ASM_OP_CMP;
422 1.1 cherry break;
423 1.1 cherry case ASM_OP_CMP4_EQ:
424 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
425 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
426 1.1 cherry op = ASM_OP_CMP4;
427 1.1 cherry break;
428 1.1 cherry case ASM_OP_CMP4_EQ_AND:
429 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
430 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
431 1.1 cherry op = ASM_OP_CMP4;
432 1.1 cherry break;
433 1.1 cherry case ASM_OP_CMP4_EQ_OR:
434 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
435 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
436 1.1 cherry op = ASM_OP_CMP4;
437 1.1 cherry break;
438 1.1 cherry case ASM_OP_CMP4_EQ_OR_ANDCM:
439 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
440 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
441 1.1 cherry op = ASM_OP_CMP4;
442 1.1 cherry break;
443 1.1 cherry case ASM_OP_CMP4_EQ_UNC:
444 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
445 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
446 1.1 cherry op = ASM_OP_CMP4;
447 1.1 cherry break;
448 1.1 cherry case ASM_OP_CMP4_GE_AND:
449 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
450 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
451 1.1 cherry op = ASM_OP_CMP4;
452 1.1 cherry break;
453 1.1 cherry case ASM_OP_CMP4_GE_OR:
454 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
455 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
456 1.1 cherry op = ASM_OP_CMP4;
457 1.1 cherry break;
458 1.1 cherry case ASM_OP_CMP4_GE_OR_ANDCM:
459 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
460 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
461 1.1 cherry op = ASM_OP_CMP4;
462 1.1 cherry break;
463 1.1 cherry case ASM_OP_CMP4_GT_AND:
464 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
465 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
466 1.1 cherry op = ASM_OP_CMP4;
467 1.1 cherry break;
468 1.1 cherry case ASM_OP_CMP4_GT_OR:
469 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
470 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
471 1.1 cherry op = ASM_OP_CMP4;
472 1.1 cherry break;
473 1.1 cherry case ASM_OP_CMP4_GT_OR_ANDCM:
474 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
475 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
476 1.1 cherry op = ASM_OP_CMP4;
477 1.1 cherry break;
478 1.1 cherry case ASM_OP_CMP4_LE_AND:
479 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
480 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
481 1.1 cherry op = ASM_OP_CMP4;
482 1.1 cherry break;
483 1.1 cherry case ASM_OP_CMP4_LE_OR:
484 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
485 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
486 1.1 cherry op = ASM_OP_CMP4;
487 1.1 cherry break;
488 1.1 cherry case ASM_OP_CMP4_LE_OR_ANDCM:
489 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
490 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
491 1.1 cherry op = ASM_OP_CMP4;
492 1.1 cherry break;
493 1.1 cherry case ASM_OP_CMP4_LT:
494 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
495 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
496 1.1 cherry op = ASM_OP_CMP4;
497 1.1 cherry break;
498 1.1 cherry case ASM_OP_CMP4_LT_AND:
499 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
500 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
501 1.1 cherry op = ASM_OP_CMP4;
502 1.1 cherry break;
503 1.1 cherry case ASM_OP_CMP4_LT_OR:
504 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
505 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
506 1.1 cherry op = ASM_OP_CMP4;
507 1.1 cherry break;
508 1.1 cherry case ASM_OP_CMP4_LT_OR_ANDCM:
509 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
510 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
511 1.1 cherry op = ASM_OP_CMP4;
512 1.1 cherry break;
513 1.1 cherry case ASM_OP_CMP4_LT_UNC:
514 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
515 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
516 1.1 cherry op = ASM_OP_CMP4;
517 1.1 cherry break;
518 1.1 cherry case ASM_OP_CMP4_LTU:
519 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
520 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
521 1.1 cherry op = ASM_OP_CMP4;
522 1.1 cherry break;
523 1.1 cherry case ASM_OP_CMP4_LTU_UNC:
524 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
525 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
526 1.1 cherry op = ASM_OP_CMP4;
527 1.1 cherry break;
528 1.1 cherry case ASM_OP_CMP4_NE_AND:
529 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
530 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
531 1.1 cherry op = ASM_OP_CMP4;
532 1.1 cherry break;
533 1.1 cherry case ASM_OP_CMP4_NE_OR:
534 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
535 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
536 1.1 cherry op = ASM_OP_CMP4;
537 1.1 cherry break;
538 1.1 cherry case ASM_OP_CMP4_NE_OR_ANDCM:
539 1.1 cherry asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
540 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
541 1.1 cherry op = ASM_OP_CMP4;
542 1.1 cherry break;
543 1.1 cherry case ASM_OP_CMP8XCHG16_ACQ:
544 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
545 1.1 cherry op = ASM_OP_CMP8XCHG16;
546 1.1 cherry break;
547 1.1 cherry case ASM_OP_CMP8XCHG16_REL:
548 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
549 1.1 cherry op = ASM_OP_CMP8XCHG16;
550 1.1 cherry break;
551 1.1 cherry case ASM_OP_CMPXCHG1_ACQ:
552 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
553 1.1 cherry op = ASM_OP_CMPXCHG1;
554 1.1 cherry break;
555 1.1 cherry case ASM_OP_CMPXCHG1_REL:
556 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
557 1.1 cherry op = ASM_OP_CMPXCHG1;
558 1.1 cherry break;
559 1.1 cherry case ASM_OP_CMPXCHG2_ACQ:
560 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
561 1.1 cherry op = ASM_OP_CMPXCHG2;
562 1.1 cherry break;
563 1.1 cherry case ASM_OP_CMPXCHG2_REL:
564 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
565 1.1 cherry op = ASM_OP_CMPXCHG2;
566 1.1 cherry break;
567 1.1 cherry case ASM_OP_CMPXCHG4_ACQ:
568 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
569 1.1 cherry op = ASM_OP_CMPXCHG4;
570 1.1 cherry break;
571 1.1 cherry case ASM_OP_CMPXCHG4_REL:
572 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
573 1.1 cherry op = ASM_OP_CMPXCHG4;
574 1.1 cherry break;
575 1.1 cherry case ASM_OP_CMPXCHG8_ACQ:
576 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
577 1.1 cherry op = ASM_OP_CMPXCHG8;
578 1.1 cherry break;
579 1.1 cherry case ASM_OP_CMPXCHG8_REL:
580 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
581 1.1 cherry op = ASM_OP_CMPXCHG8;
582 1.1 cherry break;
583 1.1 cherry case ASM_OP_CZX1_L:
584 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
585 1.1 cherry op = ASM_OP_CZX1;
586 1.1 cherry break;
587 1.1 cherry case ASM_OP_CZX1_R:
588 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
589 1.1 cherry op = ASM_OP_CZX1;
590 1.1 cherry break;
591 1.1 cherry case ASM_OP_CZX2_L:
592 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
593 1.1 cherry op = ASM_OP_CZX2;
594 1.1 cherry break;
595 1.1 cherry case ASM_OP_CZX2_R:
596 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
597 1.1 cherry op = ASM_OP_CZX2;
598 1.1 cherry break;
599 1.1 cherry case ASM_OP_DEP_:
600 1.1 cherry asm_cmpltr_add(i, ASM_CC_DEP, ASM_CT_NONE);
601 1.1 cherry op = ASM_OP_DEP;
602 1.1 cherry break;
603 1.1 cherry case ASM_OP_DEP_Z:
604 1.1 cherry asm_cmpltr_add(i, ASM_CC_DEP, ASM_CT_Z);
605 1.1 cherry op = ASM_OP_DEP;
606 1.1 cherry break;
607 1.1 cherry case ASM_OP_FC_:
608 1.1 cherry asm_cmpltr_add(i, ASM_CC_FC, ASM_CT_NONE);
609 1.1 cherry op = ASM_OP_FC;
610 1.1 cherry break;
611 1.1 cherry case ASM_OP_FC_I:
612 1.1 cherry asm_cmpltr_add(i, ASM_CC_FC, ASM_CT_I);
613 1.1 cherry op = ASM_OP_FC;
614 1.1 cherry break;
615 1.1 cherry case ASM_OP_FCLASS_M:
616 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCREL, ASM_CT_M);
617 1.1 cherry op = ASM_OP_FCLASS;
618 1.1 cherry break;
619 1.1 cherry case ASM_OP_FCVT_FX:
620 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
621 1.1 cherry asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
622 1.1 cherry op = ASM_OP_FCVT;
623 1.1 cherry break;
624 1.1 cherry case ASM_OP_FCVT_FX_TRUNC:
625 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
626 1.1 cherry asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
627 1.1 cherry op = ASM_OP_FCVT;
628 1.1 cherry break;
629 1.1 cherry case ASM_OP_FCVT_FXU:
630 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
631 1.1 cherry asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
632 1.1 cherry op = ASM_OP_FCVT;
633 1.1 cherry break;
634 1.1 cherry case ASM_OP_FCVT_FXU_TRUNC:
635 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
636 1.1 cherry asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
637 1.1 cherry op = ASM_OP_FCVT;
638 1.1 cherry break;
639 1.1 cherry case ASM_OP_FCVT_XF:
640 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_XF);
641 1.1 cherry asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
642 1.1 cherry op = ASM_OP_FCVT;
643 1.1 cherry break;
644 1.1 cherry case ASM_OP_FETCHADD4_ACQ:
645 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
646 1.1 cherry op = ASM_OP_FETCHADD4;
647 1.1 cherry break;
648 1.1 cherry case ASM_OP_FETCHADD4_REL:
649 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
650 1.1 cherry op = ASM_OP_FETCHADD4;
651 1.1 cherry break;
652 1.1 cherry case ASM_OP_FETCHADD8_ACQ:
653 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
654 1.1 cherry op = ASM_OP_FETCHADD8;
655 1.1 cherry break;
656 1.1 cherry case ASM_OP_FETCHADD8_REL:
657 1.1 cherry asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
658 1.1 cherry op = ASM_OP_FETCHADD8;
659 1.1 cherry break;
660 1.1 cherry case ASM_OP_FMA_:
661 1.1 cherry asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
662 1.1 cherry op = ASM_OP_FMA;
663 1.1 cherry break;
664 1.1 cherry case ASM_OP_FMA_D:
665 1.1 cherry asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
666 1.1 cherry op = ASM_OP_FMA;
667 1.1 cherry break;
668 1.1 cherry case ASM_OP_FMA_S:
669 1.1 cherry asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
670 1.1 cherry op = ASM_OP_FMA;
671 1.1 cherry break;
672 1.1 cherry case ASM_OP_FMERGE_NS:
673 1.1 cherry asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_NS);
674 1.1 cherry op = ASM_OP_FMERGE;
675 1.1 cherry break;
676 1.1 cherry case ASM_OP_FMERGE_S:
677 1.1 cherry asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_S);
678 1.1 cherry op = ASM_OP_FMERGE;
679 1.1 cherry break;
680 1.1 cherry case ASM_OP_FMERGE_SE:
681 1.1 cherry asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_SE);
682 1.1 cherry op = ASM_OP_FMERGE;
683 1.1 cherry break;
684 1.1 cherry case ASM_OP_FMIX_L:
685 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
686 1.1 cherry op = ASM_OP_FMIX;
687 1.1 cherry break;
688 1.1 cherry case ASM_OP_FMIX_LR:
689 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_LR);
690 1.1 cherry op = ASM_OP_FMIX;
691 1.1 cherry break;
692 1.1 cherry case ASM_OP_FMIX_R:
693 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
694 1.1 cherry op = ASM_OP_FMIX;
695 1.1 cherry break;
696 1.1 cherry case ASM_OP_FMS_:
697 1.1 cherry asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
698 1.1 cherry op = ASM_OP_FMS;
699 1.1 cherry break;
700 1.1 cherry case ASM_OP_FMS_D:
701 1.1 cherry asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
702 1.1 cherry op = ASM_OP_FMS;
703 1.1 cherry break;
704 1.1 cherry case ASM_OP_FMS_S:
705 1.1 cherry asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
706 1.1 cherry op = ASM_OP_FMS;
707 1.1 cherry break;
708 1.1 cherry case ASM_OP_FNMA_:
709 1.1 cherry asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
710 1.1 cherry op = ASM_OP_FNMA;
711 1.1 cherry break;
712 1.1 cherry case ASM_OP_FNMA_D:
713 1.1 cherry asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
714 1.1 cherry op = ASM_OP_FNMA;
715 1.1 cherry break;
716 1.1 cherry case ASM_OP_FNMA_S:
717 1.1 cherry asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
718 1.1 cherry op = ASM_OP_FNMA;
719 1.1 cherry break;
720 1.1 cherry case ASM_OP_FPCMP_EQ:
721 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_EQ);
722 1.1 cherry op = ASM_OP_FPCMP;
723 1.1 cherry break;
724 1.1 cherry case ASM_OP_FPCMP_LE:
725 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LE);
726 1.1 cherry op = ASM_OP_FPCMP;
727 1.1 cherry break;
728 1.1 cherry case ASM_OP_FPCMP_LT:
729 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LT);
730 1.1 cherry op = ASM_OP_FPCMP;
731 1.1 cherry break;
732 1.1 cherry case ASM_OP_FPCMP_NEQ:
733 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NEQ);
734 1.1 cherry op = ASM_OP_FPCMP;
735 1.1 cherry break;
736 1.1 cherry case ASM_OP_FPCMP_NLE:
737 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NLE);
738 1.1 cherry op = ASM_OP_FPCMP;
739 1.1 cherry break;
740 1.1 cherry case ASM_OP_FPCMP_NLT:
741 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NLT);
742 1.1 cherry op = ASM_OP_FPCMP;
743 1.1 cherry break;
744 1.1 cherry case ASM_OP_FPCMP_ORD:
745 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_ORD);
746 1.1 cherry op = ASM_OP_FPCMP;
747 1.1 cherry break;
748 1.1 cherry case ASM_OP_FPCMP_UNORD:
749 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_UNORD);
750 1.1 cherry op = ASM_OP_FPCMP;
751 1.1 cherry break;
752 1.1 cherry case ASM_OP_FPCVT_FX:
753 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
754 1.1 cherry asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
755 1.1 cherry op = ASM_OP_FPCVT;
756 1.1 cherry break;
757 1.1 cherry case ASM_OP_FPCVT_FX_TRUNC:
758 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
759 1.1 cherry asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
760 1.1 cherry op = ASM_OP_FPCVT;
761 1.1 cherry break;
762 1.1 cherry case ASM_OP_FPCVT_FXU:
763 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
764 1.1 cherry asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
765 1.1 cherry op = ASM_OP_FPCVT;
766 1.1 cherry break;
767 1.1 cherry case ASM_OP_FPCVT_FXU_TRUNC:
768 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
769 1.1 cherry asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
770 1.1 cherry op = ASM_OP_FPCVT;
771 1.1 cherry break;
772 1.1 cherry case ASM_OP_FPMERGE_NS:
773 1.1 cherry asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_NS);
774 1.1 cherry op = ASM_OP_FPMERGE;
775 1.1 cherry break;
776 1.1 cherry case ASM_OP_FPMERGE_S:
777 1.1 cherry asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_S);
778 1.1 cherry op = ASM_OP_FPMERGE;
779 1.1 cherry break;
780 1.1 cherry case ASM_OP_FPMERGE_SE:
781 1.1 cherry asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_SE);
782 1.1 cherry op = ASM_OP_FPMERGE;
783 1.1 cherry break;
784 1.1 cherry case ASM_OP_FSWAP_:
785 1.1 cherry asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NONE);
786 1.1 cherry op = ASM_OP_FSWAP;
787 1.1 cherry break;
788 1.1 cherry case ASM_OP_FSWAP_NL:
789 1.1 cherry asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NL);
790 1.1 cherry op = ASM_OP_FSWAP;
791 1.1 cherry break;
792 1.1 cherry case ASM_OP_FSWAP_NR:
793 1.1 cherry asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NR);
794 1.1 cherry op = ASM_OP_FSWAP;
795 1.1 cherry break;
796 1.1 cherry case ASM_OP_FSXT_L:
797 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
798 1.1 cherry op = ASM_OP_FSXT;
799 1.1 cherry break;
800 1.1 cherry case ASM_OP_FSXT_R:
801 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
802 1.1 cherry op = ASM_OP_FSXT;
803 1.1 cherry break;
804 1.1 cherry case ASM_OP_GETF_D:
805 1.1 cherry asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_D);
806 1.1 cherry op = ASM_OP_GETF;
807 1.1 cherry break;
808 1.1 cherry case ASM_OP_GETF_EXP:
809 1.1 cherry asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_EXP);
810 1.1 cherry op = ASM_OP_GETF;
811 1.1 cherry break;
812 1.1 cherry case ASM_OP_GETF_S:
813 1.1 cherry asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_S);
814 1.1 cherry op = ASM_OP_GETF;
815 1.1 cherry break;
816 1.1 cherry case ASM_OP_GETF_SIG:
817 1.1 cherry asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_SIG);
818 1.1 cherry op = ASM_OP_GETF;
819 1.1 cherry break;
820 1.2.30.1 skrll case ASM_OP_HINT_B:
821 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B);
822 1.2.30.1 skrll op = ASM_OP_HINT;
823 1.2.30.1 skrll break;
824 1.2.30.1 skrll case ASM_OP_HINT_F:
825 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F);
826 1.2.30.1 skrll op = ASM_OP_HINT;
827 1.2.30.1 skrll break;
828 1.2.30.1 skrll case ASM_OP_HINT_I:
829 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
830 1.2.30.1 skrll op = ASM_OP_HINT;
831 1.2.30.1 skrll break;
832 1.2.30.1 skrll case ASM_OP_HINT_M:
833 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
834 1.2.30.1 skrll op = ASM_OP_HINT;
835 1.2.30.1 skrll break;
836 1.2.30.1 skrll case ASM_OP_HINT_X:
837 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X);
838 1.2.30.1 skrll op = ASM_OP_HINT;
839 1.2.30.1 skrll break;
840 1.1 cherry case ASM_OP_INVALA_:
841 1.1 cherry asm_cmpltr_add(i, ASM_CC_INVALA, ASM_CT_NONE);
842 1.1 cherry op = ASM_OP_INVALA;
843 1.1 cherry break;
844 1.1 cherry case ASM_OP_INVALA_E:
845 1.1 cherry asm_cmpltr_add(i, ASM_CC_INVALA, ASM_CT_E);
846 1.1 cherry op = ASM_OP_INVALA;
847 1.1 cherry break;
848 1.1 cherry case ASM_OP_ITC_D:
849 1.1 cherry asm_cmpltr_add(i, ASM_CC_ITC, ASM_CT_D);
850 1.1 cherry op = ASM_OP_ITC;
851 1.1 cherry break;
852 1.1 cherry case ASM_OP_ITC_I:
853 1.1 cherry asm_cmpltr_add(i, ASM_CC_ITC, ASM_CT_I);
854 1.1 cherry op = ASM_OP_ITC;
855 1.1 cherry break;
856 1.1 cherry case ASM_OP_ITR_D:
857 1.1 cherry asm_cmpltr_add(i, ASM_CC_ITR, ASM_CT_D);
858 1.1 cherry ot = ASM_OPER_DTR;
859 1.1 cherry op = ASM_OP_ITR;
860 1.1 cherry break;
861 1.1 cherry case ASM_OP_ITR_I:
862 1.1 cherry asm_cmpltr_add(i, ASM_CC_ITR, ASM_CT_I);
863 1.1 cherry ot = ASM_OPER_ITR;
864 1.1 cherry op = ASM_OP_ITR;
865 1.1 cherry break;
866 1.1 cherry case ASM_OP_LD1_:
867 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
868 1.1 cherry op = ASM_OP_LD1;
869 1.1 cherry break;
870 1.1 cherry case ASM_OP_LD1_A:
871 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
872 1.1 cherry op = ASM_OP_LD1;
873 1.1 cherry break;
874 1.1 cherry case ASM_OP_LD1_ACQ:
875 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
876 1.1 cherry op = ASM_OP_LD1;
877 1.1 cherry break;
878 1.1 cherry case ASM_OP_LD1_BIAS:
879 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
880 1.1 cherry op = ASM_OP_LD1;
881 1.1 cherry break;
882 1.1 cherry case ASM_OP_LD1_C_CLR:
883 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
884 1.1 cherry op = ASM_OP_LD1;
885 1.1 cherry break;
886 1.1 cherry case ASM_OP_LD1_C_CLR_ACQ:
887 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
888 1.1 cherry op = ASM_OP_LD1;
889 1.1 cherry break;
890 1.1 cherry case ASM_OP_LD1_C_NC:
891 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
892 1.1 cherry op = ASM_OP_LD1;
893 1.1 cherry break;
894 1.1 cherry case ASM_OP_LD1_S:
895 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
896 1.1 cherry op = ASM_OP_LD1;
897 1.1 cherry break;
898 1.1 cherry case ASM_OP_LD1_SA:
899 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
900 1.1 cherry op = ASM_OP_LD1;
901 1.1 cherry break;
902 1.1 cherry case ASM_OP_LD16_:
903 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
904 1.1 cherry op = ASM_OP_LD16;
905 1.1 cherry break;
906 1.1 cherry case ASM_OP_LD16_ACQ:
907 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
908 1.1 cherry op = ASM_OP_LD16;
909 1.1 cherry break;
910 1.1 cherry case ASM_OP_LD2_:
911 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
912 1.1 cherry op = ASM_OP_LD2;
913 1.1 cherry break;
914 1.1 cherry case ASM_OP_LD2_A:
915 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
916 1.1 cherry op = ASM_OP_LD2;
917 1.1 cherry break;
918 1.1 cherry case ASM_OP_LD2_ACQ:
919 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
920 1.1 cherry op = ASM_OP_LD2;
921 1.1 cherry break;
922 1.1 cherry case ASM_OP_LD2_BIAS:
923 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
924 1.1 cherry op = ASM_OP_LD2;
925 1.1 cherry break;
926 1.1 cherry case ASM_OP_LD2_C_CLR:
927 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
928 1.1 cherry op = ASM_OP_LD2;
929 1.1 cherry break;
930 1.1 cherry case ASM_OP_LD2_C_CLR_ACQ:
931 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
932 1.1 cherry op = ASM_OP_LD2;
933 1.1 cherry break;
934 1.1 cherry case ASM_OP_LD2_C_NC:
935 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
936 1.1 cherry op = ASM_OP_LD2;
937 1.1 cherry break;
938 1.1 cherry case ASM_OP_LD2_S:
939 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
940 1.1 cherry op = ASM_OP_LD2;
941 1.1 cherry break;
942 1.1 cherry case ASM_OP_LD2_SA:
943 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
944 1.1 cherry op = ASM_OP_LD2;
945 1.1 cherry break;
946 1.1 cherry case ASM_OP_LD4_:
947 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
948 1.1 cherry op = ASM_OP_LD4;
949 1.1 cherry break;
950 1.1 cherry case ASM_OP_LD4_A:
951 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
952 1.1 cherry op = ASM_OP_LD4;
953 1.1 cherry break;
954 1.1 cherry case ASM_OP_LD4_ACQ:
955 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
956 1.1 cherry op = ASM_OP_LD4;
957 1.1 cherry break;
958 1.1 cherry case ASM_OP_LD4_BIAS:
959 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
960 1.1 cherry op = ASM_OP_LD4;
961 1.1 cherry break;
962 1.1 cherry case ASM_OP_LD4_C_CLR:
963 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
964 1.1 cherry op = ASM_OP_LD4;
965 1.1 cherry break;
966 1.1 cherry case ASM_OP_LD4_C_CLR_ACQ:
967 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
968 1.1 cherry op = ASM_OP_LD4;
969 1.1 cherry break;
970 1.1 cherry case ASM_OP_LD4_C_NC:
971 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
972 1.1 cherry op = ASM_OP_LD4;
973 1.1 cherry break;
974 1.1 cherry case ASM_OP_LD4_S:
975 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
976 1.1 cherry op = ASM_OP_LD4;
977 1.1 cherry break;
978 1.1 cherry case ASM_OP_LD4_SA:
979 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
980 1.1 cherry op = ASM_OP_LD4;
981 1.1 cherry break;
982 1.1 cherry case ASM_OP_LD8_:
983 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
984 1.1 cherry op = ASM_OP_LD8;
985 1.1 cherry break;
986 1.1 cherry case ASM_OP_LD8_A:
987 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
988 1.1 cherry op = ASM_OP_LD8;
989 1.1 cherry break;
990 1.1 cherry case ASM_OP_LD8_ACQ:
991 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
992 1.1 cherry op = ASM_OP_LD8;
993 1.1 cherry break;
994 1.1 cherry case ASM_OP_LD8_BIAS:
995 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
996 1.1 cherry op = ASM_OP_LD8;
997 1.1 cherry break;
998 1.1 cherry case ASM_OP_LD8_C_CLR:
999 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
1000 1.1 cherry op = ASM_OP_LD8;
1001 1.1 cherry break;
1002 1.1 cherry case ASM_OP_LD8_C_CLR_ACQ:
1003 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
1004 1.1 cherry op = ASM_OP_LD8;
1005 1.1 cherry break;
1006 1.1 cherry case ASM_OP_LD8_C_NC:
1007 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
1008 1.1 cherry op = ASM_OP_LD8;
1009 1.1 cherry break;
1010 1.1 cherry case ASM_OP_LD8_FILL:
1011 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_FILL);
1012 1.1 cherry op = ASM_OP_LD8;
1013 1.1 cherry break;
1014 1.1 cherry case ASM_OP_LD8_S:
1015 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
1016 1.1 cherry op = ASM_OP_LD8;
1017 1.1 cherry break;
1018 1.1 cherry case ASM_OP_LD8_SA:
1019 1.1 cherry asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
1020 1.1 cherry op = ASM_OP_LD8;
1021 1.1 cherry break;
1022 1.1 cherry case ASM_OP_LDF_FILL:
1023 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_FILL);
1024 1.1 cherry op = ASM_OP_LDF;
1025 1.1 cherry break;
1026 1.1 cherry case ASM_OP_LDF8_:
1027 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1028 1.1 cherry op = ASM_OP_LDF8;
1029 1.1 cherry break;
1030 1.1 cherry case ASM_OP_LDF8_A:
1031 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1032 1.1 cherry op = ASM_OP_LDF8;
1033 1.1 cherry break;
1034 1.1 cherry case ASM_OP_LDF8_C_CLR:
1035 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1036 1.1 cherry op = ASM_OP_LDF8;
1037 1.1 cherry break;
1038 1.1 cherry case ASM_OP_LDF8_C_NC:
1039 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1040 1.1 cherry op = ASM_OP_LDF8;
1041 1.1 cherry break;
1042 1.1 cherry case ASM_OP_LDF8_S:
1043 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1044 1.1 cherry op = ASM_OP_LDF8;
1045 1.1 cherry break;
1046 1.1 cherry case ASM_OP_LDF8_SA:
1047 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1048 1.1 cherry op = ASM_OP_LDF8;
1049 1.1 cherry break;
1050 1.1 cherry case ASM_OP_LDFD_:
1051 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1052 1.1 cherry op = ASM_OP_LDFD;
1053 1.1 cherry break;
1054 1.1 cherry case ASM_OP_LDFD_A:
1055 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1056 1.1 cherry op = ASM_OP_LDFD;
1057 1.1 cherry break;
1058 1.1 cherry case ASM_OP_LDFD_C_CLR:
1059 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1060 1.1 cherry op = ASM_OP_LDFD;
1061 1.1 cherry break;
1062 1.1 cherry case ASM_OP_LDFD_C_NC:
1063 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1064 1.1 cherry op = ASM_OP_LDFD;
1065 1.1 cherry break;
1066 1.1 cherry case ASM_OP_LDFD_S:
1067 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1068 1.1 cherry op = ASM_OP_LDFD;
1069 1.1 cherry break;
1070 1.1 cherry case ASM_OP_LDFD_SA:
1071 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1072 1.1 cherry op = ASM_OP_LDFD;
1073 1.1 cherry break;
1074 1.1 cherry case ASM_OP_LDFE_:
1075 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1076 1.1 cherry op = ASM_OP_LDFE;
1077 1.1 cherry break;
1078 1.1 cherry case ASM_OP_LDFE_A:
1079 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1080 1.1 cherry op = ASM_OP_LDFE;
1081 1.1 cherry break;
1082 1.1 cherry case ASM_OP_LDFE_C_CLR:
1083 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1084 1.1 cherry op = ASM_OP_LDFE;
1085 1.1 cherry break;
1086 1.1 cherry case ASM_OP_LDFE_C_NC:
1087 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1088 1.1 cherry op = ASM_OP_LDFE;
1089 1.1 cherry break;
1090 1.1 cherry case ASM_OP_LDFE_S:
1091 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1092 1.1 cherry op = ASM_OP_LDFE;
1093 1.1 cherry break;
1094 1.1 cherry case ASM_OP_LDFE_SA:
1095 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1096 1.1 cherry op = ASM_OP_LDFE;
1097 1.1 cherry break;
1098 1.1 cherry case ASM_OP_LDFP8_:
1099 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1100 1.1 cherry op = ASM_OP_LDFP8;
1101 1.1 cherry break;
1102 1.1 cherry case ASM_OP_LDFP8_A:
1103 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1104 1.1 cherry op = ASM_OP_LDFP8;
1105 1.1 cherry break;
1106 1.1 cherry case ASM_OP_LDFP8_C_CLR:
1107 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1108 1.1 cherry op = ASM_OP_LDFP8;
1109 1.1 cherry break;
1110 1.1 cherry case ASM_OP_LDFP8_C_NC:
1111 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1112 1.1 cherry op = ASM_OP_LDFP8;
1113 1.1 cherry break;
1114 1.1 cherry case ASM_OP_LDFP8_S:
1115 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1116 1.1 cherry op = ASM_OP_LDFP8;
1117 1.1 cherry break;
1118 1.1 cherry case ASM_OP_LDFP8_SA:
1119 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1120 1.1 cherry op = ASM_OP_LDFP8;
1121 1.1 cherry break;
1122 1.1 cherry case ASM_OP_LDFPD_:
1123 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1124 1.1 cherry op = ASM_OP_LDFPD;
1125 1.1 cherry break;
1126 1.1 cherry case ASM_OP_LDFPD_A:
1127 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1128 1.1 cherry op = ASM_OP_LDFPD;
1129 1.1 cherry break;
1130 1.1 cherry case ASM_OP_LDFPD_C_CLR:
1131 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1132 1.1 cherry op = ASM_OP_LDFPD;
1133 1.1 cherry break;
1134 1.1 cherry case ASM_OP_LDFPD_C_NC:
1135 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1136 1.1 cherry op = ASM_OP_LDFPD;
1137 1.1 cherry break;
1138 1.1 cherry case ASM_OP_LDFPD_S:
1139 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1140 1.1 cherry op = ASM_OP_LDFPD;
1141 1.1 cherry break;
1142 1.1 cherry case ASM_OP_LDFPD_SA:
1143 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1144 1.1 cherry op = ASM_OP_LDFPD;
1145 1.1 cherry break;
1146 1.1 cherry case ASM_OP_LDFPS_:
1147 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1148 1.1 cherry op = ASM_OP_LDFPS;
1149 1.1 cherry break;
1150 1.1 cherry case ASM_OP_LDFPS_A:
1151 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1152 1.1 cherry op = ASM_OP_LDFPS;
1153 1.1 cherry break;
1154 1.1 cherry case ASM_OP_LDFPS_C_CLR:
1155 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1156 1.1 cherry op = ASM_OP_LDFPS;
1157 1.1 cherry break;
1158 1.1 cherry case ASM_OP_LDFPS_C_NC:
1159 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1160 1.1 cherry op = ASM_OP_LDFPS;
1161 1.1 cherry break;
1162 1.1 cherry case ASM_OP_LDFPS_S:
1163 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1164 1.1 cherry op = ASM_OP_LDFPS;
1165 1.1 cherry break;
1166 1.1 cherry case ASM_OP_LDFPS_SA:
1167 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1168 1.1 cherry op = ASM_OP_LDFPS;
1169 1.1 cherry break;
1170 1.1 cherry case ASM_OP_LDFS_:
1171 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1172 1.1 cherry op = ASM_OP_LDFS;
1173 1.1 cherry break;
1174 1.1 cherry case ASM_OP_LDFS_A:
1175 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1176 1.1 cherry op = ASM_OP_LDFS;
1177 1.1 cherry break;
1178 1.1 cherry case ASM_OP_LDFS_C_CLR:
1179 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1180 1.1 cherry op = ASM_OP_LDFS;
1181 1.1 cherry break;
1182 1.1 cherry case ASM_OP_LDFS_C_NC:
1183 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1184 1.1 cherry op = ASM_OP_LDFS;
1185 1.1 cherry break;
1186 1.1 cherry case ASM_OP_LDFS_S:
1187 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1188 1.1 cherry op = ASM_OP_LDFS;
1189 1.1 cherry break;
1190 1.1 cherry case ASM_OP_LDFS_SA:
1191 1.1 cherry asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1192 1.1 cherry op = ASM_OP_LDFS;
1193 1.1 cherry break;
1194 1.1 cherry case ASM_OP_LFETCH_:
1195 1.1 cherry asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_NONE);
1196 1.1 cherry asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_NONE);
1197 1.1 cherry op = ASM_OP_LFETCH;
1198 1.1 cherry break;
1199 1.1 cherry case ASM_OP_LFETCH_EXCL:
1200 1.1 cherry asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_NONE);
1201 1.1 cherry asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_EXCL);
1202 1.1 cherry op = ASM_OP_LFETCH;
1203 1.1 cherry break;
1204 1.1 cherry case ASM_OP_LFETCH_FAULT:
1205 1.1 cherry asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_FAULT);
1206 1.1 cherry asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_NONE);
1207 1.1 cherry op = ASM_OP_LFETCH;
1208 1.1 cherry break;
1209 1.1 cherry case ASM_OP_LFETCH_FAULT_EXCL:
1210 1.1 cherry asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_FAULT);
1211 1.1 cherry asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_EXCL);
1212 1.1 cherry op = ASM_OP_LFETCH;
1213 1.1 cherry break;
1214 1.1 cherry case ASM_OP_MF_:
1215 1.1 cherry asm_cmpltr_add(i, ASM_CC_MF, ASM_CT_NONE);
1216 1.1 cherry op = ASM_OP_MF;
1217 1.1 cherry break;
1218 1.1 cherry case ASM_OP_MF_A:
1219 1.1 cherry asm_cmpltr_add(i, ASM_CC_MF, ASM_CT_A);
1220 1.1 cherry op = ASM_OP_MF;
1221 1.1 cherry break;
1222 1.1 cherry case ASM_OP_MIX1_L:
1223 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1224 1.1 cherry op = ASM_OP_MIX1;
1225 1.1 cherry break;
1226 1.1 cherry case ASM_OP_MIX1_R:
1227 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1228 1.1 cherry op = ASM_OP_MIX1;
1229 1.1 cherry break;
1230 1.1 cherry case ASM_OP_MIX2_L:
1231 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1232 1.1 cherry op = ASM_OP_MIX2;
1233 1.1 cherry break;
1234 1.1 cherry case ASM_OP_MIX2_R:
1235 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1236 1.1 cherry op = ASM_OP_MIX2;
1237 1.1 cherry break;
1238 1.1 cherry case ASM_OP_MIX4_L:
1239 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1240 1.1 cherry op = ASM_OP_MIX4;
1241 1.1 cherry break;
1242 1.1 cherry case ASM_OP_MIX4_R:
1243 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1244 1.1 cherry op = ASM_OP_MIX4;
1245 1.1 cherry break;
1246 1.1 cherry case ASM_OP_MOV_:
1247 1.1 cherry asm_cmpltr_add(i, ASM_CC_MOV, ASM_CT_NONE);
1248 1.1 cherry op = ASM_OP_MOV;
1249 1.1 cherry break;
1250 1.1 cherry case ASM_OP_MOV_I:
1251 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
1252 1.1 cherry op = ASM_OP_MOV;
1253 1.1 cherry break;
1254 1.1 cherry case ASM_OP_MOV_M:
1255 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
1256 1.1 cherry op = ASM_OP_MOV;
1257 1.1 cherry break;
1258 1.1 cherry case ASM_OP_MOV_RET:
1259 1.1 cherry asm_cmpltr_add(i, ASM_CC_MOV, ASM_CT_RET);
1260 1.1 cherry op = ASM_OP_MOV;
1261 1.1 cherry break;
1262 1.1 cherry case ASM_OP_MOV_CPUID:
1263 1.1 cherry ot = ASM_OPER_CPUID;
1264 1.1 cherry op = ASM_OP_MOV;
1265 1.1 cherry break;
1266 1.1 cherry case ASM_OP_MOV_DBR:
1267 1.1 cherry ot = ASM_OPER_DBR;
1268 1.1 cherry op = ASM_OP_MOV;
1269 1.1 cherry break;
1270 1.1 cherry case ASM_OP_MOV_IBR:
1271 1.1 cherry ot = ASM_OPER_IBR;
1272 1.1 cherry op = ASM_OP_MOV;
1273 1.1 cherry break;
1274 1.1 cherry case ASM_OP_MOV_IP:
1275 1.1 cherry ot = ASM_OPER_IP;
1276 1.1 cherry op = ASM_OP_MOV;
1277 1.1 cherry break;
1278 1.1 cherry case ASM_OP_MOV_MSR:
1279 1.1 cherry ot = ASM_OPER_MSR;
1280 1.1 cherry op = ASM_OP_MOV;
1281 1.1 cherry break;
1282 1.1 cherry case ASM_OP_MOV_PKR:
1283 1.1 cherry ot = ASM_OPER_PKR;
1284 1.1 cherry op = ASM_OP_MOV;
1285 1.1 cherry break;
1286 1.1 cherry case ASM_OP_MOV_PMC:
1287 1.1 cherry ot = ASM_OPER_PMC;
1288 1.1 cherry op = ASM_OP_MOV;
1289 1.1 cherry break;
1290 1.1 cherry case ASM_OP_MOV_PMD:
1291 1.1 cherry ot = ASM_OPER_PMD;
1292 1.1 cherry op = ASM_OP_MOV;
1293 1.1 cherry break;
1294 1.1 cherry case ASM_OP_MOV_PR:
1295 1.1 cherry ot = ASM_OPER_PR;
1296 1.1 cherry op = ASM_OP_MOV;
1297 1.1 cherry break;
1298 1.1 cherry case ASM_OP_MOV_PSR:
1299 1.1 cherry ot = ASM_OPER_PSR;
1300 1.1 cherry op = ASM_OP_MOV;
1301 1.1 cherry break;
1302 1.1 cherry case ASM_OP_MOV_PSR_L:
1303 1.1 cherry ot = ASM_OPER_PSR_L;
1304 1.1 cherry op = ASM_OP_MOV;
1305 1.1 cherry break;
1306 1.1 cherry case ASM_OP_MOV_PSR_UM:
1307 1.1 cherry ot = ASM_OPER_PSR_UM;
1308 1.1 cherry op = ASM_OP_MOV;
1309 1.1 cherry break;
1310 1.1 cherry case ASM_OP_MOV_RR:
1311 1.1 cherry ot = ASM_OPER_RR;
1312 1.1 cherry op = ASM_OP_MOV;
1313 1.1 cherry break;
1314 1.1 cherry case ASM_OP_NOP_B:
1315 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B);
1316 1.1 cherry op = ASM_OP_NOP;
1317 1.1 cherry break;
1318 1.1 cherry case ASM_OP_NOP_F:
1319 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F);
1320 1.1 cherry op = ASM_OP_NOP;
1321 1.1 cherry break;
1322 1.1 cherry case ASM_OP_NOP_I:
1323 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
1324 1.1 cherry op = ASM_OP_NOP;
1325 1.1 cherry break;
1326 1.1 cherry case ASM_OP_NOP_M:
1327 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
1328 1.1 cherry op = ASM_OP_NOP;
1329 1.1 cherry break;
1330 1.1 cherry case ASM_OP_NOP_X:
1331 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X);
1332 1.1 cherry op = ASM_OP_NOP;
1333 1.1 cherry break;
1334 1.1 cherry case ASM_OP_PACK2_SSS:
1335 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1336 1.1 cherry op = ASM_OP_PACK2;
1337 1.1 cherry break;
1338 1.1 cherry case ASM_OP_PACK2_USS:
1339 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_USS);
1340 1.1 cherry op = ASM_OP_PACK2;
1341 1.1 cherry break;
1342 1.1 cherry case ASM_OP_PACK4_SSS:
1343 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1344 1.1 cherry op = ASM_OP_PACK4;
1345 1.1 cherry break;
1346 1.1 cherry case ASM_OP_PADD1_:
1347 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1348 1.1 cherry op = ASM_OP_PADD1;
1349 1.1 cherry break;
1350 1.1 cherry case ASM_OP_PADD1_SSS:
1351 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1352 1.1 cherry op = ASM_OP_PADD1;
1353 1.1 cherry break;
1354 1.1 cherry case ASM_OP_PADD1_UUS:
1355 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1356 1.1 cherry op = ASM_OP_PADD1;
1357 1.1 cherry break;
1358 1.1 cherry case ASM_OP_PADD1_UUU:
1359 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1360 1.1 cherry op = ASM_OP_PADD1;
1361 1.1 cherry break;
1362 1.1 cherry case ASM_OP_PADD2_:
1363 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1364 1.1 cherry op = ASM_OP_PADD2;
1365 1.1 cherry break;
1366 1.1 cherry case ASM_OP_PADD2_SSS:
1367 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1368 1.1 cherry op = ASM_OP_PADD2;
1369 1.1 cherry break;
1370 1.1 cherry case ASM_OP_PADD2_UUS:
1371 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1372 1.1 cherry op = ASM_OP_PADD2;
1373 1.1 cherry break;
1374 1.1 cherry case ASM_OP_PADD2_UUU:
1375 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1376 1.1 cherry op = ASM_OP_PADD2;
1377 1.1 cherry break;
1378 1.1 cherry case ASM_OP_PAVG1_:
1379 1.1 cherry asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_NONE);
1380 1.1 cherry op = ASM_OP_PAVG1;
1381 1.1 cherry break;
1382 1.1 cherry case ASM_OP_PAVG1_RAZ:
1383 1.1 cherry asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_RAZ);
1384 1.1 cherry op = ASM_OP_PAVG1;
1385 1.1 cherry break;
1386 1.1 cherry case ASM_OP_PAVG2_:
1387 1.1 cherry asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_NONE);
1388 1.1 cherry op = ASM_OP_PAVG2;
1389 1.1 cherry break;
1390 1.1 cherry case ASM_OP_PAVG2_RAZ:
1391 1.1 cherry asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_RAZ);
1392 1.1 cherry op = ASM_OP_PAVG2;
1393 1.1 cherry break;
1394 1.1 cherry case ASM_OP_PCMP1_EQ:
1395 1.1 cherry asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
1396 1.1 cherry op = ASM_OP_PCMP1;
1397 1.1 cherry break;
1398 1.1 cherry case ASM_OP_PCMP1_GT:
1399 1.1 cherry asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
1400 1.1 cherry op = ASM_OP_PCMP1;
1401 1.1 cherry break;
1402 1.1 cherry case ASM_OP_PCMP2_EQ:
1403 1.1 cherry asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
1404 1.1 cherry op = ASM_OP_PCMP2;
1405 1.1 cherry break;
1406 1.1 cherry case ASM_OP_PCMP2_GT:
1407 1.1 cherry asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
1408 1.1 cherry op = ASM_OP_PCMP2;
1409 1.1 cherry break;
1410 1.1 cherry case ASM_OP_PCMP4_EQ:
1411 1.1 cherry asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
1412 1.1 cherry op = ASM_OP_PCMP4;
1413 1.1 cherry break;
1414 1.1 cherry case ASM_OP_PCMP4_GT:
1415 1.1 cherry asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
1416 1.1 cherry op = ASM_OP_PCMP4;
1417 1.1 cherry break;
1418 1.1 cherry case ASM_OP_PMAX1_U:
1419 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1420 1.1 cherry op = ASM_OP_PMAX1;
1421 1.1 cherry break;
1422 1.1 cherry case ASM_OP_PMIN1_U:
1423 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1424 1.1 cherry op = ASM_OP_PMIN1;
1425 1.1 cherry break;
1426 1.1 cherry case ASM_OP_PMPY2_L:
1427 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1428 1.1 cherry op = ASM_OP_PMPY2;
1429 1.1 cherry break;
1430 1.1 cherry case ASM_OP_PMPY2_R:
1431 1.1 cherry asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1432 1.1 cherry op = ASM_OP_PMPY2;
1433 1.1 cherry break;
1434 1.1 cherry case ASM_OP_PMPYSHR2_:
1435 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1436 1.1 cherry op = ASM_OP_PMPYSHR2;
1437 1.1 cherry break;
1438 1.1 cherry case ASM_OP_PMPYSHR2_U:
1439 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1440 1.1 cherry op = ASM_OP_PMPYSHR2;
1441 1.1 cherry break;
1442 1.1 cherry case ASM_OP_PROBE_R:
1443 1.1 cherry asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_R);
1444 1.1 cherry asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_NONE);
1445 1.1 cherry op = ASM_OP_PROBE;
1446 1.1 cherry break;
1447 1.1 cherry case ASM_OP_PROBE_R_FAULT:
1448 1.1 cherry asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_R);
1449 1.1 cherry asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
1450 1.1 cherry op = ASM_OP_PROBE;
1451 1.1 cherry break;
1452 1.1 cherry case ASM_OP_PROBE_RW_FAULT:
1453 1.1 cherry asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_RW);
1454 1.1 cherry asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
1455 1.1 cherry op = ASM_OP_PROBE;
1456 1.1 cherry break;
1457 1.1 cherry case ASM_OP_PROBE_W:
1458 1.1 cherry asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_W);
1459 1.1 cherry asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_NONE);
1460 1.1 cherry op = ASM_OP_PROBE;
1461 1.1 cherry break;
1462 1.1 cherry case ASM_OP_PROBE_W_FAULT:
1463 1.1 cherry asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_W);
1464 1.1 cherry asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
1465 1.1 cherry op = ASM_OP_PROBE;
1466 1.1 cherry break;
1467 1.1 cherry case ASM_OP_PSHR2_:
1468 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1469 1.1 cherry op = ASM_OP_PSHR2;
1470 1.1 cherry break;
1471 1.1 cherry case ASM_OP_PSHR2_U:
1472 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1473 1.1 cherry op = ASM_OP_PSHR2;
1474 1.1 cherry break;
1475 1.1 cherry case ASM_OP_PSHR4_:
1476 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1477 1.1 cherry op = ASM_OP_PSHR4;
1478 1.1 cherry break;
1479 1.1 cherry case ASM_OP_PSHR4_U:
1480 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1481 1.1 cherry op = ASM_OP_PSHR4;
1482 1.1 cherry break;
1483 1.1 cherry case ASM_OP_PSUB1_:
1484 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1485 1.1 cherry op = ASM_OP_PSUB1;
1486 1.1 cherry break;
1487 1.1 cherry case ASM_OP_PSUB1_SSS:
1488 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1489 1.1 cherry op = ASM_OP_PSUB1;
1490 1.1 cherry break;
1491 1.1 cherry case ASM_OP_PSUB1_UUS:
1492 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1493 1.1 cherry op = ASM_OP_PSUB1;
1494 1.1 cherry break;
1495 1.1 cherry case ASM_OP_PSUB1_UUU:
1496 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1497 1.1 cherry op = ASM_OP_PSUB1;
1498 1.1 cherry break;
1499 1.1 cherry case ASM_OP_PSUB2_:
1500 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1501 1.1 cherry op = ASM_OP_PSUB2;
1502 1.1 cherry break;
1503 1.1 cherry case ASM_OP_PSUB2_SSS:
1504 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1505 1.1 cherry op = ASM_OP_PSUB2;
1506 1.1 cherry break;
1507 1.1 cherry case ASM_OP_PSUB2_UUS:
1508 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1509 1.1 cherry op = ASM_OP_PSUB2;
1510 1.1 cherry break;
1511 1.1 cherry case ASM_OP_PSUB2_UUU:
1512 1.1 cherry asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1513 1.1 cherry op = ASM_OP_PSUB2;
1514 1.1 cherry break;
1515 1.1 cherry case ASM_OP_PTC_E:
1516 1.1 cherry asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_E);
1517 1.1 cherry op = ASM_OP_PTC;
1518 1.1 cherry break;
1519 1.1 cherry case ASM_OP_PTC_G:
1520 1.1 cherry asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_G);
1521 1.1 cherry op = ASM_OP_PTC;
1522 1.1 cherry break;
1523 1.1 cherry case ASM_OP_PTC_GA:
1524 1.1 cherry asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_GA);
1525 1.1 cherry op = ASM_OP_PTC;
1526 1.1 cherry break;
1527 1.1 cherry case ASM_OP_PTC_L:
1528 1.1 cherry asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_L);
1529 1.1 cherry op = ASM_OP_PTC;
1530 1.1 cherry break;
1531 1.1 cherry case ASM_OP_PTR_D:
1532 1.1 cherry asm_cmpltr_add(i, ASM_CC_PTR, ASM_CT_D);
1533 1.1 cherry op = ASM_OP_PTR;
1534 1.1 cherry break;
1535 1.1 cherry case ASM_OP_PTR_I:
1536 1.1 cherry asm_cmpltr_add(i, ASM_CC_PTR, ASM_CT_I);
1537 1.1 cherry op = ASM_OP_PTR;
1538 1.1 cherry break;
1539 1.1 cherry case ASM_OP_SETF_D:
1540 1.1 cherry asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_D);
1541 1.1 cherry op = ASM_OP_SETF;
1542 1.1 cherry break;
1543 1.1 cherry case ASM_OP_SETF_EXP:
1544 1.1 cherry asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_EXP);
1545 1.1 cherry op = ASM_OP_SETF;
1546 1.1 cherry break;
1547 1.1 cherry case ASM_OP_SETF_S:
1548 1.1 cherry asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_S);
1549 1.1 cherry op = ASM_OP_SETF;
1550 1.1 cherry break;
1551 1.1 cherry case ASM_OP_SETF_SIG:
1552 1.1 cherry asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_SIG);
1553 1.1 cherry op = ASM_OP_SETF;
1554 1.1 cherry break;
1555 1.1 cherry case ASM_OP_SHR_:
1556 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1557 1.1 cherry op = ASM_OP_SHR;
1558 1.1 cherry break;
1559 1.1 cherry case ASM_OP_SHR_U:
1560 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1561 1.1 cherry op = ASM_OP_SHR;
1562 1.1 cherry break;
1563 1.1 cherry case ASM_OP_SRLZ_D:
1564 1.1 cherry asm_cmpltr_add(i, ASM_CC_SRLZ, ASM_CT_D);
1565 1.1 cherry op = ASM_OP_SRLZ;
1566 1.1 cherry break;
1567 1.1 cherry case ASM_OP_SRLZ_I:
1568 1.1 cherry asm_cmpltr_add(i, ASM_CC_SRLZ, ASM_CT_I);
1569 1.1 cherry op = ASM_OP_SRLZ;
1570 1.1 cherry break;
1571 1.1 cherry case ASM_OP_ST1_:
1572 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1573 1.1 cherry op = ASM_OP_ST1;
1574 1.1 cherry break;
1575 1.1 cherry case ASM_OP_ST1_REL:
1576 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1577 1.1 cherry op = ASM_OP_ST1;
1578 1.1 cherry break;
1579 1.1 cherry case ASM_OP_ST16_:
1580 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1581 1.1 cherry op = ASM_OP_ST16;
1582 1.1 cherry break;
1583 1.1 cherry case ASM_OP_ST16_REL:
1584 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1585 1.1 cherry op = ASM_OP_ST16;
1586 1.1 cherry break;
1587 1.1 cherry case ASM_OP_ST2_:
1588 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1589 1.1 cherry op = ASM_OP_ST2;
1590 1.1 cherry break;
1591 1.1 cherry case ASM_OP_ST2_REL:
1592 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1593 1.1 cherry op = ASM_OP_ST2;
1594 1.1 cherry break;
1595 1.1 cherry case ASM_OP_ST4_:
1596 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1597 1.1 cherry op = ASM_OP_ST4;
1598 1.1 cherry break;
1599 1.1 cherry case ASM_OP_ST4_REL:
1600 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1601 1.1 cherry op = ASM_OP_ST4;
1602 1.1 cherry break;
1603 1.1 cherry case ASM_OP_ST8_:
1604 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1605 1.1 cherry op = ASM_OP_ST8;
1606 1.1 cherry break;
1607 1.1 cherry case ASM_OP_ST8_REL:
1608 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1609 1.1 cherry op = ASM_OP_ST8;
1610 1.1 cherry break;
1611 1.1 cherry case ASM_OP_ST8_SPILL:
1612 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_SPILL);
1613 1.1 cherry op = ASM_OP_ST8;
1614 1.1 cherry break;
1615 1.1 cherry case ASM_OP_STF_SPILL:
1616 1.1 cherry asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_SPILL);
1617 1.1 cherry op = ASM_OP_STF;
1618 1.1 cherry break;
1619 1.1 cherry case ASM_OP_SYNC_I:
1620 1.1 cherry asm_cmpltr_add(i, ASM_CC_SYNC, ASM_CT_I);
1621 1.1 cherry op = ASM_OP_SYNC;
1622 1.1 cherry break;
1623 1.1 cherry case ASM_OP_TBIT_NZ_AND:
1624 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1625 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1626 1.1 cherry op = ASM_OP_TBIT;
1627 1.1 cherry break;
1628 1.1 cherry case ASM_OP_TBIT_NZ_OR:
1629 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1630 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1631 1.1 cherry op = ASM_OP_TBIT;
1632 1.1 cherry break;
1633 1.1 cherry case ASM_OP_TBIT_NZ_OR_ANDCM:
1634 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1635 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1636 1.1 cherry op = ASM_OP_TBIT;
1637 1.1 cherry break;
1638 1.1 cherry case ASM_OP_TBIT_Z:
1639 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1640 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
1641 1.1 cherry op = ASM_OP_TBIT;
1642 1.1 cherry break;
1643 1.1 cherry case ASM_OP_TBIT_Z_AND:
1644 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1645 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1646 1.1 cherry op = ASM_OP_TBIT;
1647 1.1 cherry break;
1648 1.1 cherry case ASM_OP_TBIT_Z_OR:
1649 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1650 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1651 1.1 cherry op = ASM_OP_TBIT;
1652 1.1 cherry break;
1653 1.1 cherry case ASM_OP_TBIT_Z_OR_ANDCM:
1654 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1655 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1656 1.1 cherry op = ASM_OP_TBIT;
1657 1.1 cherry break;
1658 1.1 cherry case ASM_OP_TBIT_Z_UNC:
1659 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1660 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
1661 1.1 cherry op = ASM_OP_TBIT;
1662 1.1 cherry break;
1663 1.2.30.1 skrll case ASM_OP_TF_NZ_AND:
1664 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1665 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1666 1.2.30.1 skrll op = ASM_OP_TF;
1667 1.2.30.1 skrll break;
1668 1.2.30.1 skrll case ASM_OP_TF_NZ_OR:
1669 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1670 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1671 1.2.30.1 skrll op = ASM_OP_TF;
1672 1.2.30.1 skrll break;
1673 1.2.30.1 skrll case ASM_OP_TF_NZ_OR_ANDCM:
1674 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1675 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1676 1.2.30.1 skrll op = ASM_OP_TF;
1677 1.2.30.1 skrll break;
1678 1.2.30.1 skrll case ASM_OP_TF_Z:
1679 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1680 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
1681 1.2.30.1 skrll op = ASM_OP_TF;
1682 1.2.30.1 skrll break;
1683 1.2.30.1 skrll case ASM_OP_TF_Z_AND:
1684 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1685 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1686 1.2.30.1 skrll op = ASM_OP_TF;
1687 1.2.30.1 skrll break;
1688 1.2.30.1 skrll case ASM_OP_TF_Z_OR:
1689 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1690 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1691 1.2.30.1 skrll op = ASM_OP_TF;
1692 1.2.30.1 skrll break;
1693 1.2.30.1 skrll case ASM_OP_TF_Z_OR_ANDCM:
1694 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1695 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1696 1.2.30.1 skrll op = ASM_OP_TF;
1697 1.2.30.1 skrll break;
1698 1.2.30.1 skrll case ASM_OP_TF_Z_UNC:
1699 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1700 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
1701 1.2.30.1 skrll op = ASM_OP_TF;
1702 1.2.30.1 skrll break;
1703 1.1 cherry case ASM_OP_TNAT_NZ_AND:
1704 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1705 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1706 1.1 cherry op = ASM_OP_TNAT;
1707 1.1 cherry break;
1708 1.1 cherry case ASM_OP_TNAT_NZ_OR:
1709 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1710 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1711 1.1 cherry op = ASM_OP_TNAT;
1712 1.1 cherry break;
1713 1.1 cherry case ASM_OP_TNAT_NZ_OR_ANDCM:
1714 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1715 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1716 1.1 cherry op = ASM_OP_TNAT;
1717 1.1 cherry break;
1718 1.1 cherry case ASM_OP_TNAT_Z:
1719 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1720 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
1721 1.1 cherry op = ASM_OP_TNAT;
1722 1.1 cherry break;
1723 1.1 cherry case ASM_OP_TNAT_Z_AND:
1724 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1725 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1726 1.1 cherry op = ASM_OP_TNAT;
1727 1.1 cherry break;
1728 1.1 cherry case ASM_OP_TNAT_Z_OR:
1729 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1730 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1731 1.1 cherry op = ASM_OP_TNAT;
1732 1.1 cherry break;
1733 1.1 cherry case ASM_OP_TNAT_Z_OR_ANDCM:
1734 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1735 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1736 1.1 cherry op = ASM_OP_TNAT;
1737 1.1 cherry break;
1738 1.1 cherry case ASM_OP_TNAT_Z_UNC:
1739 1.1 cherry asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1740 1.1 cherry asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
1741 1.1 cherry op = ASM_OP_TNAT;
1742 1.1 cherry break;
1743 1.1 cherry case ASM_OP_UNPACK1_H:
1744 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
1745 1.1 cherry op = ASM_OP_UNPACK1;
1746 1.1 cherry break;
1747 1.1 cherry case ASM_OP_UNPACK1_L:
1748 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
1749 1.1 cherry op = ASM_OP_UNPACK1;
1750 1.1 cherry break;
1751 1.1 cherry case ASM_OP_UNPACK2_H:
1752 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
1753 1.1 cherry op = ASM_OP_UNPACK2;
1754 1.1 cherry break;
1755 1.1 cherry case ASM_OP_UNPACK2_L:
1756 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
1757 1.1 cherry op = ASM_OP_UNPACK2;
1758 1.1 cherry break;
1759 1.1 cherry case ASM_OP_UNPACK4_H:
1760 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
1761 1.1 cherry op = ASM_OP_UNPACK4;
1762 1.1 cherry break;
1763 1.1 cherry case ASM_OP_UNPACK4_L:
1764 1.1 cherry asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
1765 1.1 cherry op = ASM_OP_UNPACK4;
1766 1.1 cherry break;
1767 1.2.30.1 skrll case ASM_OP_VMSW_0:
1768 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_VMSW, ASM_CT_0);
1769 1.2.30.1 skrll op = ASM_OP_VMSW;
1770 1.2.30.1 skrll break;
1771 1.2.30.1 skrll case ASM_OP_VMSW_1:
1772 1.2.30.1 skrll asm_cmpltr_add(i, ASM_CC_VMSW, ASM_CT_1);
1773 1.2.30.1 skrll op = ASM_OP_VMSW;
1774 1.2.30.1 skrll break;
1775 1.1 cherry case ASM_OP_XMA_H:
1776 1.1 cherry asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_H);
1777 1.1 cherry op = ASM_OP_XMA;
1778 1.1 cherry break;
1779 1.1 cherry case ASM_OP_XMA_HU:
1780 1.1 cherry asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_HU);
1781 1.1 cherry op = ASM_OP_XMA;
1782 1.1 cherry break;
1783 1.1 cherry case ASM_OP_XMA_L:
1784 1.1 cherry asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_L);
1785 1.1 cherry op = ASM_OP_XMA;
1786 1.1 cherry break;
1787 1.1 cherry default:
1788 1.1 cherry KASSERT(op < ASM_OP_NUMBER_OF_OPCODES);
1789 1.1 cherry break;
1790 1.1 cherry }
1791 1.1 cherry i->i_op = op;
1792 1.1 cherry return (ot);
1793 1.1 cherry }
1794 1.1 cherry
1795 1.1 cherry static __inline void
1796 1.1 cherry op_imm(struct asm_inst *i, int op, uint64_t val)
1797 1.1 cherry {
1798 1.1 cherry i->i_oper[op].o_type = ASM_OPER_IMM;
1799 1.1 cherry i->i_oper[op].o_value = val;
1800 1.1 cherry }
1801 1.1 cherry
1802 1.1 cherry static __inline void
1803 1.1 cherry op_type(struct asm_inst *i, int op, enum asm_oper_type ot)
1804 1.1 cherry {
1805 1.1 cherry i->i_oper[op].o_type = ot;
1806 1.1 cherry }
1807 1.1 cherry
1808 1.1 cherry static __inline void
1809 1.1 cherry op_value(struct asm_inst *i, int op, uint64_t val)
1810 1.1 cherry {
1811 1.1 cherry i->i_oper[op].o_value = val;
1812 1.1 cherry }
1813 1.1 cherry
1814 1.1 cherry static __inline void
1815 1.1 cherry operand(struct asm_inst *i, int op, enum asm_oper_type ot, uint64_t bits,
1816 1.1 cherry int o, int l)
1817 1.1 cherry {
1818 1.1 cherry i->i_oper[op].o_type = ot;
1819 1.1 cherry i->i_oper[op].o_value = FIELD(bits, o, l);
1820 1.1 cherry }
1821 1.1 cherry
1822 1.1 cherry static uint64_t
1823 1.1 cherry imm(uint64_t bits, int sign, int o, int l)
1824 1.1 cherry {
1825 1.1 cherry uint64_t val = FIELD(bits, o, l);
1826 1.1 cherry
1827 1.1 cherry if (sign && (val & (1LL << (l - 1))) != 0)
1828 1.1 cherry val |= -1LL << l;
1829 1.1 cherry return (val);
1830 1.1 cherry }
1831 1.1 cherry
1832 1.1 cherry static void
1833 1.1 cherry s_imm(struct asm_inst *i, int op, uint64_t bits, int o, int l)
1834 1.1 cherry {
1835 1.1 cherry i->i_oper[op].o_type = ASM_OPER_IMM;
1836 1.1 cherry i->i_oper[op].o_value = imm(bits, 1, o, l);
1837 1.1 cherry }
1838 1.1 cherry
1839 1.1 cherry static void
1840 1.1 cherry u_imm(struct asm_inst *i, int op, uint64_t bits, int o, int l)
1841 1.1 cherry {
1842 1.1 cherry i->i_oper[op].o_type = ASM_OPER_IMM;
1843 1.1 cherry i->i_oper[op].o_value = imm(bits, 0, o, l);
1844 1.1 cherry }
1845 1.1 cherry
1846 1.1 cherry static uint64_t
1847 1.1 cherry vimm(uint64_t bits, int sign, va_list ap)
1848 1.1 cherry {
1849 1.1 cherry uint64_t val = 0;
1850 1.1 cherry int len = 0;
1851 1.1 cherry int frag;
1852 1.1 cherry
1853 1.1 cherry while ((frag = va_arg(ap, int)) != 0) {
1854 1.1 cherry val |= (uint64_t)FIELD(bits, FRAG_OFS(frag), FRAG_LEN(frag))
1855 1.1 cherry << len;
1856 1.1 cherry len += FRAG_LEN(frag);
1857 1.1 cherry }
1858 1.1 cherry if (sign && (val & (1LL << (len - 1))) != 0)
1859 1.1 cherry val |= -1LL << len;
1860 1.1 cherry return (val);
1861 1.1 cherry }
1862 1.1 cherry
1863 1.1 cherry static void
1864 1.1 cherry s_immf(struct asm_inst *i, int op, uint64_t bits, ...)
1865 1.1 cherry {
1866 1.1 cherry va_list ap;
1867 1.1 cherry va_start(ap, bits);
1868 1.1 cherry i->i_oper[op].o_type = ASM_OPER_IMM;
1869 1.1 cherry i->i_oper[op].o_value = vimm(bits, 1, ap);
1870 1.1 cherry va_end(ap);
1871 1.1 cherry }
1872 1.1 cherry
1873 1.1 cherry static void
1874 1.1 cherry u_immf(struct asm_inst *i, int op, uint64_t bits, ...)
1875 1.1 cherry {
1876 1.1 cherry va_list ap;
1877 1.1 cherry va_start(ap, bits);
1878 1.1 cherry i->i_oper[op].o_type = ASM_OPER_IMM;
1879 1.1 cherry i->i_oper[op].o_value = vimm(bits, 0, ap);
1880 1.1 cherry va_end(ap);
1881 1.1 cherry }
1882 1.1 cherry
1883 1.1 cherry static void
1884 1.1 cherry disp(struct asm_inst *i, int op, uint64_t bits, ...)
1885 1.1 cherry {
1886 1.1 cherry va_list ap;
1887 1.1 cherry va_start(ap, bits);
1888 1.1 cherry i->i_oper[op].o_type = ASM_OPER_DISP;
1889 1.1 cherry i->i_oper[op].o_value = vimm(bits, 1, ap) << 4;
1890 1.1 cherry va_end(ap);
1891 1.1 cherry }
1892 1.1 cherry
1893 1.1 cherry static __inline void
1894 1.1 cherry combine(uint64_t *dst, int dl, uint64_t src, int sl, int so)
1895 1.1 cherry {
1896 1.1 cherry *dst = (*dst & ((1LL << dl) - 1LL)) |
1897 1.1 cherry ((uint64_t)_FLD64(src, so, sl) << dl);
1898 1.1 cherry }
1899 1.1 cherry
1900 1.1 cherry int
1901 1.1 cherry asm_extract(enum asm_op op, enum asm_fmt fmt, uint64_t bits,
1902 1.1 cherry struct asm_bundle *b, int slot)
1903 1.1 cherry {
1904 1.1 cherry struct asm_inst *i = b->b_inst + slot;
1905 1.1 cherry enum asm_oper_type ot;
1906 1.1 cherry
1907 1.1 cherry KASSERT(op != ASM_OP_NONE);
1908 1.1 cherry i->i_bits = bits;
1909 1.1 cherry i->i_format = fmt;
1910 1.1 cherry i->i_srcidx = 2;
1911 1.1 cherry
1912 1.1 cherry ot = asm_normalize(i, op);
1913 1.1 cherry
1914 1.1 cherry if (fmt != ASM_FMT_B6 && fmt != ASM_FMT_B7)
1915 1.1 cherry operand(i, 0, ASM_OPER_PREG, bits, 0, 6);
1916 1.1 cherry
1917 1.1 cherry switch (fmt) {
1918 1.1 cherry case ASM_FMT_A1:
1919 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1920 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1921 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1922 1.1 cherry if ((op == ASM_OP_ADD && FIELD(bits, 27, 2) == 1) ||
1923 1.1 cherry (op == ASM_OP_SUB && FIELD(bits, 27, 2) == 0))
1924 1.1 cherry op_imm(i, 4, 1LL);
1925 1.1 cherry break;
1926 1.1 cherry case ASM_FMT_A2:
1927 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1928 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1929 1.1 cherry op_imm(i, 3, 1LL + FIELD(bits, 27, 2));
1930 1.1 cherry operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1931 1.1 cherry break;
1932 1.1 cherry case ASM_FMT_A3:
1933 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1934 1.1 cherry s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
1935 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1936 1.1 cherry break;
1937 1.1 cherry case ASM_FMT_A4:
1938 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1939 1.1 cherry s_immf(i, 2, bits, FRAG(13,7), FRAG(27,6), FRAG(36,1), 0);
1940 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1941 1.1 cherry break;
1942 1.1 cherry case ASM_FMT_A5:
1943 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1944 1.1 cherry s_immf(i, 2, bits, FRAG(13,7), FRAG(27,9), FRAG(22,5),
1945 1.1 cherry FRAG(36,1), 0);
1946 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 2);
1947 1.1 cherry break;
1948 1.1 cherry case ASM_FMT_A6: /* 2 dst */
1949 1.1 cherry operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
1950 1.1 cherry operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
1951 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
1952 1.1 cherry operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1953 1.1 cherry i->i_srcidx++;
1954 1.1 cherry break;
1955 1.1 cherry case ASM_FMT_A7: /* 2 dst */
1956 1.1 cherry if (FIELD(bits, 13, 7) != 0)
1957 1.1 cherry return (0);
1958 1.1 cherry operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
1959 1.1 cherry operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
1960 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
1961 1.1 cherry operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1962 1.1 cherry i->i_srcidx++;
1963 1.1 cherry break;
1964 1.1 cherry case ASM_FMT_A8: /* 2 dst */
1965 1.1 cherry operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
1966 1.1 cherry operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
1967 1.1 cherry s_immf(i, 3, bits, FRAG(13,7), FRAG(36,1), 0);
1968 1.1 cherry operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1969 1.1 cherry i->i_srcidx++;
1970 1.1 cherry break;
1971 1.1 cherry case ASM_FMT_A9:
1972 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1973 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1974 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1975 1.1 cherry break;
1976 1.1 cherry case ASM_FMT_A10:
1977 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1978 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1979 1.1 cherry op_imm(i, 3, 1LL + FIELD(bits, 27, 2));
1980 1.1 cherry operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1981 1.1 cherry break;
1982 1.1 cherry case ASM_FMT_B1: /* 0 dst */
1983 1.1 cherry asm_brhint(i);
1984 1.1 cherry disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
1985 1.1 cherry break;
1986 1.1 cherry case ASM_FMT_B2: /* 0 dst */
1987 1.1 cherry if (FIELD(bits, 0, 6) != 0)
1988 1.1 cherry return (0);
1989 1.1 cherry asm_brhint(i);
1990 1.1 cherry disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
1991 1.1 cherry break;
1992 1.1 cherry case ASM_FMT_B3:
1993 1.1 cherry asm_brhint(i);
1994 1.1 cherry operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
1995 1.1 cherry disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
1996 1.1 cherry break;
1997 1.1 cherry case ASM_FMT_B4: /* 0 dst */
1998 1.1 cherry asm_brhint(i);
1999 1.1 cherry operand(i, 1, ASM_OPER_BREG, bits, 13, 3);
2000 1.1 cherry break;
2001 1.1 cherry case ASM_FMT_B5:
2002 1.1 cherry #if 0
2003 1.1 cherry if (FIELD(bits, 32, 1) == 0)
2004 1.1 cherry return (0);
2005 1.1 cherry #endif
2006 1.1 cherry asm_brhint(i);
2007 1.1 cherry operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
2008 1.1 cherry operand(i, 2, ASM_OPER_BREG, bits, 13, 3);
2009 1.1 cherry break;
2010 1.1 cherry case ASM_FMT_B6: /* 0 dst */
2011 1.1 cherry asm_brphint(i);
2012 1.1 cherry disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
2013 1.1 cherry disp(i, 2, bits, FRAG(6,7), FRAG(33,2), 0);
2014 1.1 cherry i->i_srcidx--;
2015 1.1 cherry break;
2016 1.1 cherry case ASM_FMT_B7: /* 0 dst */
2017 1.1 cherry asm_brphint(i);
2018 1.1 cherry operand(i, 1, ASM_OPER_BREG, bits, 13, 3);
2019 1.1 cherry disp(i, 2, bits, FRAG(6,7), FRAG(33,2), 0);
2020 1.1 cherry i->i_srcidx--;
2021 1.1 cherry break;
2022 1.1 cherry case ASM_FMT_B8:
2023 1.1 cherry /* no operands */
2024 1.1 cherry break;
2025 1.1 cherry case ASM_FMT_B9: /* 0 dst */
2026 1.1 cherry u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2027 1.1 cherry break;
2028 1.1 cherry case ASM_FMT_F1:
2029 1.1 cherry asm_sf(i);
2030 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2031 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2032 1.1 cherry operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2033 1.1 cherry operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
2034 1.1 cherry break;
2035 1.1 cherry case ASM_FMT_F2:
2036 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2037 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2038 1.1 cherry operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2039 1.1 cherry operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
2040 1.1 cherry break;
2041 1.1 cherry case ASM_FMT_F3:
2042 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2043 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2044 1.1 cherry operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2045 1.1 cherry operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
2046 1.1 cherry break;
2047 1.1 cherry case ASM_FMT_F4: /* 2 dst */
2048 1.1 cherry if (FIELD(bits, 33, 1)) { /* ra */
2049 1.1 cherry if (FIELD(bits, 36, 1)) /* rb */
2050 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_UNORD);
2051 1.1 cherry else
2052 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LE);
2053 1.1 cherry } else {
2054 1.1 cherry if (FIELD(bits, 36, 1)) /* rb */
2055 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LT);
2056 1.1 cherry else
2057 1.1 cherry asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_EQ);
2058 1.1 cherry }
2059 1.1 cherry if (FIELD(bits, 12, 1)) /* ta */
2060 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCTYPE, ASM_CT_UNC);
2061 1.1 cherry else
2062 1.1 cherry asm_cmpltr_add(i, ASM_CC_FCTYPE, ASM_CT_NONE);
2063 1.1 cherry asm_sf(i);
2064 1.1 cherry operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2065 1.1 cherry operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2066 1.1 cherry operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
2067 1.1 cherry operand(i, 4, ASM_OPER_FREG, bits, 20, 7);
2068 1.1 cherry i->i_srcidx++;
2069 1.1 cherry break;
2070 1.1 cherry case ASM_FMT_F5: /* 2 dst */
2071 1.1 cherry operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2072 1.1 cherry operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2073 1.1 cherry operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
2074 1.1 cherry u_immf(i, 4, bits, FRAG(33,2), FRAG(20,7), 0);
2075 1.1 cherry i->i_srcidx++;
2076 1.1 cherry break;
2077 1.1 cherry case ASM_FMT_F6: /* 2 dst */
2078 1.1 cherry asm_sf(i);
2079 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2080 1.1 cherry operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2081 1.1 cherry operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
2082 1.1 cherry operand(i, 4, ASM_OPER_FREG, bits, 20, 7);
2083 1.1 cherry i->i_srcidx++;
2084 1.1 cherry break;
2085 1.1 cherry case ASM_FMT_F7: /* 2 dst */
2086 1.1 cherry asm_sf(i);
2087 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2088 1.1 cherry operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2089 1.1 cherry operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2090 1.1 cherry i->i_srcidx++;
2091 1.1 cherry break;
2092 1.1 cherry case ASM_FMT_F8:
2093 1.1 cherry asm_sf(i);
2094 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2095 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2096 1.1 cherry operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2097 1.1 cherry break;
2098 1.1 cherry case ASM_FMT_F9:
2099 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2100 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2101 1.1 cherry operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2102 1.1 cherry break;
2103 1.1 cherry case ASM_FMT_F10:
2104 1.1 cherry asm_sf(i);
2105 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2106 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2107 1.1 cherry break;
2108 1.1 cherry case ASM_FMT_F11:
2109 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2110 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2111 1.1 cherry break;
2112 1.1 cherry case ASM_FMT_F12: /* 0 dst */
2113 1.1 cherry asm_sf(i);
2114 1.1 cherry u_imm(i, 1, bits, 13, 7);
2115 1.1 cherry u_imm(i, 2, bits, 20, 7);
2116 1.1 cherry i->i_srcidx--;
2117 1.1 cherry break;
2118 1.1 cherry case ASM_FMT_F13:
2119 1.1 cherry asm_sf(i);
2120 1.1 cherry /* no operands */
2121 1.1 cherry break;
2122 1.1 cherry case ASM_FMT_F14: /* 0 dst */
2123 1.1 cherry asm_sf(i);
2124 1.1 cherry disp(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2125 1.1 cherry break;
2126 1.1 cherry case ASM_FMT_F15: /* 0 dst */
2127 1.1 cherry u_imm(i, 1, bits, 6, 20);
2128 1.1 cherry break;
2129 1.2.30.1 skrll case ASM_FMT_F16: /* 0 dst */
2130 1.2.30.1 skrll u_imm(i, 1, bits, 6, 20);
2131 1.2.30.1 skrll break;
2132 1.1 cherry case ASM_FMT_I1:
2133 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2134 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2135 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2136 1.1 cherry switch (FIELD(bits, 30, 2)) {
2137 1.1 cherry case 0: op_imm(i, 4, 0LL); break;
2138 1.1 cherry case 1: op_imm(i, 4, 7LL); break;
2139 1.1 cherry case 2: op_imm(i, 4, 15LL); break;
2140 1.1 cherry case 3: op_imm(i, 4, 16LL); break;
2141 1.1 cherry }
2142 1.1 cherry break;
2143 1.1 cherry case ASM_FMT_I2:
2144 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2145 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2146 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2147 1.1 cherry break;
2148 1.1 cherry case ASM_FMT_I3:
2149 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2150 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2151 1.1 cherry u_imm(i, 3, bits, 20, 4);
2152 1.1 cherry break;
2153 1.1 cherry case ASM_FMT_I4:
2154 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2155 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2156 1.1 cherry u_imm(i, 3, bits, 20, 8);
2157 1.1 cherry break;
2158 1.1 cherry case ASM_FMT_I5:
2159 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2160 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2161 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2162 1.1 cherry break;
2163 1.1 cherry case ASM_FMT_I6:
2164 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2165 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2166 1.1 cherry u_imm(i, 3, bits, 14, 5);
2167 1.1 cherry break;
2168 1.1 cherry case ASM_FMT_I7:
2169 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2170 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2171 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2172 1.1 cherry break;
2173 1.1 cherry case ASM_FMT_I8:
2174 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2175 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2176 1.1 cherry op_imm(i, 3, 31LL - FIELD(bits, 20, 5));
2177 1.1 cherry break;
2178 1.1 cherry case ASM_FMT_I9:
2179 1.1 cherry if (FIELD(bits, 13, 7) != 0)
2180 1.1 cherry return (0);
2181 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2182 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2183 1.1 cherry break;
2184 1.1 cherry case ASM_FMT_I10:
2185 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2186 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2187 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2188 1.1 cherry u_imm(i, 4, bits, 27, 6);
2189 1.1 cherry break;
2190 1.1 cherry case ASM_FMT_I11:
2191 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2192 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2193 1.1 cherry u_imm(i, 3, bits, 14, 6);
2194 1.1 cherry op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
2195 1.1 cherry break;
2196 1.1 cherry case ASM_FMT_I12:
2197 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2198 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2199 1.1 cherry op_imm(i, 3, 63LL - FIELD(bits, 20, 6));
2200 1.1 cherry op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
2201 1.1 cherry break;
2202 1.1 cherry case ASM_FMT_I13:
2203 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2204 1.1 cherry s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
2205 1.1 cherry op_imm(i, 3, 63LL - FIELD(bits, 20, 6));
2206 1.1 cherry op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
2207 1.1 cherry break;
2208 1.1 cherry case ASM_FMT_I14:
2209 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2210 1.1 cherry s_imm(i, 2, bits, 36, 1);
2211 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2212 1.1 cherry op_imm(i, 4, 63LL - FIELD(bits, 14, 6));
2213 1.1 cherry op_imm(i, 5, 1LL + FIELD(bits, 27, 6));
2214 1.1 cherry break;
2215 1.1 cherry case ASM_FMT_I15:
2216 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2217 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2218 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2219 1.1 cherry op_imm(i, 4, 63LL - FIELD(bits, 31, 6));
2220 1.1 cherry op_imm(i, 5, 1LL + FIELD(bits, 27, 4));
2221 1.1 cherry break;
2222 1.1 cherry case ASM_FMT_I16: /* 2 dst */
2223 1.1 cherry operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2224 1.1 cherry operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2225 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2226 1.1 cherry u_imm(i, 4, bits, 14, 6);
2227 1.1 cherry i->i_srcidx++;
2228 1.1 cherry break;
2229 1.1 cherry case ASM_FMT_I17: /* 2 dst */
2230 1.1 cherry operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2231 1.1 cherry operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2232 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2233 1.1 cherry i->i_srcidx++;
2234 1.1 cherry break;
2235 1.2.30.1 skrll case ASM_FMT_I18:
2236 1.2.30.1 skrll u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2237 1.2.30.1 skrll break;
2238 1.1 cherry case ASM_FMT_I19:
2239 1.1 cherry u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2240 1.1 cherry break;
2241 1.1 cherry case ASM_FMT_I20: /* 0 dst */
2242 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
2243 1.1 cherry disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
2244 1.1 cherry i->i_srcidx--;
2245 1.1 cherry break;
2246 1.1 cherry case ASM_FMT_I21:
2247 1.1 cherry switch (FIELD(bits, 20, 2)) { /* wh */
2248 1.1 cherry case 0: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_SPTK); break;
2249 1.1 cherry case 1: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_NONE); break;
2250 1.1 cherry case 2: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_DPTK); break;
2251 1.1 cherry case 3: return (0);
2252 1.1 cherry }
2253 1.1 cherry if (FIELD(bits, 23, 1)) /* ih */
2254 1.1 cherry asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_IMP);
2255 1.1 cherry else
2256 1.1 cherry asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_NONE);
2257 1.1 cherry operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
2258 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2259 1.1 cherry disp(i, 3, bits, FRAG(24,9), 0);
2260 1.1 cherry break;
2261 1.1 cherry case ASM_FMT_I22:
2262 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2263 1.1 cherry operand(i, 2, ASM_OPER_BREG, bits, 13, 3);
2264 1.1 cherry break;
2265 1.1 cherry case ASM_FMT_I23:
2266 1.1 cherry op_type(i, 1, ASM_OPER_PR);
2267 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2268 1.1 cherry u_immf(i, 3, bits, FRAG(6,7), FRAG(24,8), FRAG(36,1), 0);
2269 1.1 cherry i->i_oper[3].o_value <<= 1;
2270 1.1 cherry break;
2271 1.1 cherry case ASM_FMT_I24:
2272 1.1 cherry op_type(i, 1, ASM_OPER_PR_ROT);
2273 1.1 cherry s_immf(i, 2, bits, FRAG(6,27), FRAG(36,1), 0);
2274 1.1 cherry break;
2275 1.1 cherry case ASM_FMT_I25:
2276 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2277 1.1 cherry op_type(i, 2, ot);
2278 1.1 cherry break;
2279 1.1 cherry case ASM_FMT_I26:
2280 1.1 cherry operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2281 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2282 1.1 cherry break;
2283 1.1 cherry case ASM_FMT_I27:
2284 1.1 cherry operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2285 1.1 cherry s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
2286 1.1 cherry break;
2287 1.1 cherry case ASM_FMT_I28:
2288 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2289 1.1 cherry operand(i, 2, ASM_OPER_AREG, bits, 20, 7);
2290 1.1 cherry break;
2291 1.1 cherry case ASM_FMT_I29:
2292 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2293 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2294 1.1 cherry break;
2295 1.2.30.1 skrll case ASM_FMT_I30: /* 2 dst */
2296 1.2.30.1 skrll operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2297 1.2.30.1 skrll operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2298 1.2.30.1 skrll op_imm(i, 3, 32LL + FIELD(bits, 14, 5));
2299 1.2.30.1 skrll i->i_srcidx++;
2300 1.2.30.1 skrll break;
2301 1.1 cherry case ASM_FMT_M1:
2302 1.1 cherry asm_hint(i, ASM_CC_LDHINT);
2303 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2304 1.1 cherry if (i->i_op == ASM_OP_LD16) {
2305 1.1 cherry op_type(i, 2, ASM_OPER_AREG);
2306 1.1 cherry op_value(i, 2, AR_CSD);
2307 1.1 cherry i->i_srcidx++;
2308 1.1 cherry }
2309 1.1 cherry operand(i, i->i_srcidx, ASM_OPER_MEM, bits, 20, 7);
2310 1.1 cherry break;
2311 1.1 cherry case ASM_FMT_M2:
2312 1.1 cherry asm_hint(i, ASM_CC_LDHINT);
2313 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2314 1.1 cherry operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2315 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2316 1.1 cherry break;
2317 1.1 cherry case ASM_FMT_M3:
2318 1.1 cherry asm_hint(i, ASM_CC_LDHINT);
2319 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2320 1.1 cherry operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2321 1.1 cherry s_immf(i, 3, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
2322 1.1 cherry break;
2323 1.1 cherry case ASM_FMT_M4:
2324 1.1 cherry asm_hint(i, ASM_CC_STHINT);
2325 1.1 cherry operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2326 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2327 1.1 cherry if (i->i_op == ASM_OP_ST16) {
2328 1.1 cherry op_type(i, 3, ASM_OPER_AREG);
2329 1.1 cherry op_value(i, 3, AR_CSD);
2330 1.1 cherry }
2331 1.1 cherry break;
2332 1.1 cherry case ASM_FMT_M5:
2333 1.1 cherry asm_hint(i, ASM_CC_STHINT);
2334 1.1 cherry operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2335 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2336 1.1 cherry s_immf(i, 3, bits, FRAG(6,7), FRAG(27,1), FRAG(36,1), 0);
2337 1.1 cherry break;
2338 1.1 cherry case ASM_FMT_M6:
2339 1.1 cherry asm_hint(i, ASM_CC_LDHINT);
2340 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2341 1.1 cherry operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2342 1.1 cherry break;
2343 1.1 cherry case ASM_FMT_M7:
2344 1.1 cherry asm_hint(i, ASM_CC_LDHINT);
2345 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2346 1.1 cherry operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2347 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2348 1.1 cherry break;
2349 1.1 cherry case ASM_FMT_M8:
2350 1.1 cherry asm_hint(i, ASM_CC_LDHINT);
2351 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2352 1.1 cherry operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2353 1.1 cherry s_immf(i, 3, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
2354 1.1 cherry break;
2355 1.1 cherry case ASM_FMT_M9:
2356 1.1 cherry asm_hint(i, ASM_CC_STHINT);
2357 1.1 cherry operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2358 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2359 1.1 cherry break;
2360 1.1 cherry case ASM_FMT_M10:
2361 1.1 cherry asm_hint(i, ASM_CC_STHINT);
2362 1.1 cherry operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2363 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2364 1.1 cherry s_immf(i, 3, bits, FRAG(6,7), FRAG(27,1), FRAG(36,1), 0);
2365 1.1 cherry break;
2366 1.1 cherry case ASM_FMT_M11: /* 2 dst */
2367 1.1 cherry asm_hint(i, ASM_CC_LDHINT);
2368 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2369 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2370 1.1 cherry operand(i, 3, ASM_OPER_MEM, bits, 20, 7);
2371 1.1 cherry i->i_srcidx++;
2372 1.1 cherry break;
2373 1.1 cherry case ASM_FMT_M12: /* 2 dst */
2374 1.1 cherry asm_hint(i, ASM_CC_LDHINT);
2375 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2376 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2377 1.1 cherry operand(i, 3, ASM_OPER_MEM, bits, 20, 7);
2378 1.1 cherry op_imm(i, 4, 8LL << FIELD(bits, 30, 1));
2379 1.1 cherry i->i_srcidx++;
2380 1.1 cherry break;
2381 1.1 cherry case ASM_FMT_M13:
2382 1.1 cherry asm_hint(i, ASM_CC_LFHINT);
2383 1.1 cherry operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2384 1.1 cherry break;
2385 1.1 cherry case ASM_FMT_M14: /* 0 dst */
2386 1.1 cherry asm_hint(i, ASM_CC_LFHINT);
2387 1.1 cherry operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2388 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2389 1.1 cherry i->i_srcidx--;
2390 1.1 cherry break;
2391 1.1 cherry case ASM_FMT_M15: /* 0 dst */
2392 1.1 cherry asm_hint(i, ASM_CC_LFHINT);
2393 1.1 cherry operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2394 1.1 cherry s_immf(i, 2, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
2395 1.1 cherry i->i_srcidx--;
2396 1.1 cherry break;
2397 1.2.30.1 skrll case ASM_FMT_M16:
2398 1.1 cherry asm_hint(i, ASM_CC_LDHINT);
2399 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2400 1.1 cherry operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2401 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2402 1.1 cherry if (i->i_op == ASM_OP_CMP8XCHG16) {
2403 1.1 cherry op_type(i, 4, ASM_OPER_AREG);
2404 1.1 cherry op_value(i, 4, AR_CSD);
2405 1.2.30.1 skrll op_type(i, 5, ASM_OPER_AREG);
2406 1.2.30.1 skrll op_value(i, 5, AR_CCV);
2407 1.2.30.1 skrll } else {
2408 1.2.30.1 skrll if (FIELD(bits, 30, 6) < 8) {
2409 1.2.30.1 skrll op_type(i, 4, ASM_OPER_AREG);
2410 1.2.30.1 skrll op_value(i, 4, AR_CCV);
2411 1.2.30.1 skrll }
2412 1.1 cherry }
2413 1.1 cherry break;
2414 1.1 cherry case ASM_FMT_M17:
2415 1.1 cherry asm_hint(i, ASM_CC_LDHINT);
2416 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2417 1.1 cherry operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2418 1.1 cherry switch (FIELD(bits, 13, 2)) {
2419 1.1 cherry case 0: op_imm(i, 3, 1LL << 4); break;
2420 1.1 cherry case 1: op_imm(i, 3, 1LL << 3); break;
2421 1.1 cherry case 2: op_imm(i, 3, 1LL << 2); break;
2422 1.1 cherry case 3: op_imm(i, 3, 1LL); break;
2423 1.1 cherry }
2424 1.1 cherry if (FIELD(bits, 15, 1))
2425 1.1 cherry i->i_oper[3].o_value *= -1LL;
2426 1.1 cherry break;
2427 1.1 cherry case ASM_FMT_M18:
2428 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2429 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2430 1.1 cherry break;
2431 1.1 cherry case ASM_FMT_M19:
2432 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2433 1.1 cherry operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2434 1.1 cherry break;
2435 1.1 cherry case ASM_FMT_M20: /* 0 dst */
2436 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
2437 1.1 cherry disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
2438 1.1 cherry i->i_srcidx--;
2439 1.1 cherry break;
2440 1.1 cherry case ASM_FMT_M21: /* 0 dst */
2441 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 13, 7);
2442 1.1 cherry disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
2443 1.1 cherry i->i_srcidx--;
2444 1.1 cherry break;
2445 1.1 cherry case ASM_FMT_M22: /* 0 dst */
2446 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2447 1.1 cherry disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
2448 1.1 cherry i->i_srcidx--;
2449 1.1 cherry break;
2450 1.1 cherry case ASM_FMT_M23: /* 0 dst */
2451 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2452 1.1 cherry disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
2453 1.1 cherry i->i_srcidx--;
2454 1.1 cherry break;
2455 1.1 cherry case ASM_FMT_M24:
2456 1.1 cherry /* no operands */
2457 1.1 cherry break;
2458 1.1 cherry case ASM_FMT_M25:
2459 1.1 cherry if (FIELD(bits, 0, 6) != 0)
2460 1.1 cherry return (0);
2461 1.1 cherry /* no operands */
2462 1.1 cherry break;
2463 1.1 cherry case ASM_FMT_M26:
2464 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2465 1.1 cherry break;
2466 1.1 cherry case ASM_FMT_M27:
2467 1.1 cherry operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2468 1.1 cherry break;
2469 1.1 cherry case ASM_FMT_M28:
2470 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
2471 1.1 cherry break;
2472 1.1 cherry case ASM_FMT_M29:
2473 1.1 cherry operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2474 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2475 1.1 cherry break;
2476 1.1 cherry case ASM_FMT_M30:
2477 1.1 cherry operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2478 1.1 cherry s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
2479 1.1 cherry break;
2480 1.1 cherry case ASM_FMT_M31:
2481 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2482 1.1 cherry operand(i, 2, ASM_OPER_AREG, bits, 20, 7);
2483 1.1 cherry break;
2484 1.1 cherry case ASM_FMT_M32:
2485 1.1 cherry operand(i, 1, ASM_OPER_CREG, bits, 20, 7);
2486 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2487 1.1 cherry break;
2488 1.1 cherry case ASM_FMT_M33:
2489 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2490 1.1 cherry operand(i, 2, ASM_OPER_CREG, bits, 20, 7);
2491 1.1 cherry break;
2492 1.1 cherry case ASM_FMT_M34: {
2493 1.1 cherry uint64_t loc, out;
2494 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2495 1.1 cherry op_type(i, 2, ASM_OPER_AREG);
2496 1.1 cherry op_value(i, 2, AR_PFS);
2497 1.1 cherry loc = FIELD(bits, 20, 7);
2498 1.1 cherry out = FIELD(bits, 13, 7) - loc;
2499 1.1 cherry op_imm(i, 3, 0);
2500 1.1 cherry op_imm(i, 4, loc);
2501 1.1 cherry op_imm(i, 5, out);
2502 1.1 cherry op_imm(i, 6, (uint64_t)FIELD(bits, 27, 4) << 3);
2503 1.1 cherry break;
2504 1.1 cherry }
2505 1.1 cherry case ASM_FMT_M35:
2506 1.1 cherry if (FIELD(bits, 27, 6) == 0x2D)
2507 1.1 cherry op_type(i, 1, ASM_OPER_PSR_L);
2508 1.1 cherry else
2509 1.1 cherry op_type(i, 1, ASM_OPER_PSR_UM);
2510 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2511 1.1 cherry break;
2512 1.1 cherry case ASM_FMT_M36:
2513 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2514 1.1 cherry if (FIELD(bits, 27, 6) == 0x25)
2515 1.1 cherry op_type(i, 2, ASM_OPER_PSR);
2516 1.1 cherry else
2517 1.1 cherry op_type(i, 2, ASM_OPER_PSR_UM);
2518 1.1 cherry break;
2519 1.1 cherry case ASM_FMT_M37:
2520 1.1 cherry u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2521 1.1 cherry break;
2522 1.1 cherry case ASM_FMT_M38:
2523 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2524 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2525 1.1 cherry operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2526 1.1 cherry break;
2527 1.1 cherry case ASM_FMT_M39:
2528 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2529 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2530 1.1 cherry u_imm(i, 3, bits, 13, 2);
2531 1.1 cherry break;
2532 1.1 cherry case ASM_FMT_M40: /* 0 dst */
2533 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
2534 1.1 cherry u_imm(i, 2, bits, 13, 2);
2535 1.1 cherry i->i_srcidx--;
2536 1.1 cherry break;
2537 1.1 cherry case ASM_FMT_M41:
2538 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
2539 1.1 cherry break;
2540 1.1 cherry case ASM_FMT_M42:
2541 1.1 cherry operand(i, 1, ot, bits, 20, 7);
2542 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2543 1.1 cherry break;
2544 1.1 cherry case ASM_FMT_M43:
2545 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2546 1.1 cherry operand(i, 2, ot, bits, 20, 7);
2547 1.1 cherry break;
2548 1.1 cherry case ASM_FMT_M44:
2549 1.1 cherry u_immf(i, 1, bits, FRAG(6,21), FRAG(31,2), FRAG(36,1), 0);
2550 1.1 cherry break;
2551 1.1 cherry case ASM_FMT_M45: /* 0 dst */
2552 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
2553 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2554 1.1 cherry i->i_srcidx--;
2555 1.1 cherry break;
2556 1.1 cherry case ASM_FMT_M46:
2557 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2558 1.1 cherry operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2559 1.1 cherry break;
2560 1.2.30.1 skrll case ASM_FMT_M47:
2561 1.2.30.1 skrll operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
2562 1.2.30.1 skrll break;
2563 1.2.30.1 skrll case ASM_FMT_M48:
2564 1.2.30.1 skrll u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2565 1.2.30.1 skrll break;
2566 1.1 cherry case ASM_FMT_X1:
2567 1.1 cherry KASSERT(slot == 2);
2568 1.1 cherry u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2569 1.1 cherry combine(&i->i_oper[1].o_value, 21, b->b_inst[1].i_bits, 41, 0);
2570 1.1 cherry break;
2571 1.1 cherry case ASM_FMT_X2:
2572 1.1 cherry KASSERT(slot == 2);
2573 1.1 cherry operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2574 1.1 cherry u_immf(i, 2, bits, FRAG(13,7), FRAG(27,9), FRAG(22,5),
2575 1.1 cherry FRAG(21,1), 0);
2576 1.1 cherry combine(&i->i_oper[2].o_value, 22, b->b_inst[1].i_bits, 41, 0);
2577 1.1 cherry combine(&i->i_oper[2].o_value, 63, bits, 1, 36);
2578 1.1 cherry break;
2579 1.1 cherry case ASM_FMT_X3:
2580 1.1 cherry KASSERT(slot == 2);
2581 1.1 cherry asm_brhint(i);
2582 1.1 cherry u_imm(i, 1, bits, 13, 20);
2583 1.1 cherry combine(&i->i_oper[1].o_value, 20, b->b_inst[1].i_bits, 39, 2);
2584 1.1 cherry combine(&i->i_oper[1].o_value, 59, bits, 1, 36);
2585 1.1 cherry i->i_oper[1].o_value <<= 4;
2586 1.1 cherry i->i_oper[1].o_type = ASM_OPER_DISP;
2587 1.1 cherry break;
2588 1.1 cherry case ASM_FMT_X4:
2589 1.1 cherry KASSERT(slot == 2);
2590 1.1 cherry asm_brhint(i);
2591 1.1 cherry operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
2592 1.1 cherry u_imm(i, 2, bits, 13, 20);
2593 1.1 cherry combine(&i->i_oper[2].o_value, 20, b->b_inst[1].i_bits, 39, 2);
2594 1.1 cherry combine(&i->i_oper[2].o_value, 59, bits, 1, 36);
2595 1.1 cherry i->i_oper[2].o_value <<= 4;
2596 1.1 cherry i->i_oper[2].o_type = ASM_OPER_DISP;
2597 1.1 cherry break;
2598 1.2.30.1 skrll case ASM_FMT_X5:
2599 1.2.30.1 skrll KASSERT(slot == 2);
2600 1.2.30.1 skrll u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2601 1.2.30.1 skrll combine(&i->i_oper[1].o_value, 21, b->b_inst[1].i_bits, 41, 0);
2602 1.2.30.1 skrll break;
2603 1.1 cherry default:
2604 1.1 cherry KASSERT(fmt == ASM_FMT_NONE);
2605 1.1 cherry return (0);
2606 1.1 cherry }
2607 1.1 cherry
2608 1.1 cherry return (1);
2609 1.1 cherry }
2610