disasm_extract.c revision 1.2
1 /* $NetBSD: disasm_extract.c,v 1.2 2011/07/17 20:54:42 joerg Exp $ */ 2 3 /*- 4 * Copyright (c) 2000-2003 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 /* __FBSDID("$FreeBSD: src/sys/ia64/disasm/disasm_extract.c,v 1.2 2005/01/06 22:18:22 imp Exp $"); */ 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 35 #include <ia64/disasm/disasm_int.h> 36 #include <ia64/disasm/disasm.h> 37 38 #define FRAG(o,l) ((int)((o << 8) | (l & 0xff))) 39 #define FRAG_OFS(f) (f >> 8) 40 #define FRAG_LEN(f) (f & 0xff) 41 42 /* 43 * Support functions. 44 */ 45 static void 46 asm_cmpltr_add(struct asm_inst *i, enum asm_cmpltr_class c, 47 enum asm_cmpltr_type t) 48 { 49 50 i->i_cmpltr[i->i_ncmpltrs].c_class = c; 51 i->i_cmpltr[i->i_ncmpltrs].c_type = t; 52 i->i_ncmpltrs++; 53 KASSERT(i->i_ncmpltrs < 6); 54 } 55 56 static void 57 asm_hint(struct asm_inst *i, enum asm_cmpltr_class c) 58 { 59 60 switch (FIELD(i->i_bits, 28, 2)) { /* hint */ 61 case 0: 62 asm_cmpltr_add(i, c, ASM_CT_NONE); 63 break; 64 case 1: 65 asm_cmpltr_add(i, c, ASM_CT_NT1); 66 break; 67 case 2: 68 asm_cmpltr_add(i, c, ASM_CT_NT2); 69 break; 70 case 3: 71 asm_cmpltr_add(i, c, ASM_CT_NTA); 72 break; 73 } 74 } 75 76 static void 77 asm_sf(struct asm_inst *i) 78 { 79 80 switch (FIELD(i->i_bits, 34, 2)) { 81 case 0: 82 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S0); 83 break; 84 case 1: 85 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S1); 86 break; 87 case 2: 88 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S2); 89 break; 90 case 3: 91 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S3); 92 break; 93 } 94 } 95 96 static void 97 asm_brhint(struct asm_inst *i) 98 { 99 uint64_t bits = i->i_bits; 100 101 switch (FIELD(bits, 33, 2)) { /* bwh */ 102 case 0: 103 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_SPTK); 104 break; 105 case 1: 106 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_SPNT); 107 break; 108 case 2: 109 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_DPTK); 110 break; 111 case 3: 112 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_DPNT); 113 break; 114 } 115 116 if (FIELD(bits, 12, 1)) /* ph */ 117 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_MANY); 118 else 119 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_FEW); 120 121 if (FIELD(bits, 35, 1)) /* dh */ 122 asm_cmpltr_add(i, ASM_CC_DH, ASM_CT_CLR); 123 else 124 asm_cmpltr_add(i, ASM_CC_DH, ASM_CT_NONE); 125 } 126 127 static void 128 asm_brphint(struct asm_inst *i) 129 { 130 uint64_t bits = i->i_bits; 131 132 switch (FIELD(bits, 3, 2)) { /* ipwh, indwh */ 133 case 0: 134 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_SPTK); 135 break; 136 case 1: 137 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_LOOP); 138 break; 139 case 2: 140 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_DPTK); 141 break; 142 case 3: 143 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_EXIT); 144 break; 145 } 146 147 if (FIELD(bits, 5, 1)) /* ph */ 148 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_MANY); 149 else 150 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_FEW); 151 152 switch (FIELD(bits, 0, 3)) { /* pvec */ 153 case 0: 154 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_DC_DC); 155 break; 156 case 1: 157 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_DC_NT); 158 break; 159 case 2: 160 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_DC); 161 break; 162 case 3: 163 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_TK); 164 break; 165 case 4: 166 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_NT); 167 break; 168 case 5: 169 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_DC); 170 break; 171 case 6: 172 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_TK); 173 break; 174 case 7: 175 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_NT); 176 break; 177 } 178 179 if (FIELD(bits, 35, 1)) /* ih */ 180 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_IMP); 181 else 182 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_NONE); 183 } 184 185 static enum asm_oper_type 186 asm_normalize(struct asm_inst *i, enum asm_op op) 187 { 188 enum asm_oper_type ot = ASM_OPER_NONE; 189 190 switch (op) { 191 case ASM_OP_BR_CALL: 192 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CALL); 193 op = ASM_OP_BR; 194 break; 195 case ASM_OP_BR_CEXIT: 196 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CEXIT); 197 op = ASM_OP_BR; 198 break; 199 case ASM_OP_BR_CLOOP: 200 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CLOOP); 201 op = ASM_OP_BR; 202 break; 203 case ASM_OP_BR_COND: 204 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_COND); 205 op = ASM_OP_BR; 206 break; 207 case ASM_OP_BR_CTOP: 208 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CTOP); 209 op = ASM_OP_BR; 210 break; 211 case ASM_OP_BR_IA: 212 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_IA); 213 op = ASM_OP_BR; 214 break; 215 case ASM_OP_BR_RET: 216 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_RET); 217 op = ASM_OP_BR; 218 break; 219 case ASM_OP_BR_WEXIT: 220 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_WEXIT); 221 op = ASM_OP_BR; 222 break; 223 case ASM_OP_BR_WTOP: 224 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_WTOP); 225 op = ASM_OP_BR; 226 break; 227 case ASM_OP_BREAK_B: 228 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B); 229 op = ASM_OP_BREAK; 230 break; 231 case ASM_OP_BREAK_F: 232 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F); 233 op = ASM_OP_BREAK; 234 break; 235 case ASM_OP_BREAK_I: 236 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I); 237 op = ASM_OP_BREAK; 238 break; 239 case ASM_OP_BREAK_M: 240 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M); 241 op = ASM_OP_BREAK; 242 break; 243 case ASM_OP_BREAK_X: 244 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X); 245 op = ASM_OP_BREAK; 246 break; 247 case ASM_OP_BRL_COND: 248 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_COND); 249 op = ASM_OP_BRL; 250 break; 251 case ASM_OP_BRL_CALL: 252 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CALL); 253 op = ASM_OP_BRL; 254 break; 255 case ASM_OP_BRP_: 256 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_NONE); 257 op = ASM_OP_BRP; 258 break; 259 case ASM_OP_BRP_RET: 260 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_RET); 261 op = ASM_OP_BRP; 262 break; 263 case ASM_OP_BSW_0: 264 asm_cmpltr_add(i, ASM_CC_BSW, ASM_CT_0); 265 op = ASM_OP_BSW; 266 break; 267 case ASM_OP_BSW_1: 268 asm_cmpltr_add(i, ASM_CC_BSW, ASM_CT_1); 269 op = ASM_OP_BSW; 270 break; 271 case ASM_OP_CHK_A_CLR: 272 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_A); 273 asm_cmpltr_add(i, ASM_CC_ACLR, ASM_CT_CLR); 274 op = ASM_OP_CHK; 275 break; 276 case ASM_OP_CHK_A_NC: 277 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_A); 278 asm_cmpltr_add(i, ASM_CC_ACLR, ASM_CT_NC); 279 op = ASM_OP_CHK; 280 break; 281 case ASM_OP_CHK_S: 282 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S); 283 op = ASM_OP_CHK; 284 break; 285 case ASM_OP_CHK_S_I: 286 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S); 287 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I); 288 op = ASM_OP_CHK; 289 break; 290 case ASM_OP_CHK_S_M: 291 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S); 292 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M); 293 op = ASM_OP_CHK; 294 break; 295 case ASM_OP_CLRRRB_: 296 asm_cmpltr_add(i, ASM_CC_CLRRRB, ASM_CT_NONE); 297 op = ASM_OP_CLRRRB; 298 break; 299 case ASM_OP_CLRRRB_PR: 300 asm_cmpltr_add(i, ASM_CC_CLRRRB, ASM_CT_PR); 301 op = ASM_OP_CLRRRB; 302 break; 303 case ASM_OP_CMP_EQ: 304 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ); 305 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE); 306 op = ASM_OP_CMP; 307 break; 308 case ASM_OP_CMP_EQ_AND: 309 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ); 310 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 311 op = ASM_OP_CMP; 312 break; 313 case ASM_OP_CMP_EQ_OR: 314 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ); 315 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 316 op = ASM_OP_CMP; 317 break; 318 case ASM_OP_CMP_EQ_OR_ANDCM: 319 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ); 320 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 321 op = ASM_OP_CMP; 322 break; 323 case ASM_OP_CMP_EQ_UNC: 324 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ); 325 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC); 326 op = ASM_OP_CMP; 327 break; 328 case ASM_OP_CMP_GE_AND: 329 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE); 330 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 331 op = ASM_OP_CMP; 332 break; 333 case ASM_OP_CMP_GE_OR: 334 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE); 335 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 336 op = ASM_OP_CMP; 337 break; 338 case ASM_OP_CMP_GE_OR_ANDCM: 339 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE); 340 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 341 op = ASM_OP_CMP; 342 break; 343 case ASM_OP_CMP_GT_AND: 344 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT); 345 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 346 op = ASM_OP_CMP; 347 break; 348 case ASM_OP_CMP_GT_OR: 349 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT); 350 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 351 op = ASM_OP_CMP; 352 break; 353 case ASM_OP_CMP_GT_OR_ANDCM: 354 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT); 355 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 356 op = ASM_OP_CMP; 357 break; 358 case ASM_OP_CMP_LE_AND: 359 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE); 360 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 361 op = ASM_OP_CMP; 362 break; 363 case ASM_OP_CMP_LE_OR: 364 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE); 365 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 366 op = ASM_OP_CMP; 367 break; 368 case ASM_OP_CMP_LE_OR_ANDCM: 369 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE); 370 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 371 op = ASM_OP_CMP; 372 break; 373 case ASM_OP_CMP_LT: 374 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT); 375 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE); 376 op = ASM_OP_CMP; 377 break; 378 case ASM_OP_CMP_LT_AND: 379 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT); 380 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 381 op = ASM_OP_CMP; 382 break; 383 case ASM_OP_CMP_LT_OR: 384 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT); 385 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 386 op = ASM_OP_CMP; 387 break; 388 case ASM_OP_CMP_LT_OR_ANDCM: 389 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT); 390 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 391 op = ASM_OP_CMP; 392 break; 393 case ASM_OP_CMP_LT_UNC: 394 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT); 395 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC); 396 op = ASM_OP_CMP; 397 break; 398 case ASM_OP_CMP_LTU: 399 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU); 400 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE); 401 op = ASM_OP_CMP; 402 break; 403 case ASM_OP_CMP_LTU_UNC: 404 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU); 405 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC); 406 op = ASM_OP_CMP; 407 break; 408 case ASM_OP_CMP_NE_AND: 409 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE); 410 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 411 op = ASM_OP_CMP; 412 break; 413 case ASM_OP_CMP_NE_OR: 414 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE); 415 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 416 op = ASM_OP_CMP; 417 break; 418 case ASM_OP_CMP_NE_OR_ANDCM: 419 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE); 420 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 421 op = ASM_OP_CMP; 422 break; 423 case ASM_OP_CMP4_EQ: 424 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ); 425 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE); 426 op = ASM_OP_CMP4; 427 break; 428 case ASM_OP_CMP4_EQ_AND: 429 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ); 430 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 431 op = ASM_OP_CMP4; 432 break; 433 case ASM_OP_CMP4_EQ_OR: 434 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ); 435 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 436 op = ASM_OP_CMP4; 437 break; 438 case ASM_OP_CMP4_EQ_OR_ANDCM: 439 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ); 440 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 441 op = ASM_OP_CMP4; 442 break; 443 case ASM_OP_CMP4_EQ_UNC: 444 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ); 445 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC); 446 op = ASM_OP_CMP4; 447 break; 448 case ASM_OP_CMP4_GE_AND: 449 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE); 450 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 451 op = ASM_OP_CMP4; 452 break; 453 case ASM_OP_CMP4_GE_OR: 454 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE); 455 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 456 op = ASM_OP_CMP4; 457 break; 458 case ASM_OP_CMP4_GE_OR_ANDCM: 459 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE); 460 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 461 op = ASM_OP_CMP4; 462 break; 463 case ASM_OP_CMP4_GT_AND: 464 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT); 465 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 466 op = ASM_OP_CMP4; 467 break; 468 case ASM_OP_CMP4_GT_OR: 469 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT); 470 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 471 op = ASM_OP_CMP4; 472 break; 473 case ASM_OP_CMP4_GT_OR_ANDCM: 474 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT); 475 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 476 op = ASM_OP_CMP4; 477 break; 478 case ASM_OP_CMP4_LE_AND: 479 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE); 480 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 481 op = ASM_OP_CMP4; 482 break; 483 case ASM_OP_CMP4_LE_OR: 484 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE); 485 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 486 op = ASM_OP_CMP4; 487 break; 488 case ASM_OP_CMP4_LE_OR_ANDCM: 489 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE); 490 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 491 op = ASM_OP_CMP4; 492 break; 493 case ASM_OP_CMP4_LT: 494 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT); 495 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE); 496 op = ASM_OP_CMP4; 497 break; 498 case ASM_OP_CMP4_LT_AND: 499 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT); 500 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 501 op = ASM_OP_CMP4; 502 break; 503 case ASM_OP_CMP4_LT_OR: 504 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT); 505 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 506 op = ASM_OP_CMP4; 507 break; 508 case ASM_OP_CMP4_LT_OR_ANDCM: 509 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT); 510 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 511 op = ASM_OP_CMP4; 512 break; 513 case ASM_OP_CMP4_LT_UNC: 514 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT); 515 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC); 516 op = ASM_OP_CMP4; 517 break; 518 case ASM_OP_CMP4_LTU: 519 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU); 520 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE); 521 op = ASM_OP_CMP4; 522 break; 523 case ASM_OP_CMP4_LTU_UNC: 524 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU); 525 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC); 526 op = ASM_OP_CMP4; 527 break; 528 case ASM_OP_CMP4_NE_AND: 529 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE); 530 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 531 op = ASM_OP_CMP4; 532 break; 533 case ASM_OP_CMP4_NE_OR: 534 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE); 535 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 536 op = ASM_OP_CMP4; 537 break; 538 case ASM_OP_CMP4_NE_OR_ANDCM: 539 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE); 540 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 541 op = ASM_OP_CMP4; 542 break; 543 case ASM_OP_CMP8XCHG16_ACQ: 544 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ); 545 op = ASM_OP_CMP8XCHG16; 546 break; 547 case ASM_OP_CMP8XCHG16_REL: 548 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL); 549 op = ASM_OP_CMP8XCHG16; 550 break; 551 case ASM_OP_CMPXCHG1_ACQ: 552 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ); 553 op = ASM_OP_CMPXCHG1; 554 break; 555 case ASM_OP_CMPXCHG1_REL: 556 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL); 557 op = ASM_OP_CMPXCHG1; 558 break; 559 case ASM_OP_CMPXCHG2_ACQ: 560 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ); 561 op = ASM_OP_CMPXCHG2; 562 break; 563 case ASM_OP_CMPXCHG2_REL: 564 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL); 565 op = ASM_OP_CMPXCHG2; 566 break; 567 case ASM_OP_CMPXCHG4_ACQ: 568 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ); 569 op = ASM_OP_CMPXCHG4; 570 break; 571 case ASM_OP_CMPXCHG4_REL: 572 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL); 573 op = ASM_OP_CMPXCHG4; 574 break; 575 case ASM_OP_CMPXCHG8_ACQ: 576 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ); 577 op = ASM_OP_CMPXCHG8; 578 break; 579 case ASM_OP_CMPXCHG8_REL: 580 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL); 581 op = ASM_OP_CMPXCHG8; 582 break; 583 case ASM_OP_CZX1_L: 584 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L); 585 op = ASM_OP_CZX1; 586 break; 587 case ASM_OP_CZX1_R: 588 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R); 589 op = ASM_OP_CZX1; 590 break; 591 case ASM_OP_CZX2_L: 592 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L); 593 op = ASM_OP_CZX2; 594 break; 595 case ASM_OP_CZX2_R: 596 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R); 597 op = ASM_OP_CZX2; 598 break; 599 case ASM_OP_DEP_: 600 asm_cmpltr_add(i, ASM_CC_DEP, ASM_CT_NONE); 601 op = ASM_OP_DEP; 602 break; 603 case ASM_OP_DEP_Z: 604 asm_cmpltr_add(i, ASM_CC_DEP, ASM_CT_Z); 605 op = ASM_OP_DEP; 606 break; 607 case ASM_OP_FC_: 608 asm_cmpltr_add(i, ASM_CC_FC, ASM_CT_NONE); 609 op = ASM_OP_FC; 610 break; 611 case ASM_OP_FC_I: 612 asm_cmpltr_add(i, ASM_CC_FC, ASM_CT_I); 613 op = ASM_OP_FC; 614 break; 615 case ASM_OP_FCLASS_M: 616 asm_cmpltr_add(i, ASM_CC_FCREL, ASM_CT_M); 617 op = ASM_OP_FCLASS; 618 break; 619 case ASM_OP_FCVT_FX: 620 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX); 621 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE); 622 op = ASM_OP_FCVT; 623 break; 624 case ASM_OP_FCVT_FX_TRUNC: 625 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX); 626 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC); 627 op = ASM_OP_FCVT; 628 break; 629 case ASM_OP_FCVT_FXU: 630 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU); 631 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE); 632 op = ASM_OP_FCVT; 633 break; 634 case ASM_OP_FCVT_FXU_TRUNC: 635 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU); 636 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC); 637 op = ASM_OP_FCVT; 638 break; 639 case ASM_OP_FCVT_XF: 640 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_XF); 641 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE); 642 op = ASM_OP_FCVT; 643 break; 644 case ASM_OP_FETCHADD4_ACQ: 645 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ); 646 op = ASM_OP_FETCHADD4; 647 break; 648 case ASM_OP_FETCHADD4_REL: 649 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL); 650 op = ASM_OP_FETCHADD4; 651 break; 652 case ASM_OP_FETCHADD8_ACQ: 653 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ); 654 op = ASM_OP_FETCHADD8; 655 break; 656 case ASM_OP_FETCHADD8_REL: 657 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL); 658 op = ASM_OP_FETCHADD8; 659 break; 660 case ASM_OP_FMA_: 661 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE); 662 op = ASM_OP_FMA; 663 break; 664 case ASM_OP_FMA_D: 665 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D); 666 op = ASM_OP_FMA; 667 break; 668 case ASM_OP_FMA_S: 669 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S); 670 op = ASM_OP_FMA; 671 break; 672 case ASM_OP_FMERGE_NS: 673 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_NS); 674 op = ASM_OP_FMERGE; 675 break; 676 case ASM_OP_FMERGE_S: 677 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_S); 678 op = ASM_OP_FMERGE; 679 break; 680 case ASM_OP_FMERGE_SE: 681 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_SE); 682 op = ASM_OP_FMERGE; 683 break; 684 case ASM_OP_FMIX_L: 685 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L); 686 op = ASM_OP_FMIX; 687 break; 688 case ASM_OP_FMIX_LR: 689 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_LR); 690 op = ASM_OP_FMIX; 691 break; 692 case ASM_OP_FMIX_R: 693 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R); 694 op = ASM_OP_FMIX; 695 break; 696 case ASM_OP_FMS_: 697 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE); 698 op = ASM_OP_FMS; 699 break; 700 case ASM_OP_FMS_D: 701 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D); 702 op = ASM_OP_FMS; 703 break; 704 case ASM_OP_FMS_S: 705 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S); 706 op = ASM_OP_FMS; 707 break; 708 case ASM_OP_FNMA_: 709 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE); 710 op = ASM_OP_FNMA; 711 break; 712 case ASM_OP_FNMA_D: 713 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D); 714 op = ASM_OP_FNMA; 715 break; 716 case ASM_OP_FNMA_S: 717 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S); 718 op = ASM_OP_FNMA; 719 break; 720 case ASM_OP_FPCMP_EQ: 721 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_EQ); 722 op = ASM_OP_FPCMP; 723 break; 724 case ASM_OP_FPCMP_LE: 725 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LE); 726 op = ASM_OP_FPCMP; 727 break; 728 case ASM_OP_FPCMP_LT: 729 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LT); 730 op = ASM_OP_FPCMP; 731 break; 732 case ASM_OP_FPCMP_NEQ: 733 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NEQ); 734 op = ASM_OP_FPCMP; 735 break; 736 case ASM_OP_FPCMP_NLE: 737 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NLE); 738 op = ASM_OP_FPCMP; 739 break; 740 case ASM_OP_FPCMP_NLT: 741 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NLT); 742 op = ASM_OP_FPCMP; 743 break; 744 case ASM_OP_FPCMP_ORD: 745 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_ORD); 746 op = ASM_OP_FPCMP; 747 break; 748 case ASM_OP_FPCMP_UNORD: 749 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_UNORD); 750 op = ASM_OP_FPCMP; 751 break; 752 case ASM_OP_FPCVT_FX: 753 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX); 754 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE); 755 op = ASM_OP_FPCVT; 756 break; 757 case ASM_OP_FPCVT_FX_TRUNC: 758 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX); 759 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC); 760 op = ASM_OP_FPCVT; 761 break; 762 case ASM_OP_FPCVT_FXU: 763 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU); 764 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE); 765 op = ASM_OP_FPCVT; 766 break; 767 case ASM_OP_FPCVT_FXU_TRUNC: 768 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU); 769 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC); 770 op = ASM_OP_FPCVT; 771 break; 772 case ASM_OP_FPMERGE_NS: 773 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_NS); 774 op = ASM_OP_FPMERGE; 775 break; 776 case ASM_OP_FPMERGE_S: 777 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_S); 778 op = ASM_OP_FPMERGE; 779 break; 780 case ASM_OP_FPMERGE_SE: 781 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_SE); 782 op = ASM_OP_FPMERGE; 783 break; 784 case ASM_OP_FSWAP_: 785 asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NONE); 786 op = ASM_OP_FSWAP; 787 break; 788 case ASM_OP_FSWAP_NL: 789 asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NL); 790 op = ASM_OP_FSWAP; 791 break; 792 case ASM_OP_FSWAP_NR: 793 asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NR); 794 op = ASM_OP_FSWAP; 795 break; 796 case ASM_OP_FSXT_L: 797 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L); 798 op = ASM_OP_FSXT; 799 break; 800 case ASM_OP_FSXT_R: 801 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R); 802 op = ASM_OP_FSXT; 803 break; 804 case ASM_OP_GETF_D: 805 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_D); 806 op = ASM_OP_GETF; 807 break; 808 case ASM_OP_GETF_EXP: 809 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_EXP); 810 op = ASM_OP_GETF; 811 break; 812 case ASM_OP_GETF_S: 813 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_S); 814 op = ASM_OP_GETF; 815 break; 816 case ASM_OP_GETF_SIG: 817 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_SIG); 818 op = ASM_OP_GETF; 819 break; 820 case ASM_OP_INVALA_: 821 asm_cmpltr_add(i, ASM_CC_INVALA, ASM_CT_NONE); 822 op = ASM_OP_INVALA; 823 break; 824 case ASM_OP_INVALA_E: 825 asm_cmpltr_add(i, ASM_CC_INVALA, ASM_CT_E); 826 op = ASM_OP_INVALA; 827 break; 828 case ASM_OP_ITC_D: 829 asm_cmpltr_add(i, ASM_CC_ITC, ASM_CT_D); 830 op = ASM_OP_ITC; 831 break; 832 case ASM_OP_ITC_I: 833 asm_cmpltr_add(i, ASM_CC_ITC, ASM_CT_I); 834 op = ASM_OP_ITC; 835 break; 836 case ASM_OP_ITR_D: 837 asm_cmpltr_add(i, ASM_CC_ITR, ASM_CT_D); 838 ot = ASM_OPER_DTR; 839 op = ASM_OP_ITR; 840 break; 841 case ASM_OP_ITR_I: 842 asm_cmpltr_add(i, ASM_CC_ITR, ASM_CT_I); 843 ot = ASM_OPER_ITR; 844 op = ASM_OP_ITR; 845 break; 846 case ASM_OP_LD1_: 847 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE); 848 op = ASM_OP_LD1; 849 break; 850 case ASM_OP_LD1_A: 851 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A); 852 op = ASM_OP_LD1; 853 break; 854 case ASM_OP_LD1_ACQ: 855 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ); 856 op = ASM_OP_LD1; 857 break; 858 case ASM_OP_LD1_BIAS: 859 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS); 860 op = ASM_OP_LD1; 861 break; 862 case ASM_OP_LD1_C_CLR: 863 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR); 864 op = ASM_OP_LD1; 865 break; 866 case ASM_OP_LD1_C_CLR_ACQ: 867 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ); 868 op = ASM_OP_LD1; 869 break; 870 case ASM_OP_LD1_C_NC: 871 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC); 872 op = ASM_OP_LD1; 873 break; 874 case ASM_OP_LD1_S: 875 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S); 876 op = ASM_OP_LD1; 877 break; 878 case ASM_OP_LD1_SA: 879 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA); 880 op = ASM_OP_LD1; 881 break; 882 case ASM_OP_LD16_: 883 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE); 884 op = ASM_OP_LD16; 885 break; 886 case ASM_OP_LD16_ACQ: 887 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ); 888 op = ASM_OP_LD16; 889 break; 890 case ASM_OP_LD2_: 891 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE); 892 op = ASM_OP_LD2; 893 break; 894 case ASM_OP_LD2_A: 895 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A); 896 op = ASM_OP_LD2; 897 break; 898 case ASM_OP_LD2_ACQ: 899 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ); 900 op = ASM_OP_LD2; 901 break; 902 case ASM_OP_LD2_BIAS: 903 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS); 904 op = ASM_OP_LD2; 905 break; 906 case ASM_OP_LD2_C_CLR: 907 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR); 908 op = ASM_OP_LD2; 909 break; 910 case ASM_OP_LD2_C_CLR_ACQ: 911 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ); 912 op = ASM_OP_LD2; 913 break; 914 case ASM_OP_LD2_C_NC: 915 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC); 916 op = ASM_OP_LD2; 917 break; 918 case ASM_OP_LD2_S: 919 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S); 920 op = ASM_OP_LD2; 921 break; 922 case ASM_OP_LD2_SA: 923 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA); 924 op = ASM_OP_LD2; 925 break; 926 case ASM_OP_LD4_: 927 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE); 928 op = ASM_OP_LD4; 929 break; 930 case ASM_OP_LD4_A: 931 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A); 932 op = ASM_OP_LD4; 933 break; 934 case ASM_OP_LD4_ACQ: 935 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ); 936 op = ASM_OP_LD4; 937 break; 938 case ASM_OP_LD4_BIAS: 939 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS); 940 op = ASM_OP_LD4; 941 break; 942 case ASM_OP_LD4_C_CLR: 943 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR); 944 op = ASM_OP_LD4; 945 break; 946 case ASM_OP_LD4_C_CLR_ACQ: 947 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ); 948 op = ASM_OP_LD4; 949 break; 950 case ASM_OP_LD4_C_NC: 951 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC); 952 op = ASM_OP_LD4; 953 break; 954 case ASM_OP_LD4_S: 955 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S); 956 op = ASM_OP_LD4; 957 break; 958 case ASM_OP_LD4_SA: 959 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA); 960 op = ASM_OP_LD4; 961 break; 962 case ASM_OP_LD8_: 963 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE); 964 op = ASM_OP_LD8; 965 break; 966 case ASM_OP_LD8_A: 967 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A); 968 op = ASM_OP_LD8; 969 break; 970 case ASM_OP_LD8_ACQ: 971 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ); 972 op = ASM_OP_LD8; 973 break; 974 case ASM_OP_LD8_BIAS: 975 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS); 976 op = ASM_OP_LD8; 977 break; 978 case ASM_OP_LD8_C_CLR: 979 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR); 980 op = ASM_OP_LD8; 981 break; 982 case ASM_OP_LD8_C_CLR_ACQ: 983 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ); 984 op = ASM_OP_LD8; 985 break; 986 case ASM_OP_LD8_C_NC: 987 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC); 988 op = ASM_OP_LD8; 989 break; 990 case ASM_OP_LD8_FILL: 991 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_FILL); 992 op = ASM_OP_LD8; 993 break; 994 case ASM_OP_LD8_S: 995 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S); 996 op = ASM_OP_LD8; 997 break; 998 case ASM_OP_LD8_SA: 999 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA); 1000 op = ASM_OP_LD8; 1001 break; 1002 case ASM_OP_LDF_FILL: 1003 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_FILL); 1004 op = ASM_OP_LDF; 1005 break; 1006 case ASM_OP_LDF8_: 1007 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE); 1008 op = ASM_OP_LDF8; 1009 break; 1010 case ASM_OP_LDF8_A: 1011 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A); 1012 op = ASM_OP_LDF8; 1013 break; 1014 case ASM_OP_LDF8_C_CLR: 1015 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR); 1016 op = ASM_OP_LDF8; 1017 break; 1018 case ASM_OP_LDF8_C_NC: 1019 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC); 1020 op = ASM_OP_LDF8; 1021 break; 1022 case ASM_OP_LDF8_S: 1023 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S); 1024 op = ASM_OP_LDF8; 1025 break; 1026 case ASM_OP_LDF8_SA: 1027 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA); 1028 op = ASM_OP_LDF8; 1029 break; 1030 case ASM_OP_LDFD_: 1031 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE); 1032 op = ASM_OP_LDFD; 1033 break; 1034 case ASM_OP_LDFD_A: 1035 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A); 1036 op = ASM_OP_LDFD; 1037 break; 1038 case ASM_OP_LDFD_C_CLR: 1039 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR); 1040 op = ASM_OP_LDFD; 1041 break; 1042 case ASM_OP_LDFD_C_NC: 1043 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC); 1044 op = ASM_OP_LDFD; 1045 break; 1046 case ASM_OP_LDFD_S: 1047 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S); 1048 op = ASM_OP_LDFD; 1049 break; 1050 case ASM_OP_LDFD_SA: 1051 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA); 1052 op = ASM_OP_LDFD; 1053 break; 1054 case ASM_OP_LDFE_: 1055 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE); 1056 op = ASM_OP_LDFE; 1057 break; 1058 case ASM_OP_LDFE_A: 1059 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A); 1060 op = ASM_OP_LDFE; 1061 break; 1062 case ASM_OP_LDFE_C_CLR: 1063 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR); 1064 op = ASM_OP_LDFE; 1065 break; 1066 case ASM_OP_LDFE_C_NC: 1067 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC); 1068 op = ASM_OP_LDFE; 1069 break; 1070 case ASM_OP_LDFE_S: 1071 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S); 1072 op = ASM_OP_LDFE; 1073 break; 1074 case ASM_OP_LDFE_SA: 1075 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA); 1076 op = ASM_OP_LDFE; 1077 break; 1078 case ASM_OP_LDFP8_: 1079 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE); 1080 op = ASM_OP_LDFP8; 1081 break; 1082 case ASM_OP_LDFP8_A: 1083 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A); 1084 op = ASM_OP_LDFP8; 1085 break; 1086 case ASM_OP_LDFP8_C_CLR: 1087 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR); 1088 op = ASM_OP_LDFP8; 1089 break; 1090 case ASM_OP_LDFP8_C_NC: 1091 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC); 1092 op = ASM_OP_LDFP8; 1093 break; 1094 case ASM_OP_LDFP8_S: 1095 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S); 1096 op = ASM_OP_LDFP8; 1097 break; 1098 case ASM_OP_LDFP8_SA: 1099 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA); 1100 op = ASM_OP_LDFP8; 1101 break; 1102 case ASM_OP_LDFPD_: 1103 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE); 1104 op = ASM_OP_LDFPD; 1105 break; 1106 case ASM_OP_LDFPD_A: 1107 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A); 1108 op = ASM_OP_LDFPD; 1109 break; 1110 case ASM_OP_LDFPD_C_CLR: 1111 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR); 1112 op = ASM_OP_LDFPD; 1113 break; 1114 case ASM_OP_LDFPD_C_NC: 1115 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC); 1116 op = ASM_OP_LDFPD; 1117 break; 1118 case ASM_OP_LDFPD_S: 1119 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S); 1120 op = ASM_OP_LDFPD; 1121 break; 1122 case ASM_OP_LDFPD_SA: 1123 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA); 1124 op = ASM_OP_LDFPD; 1125 break; 1126 case ASM_OP_LDFPS_: 1127 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE); 1128 op = ASM_OP_LDFPS; 1129 break; 1130 case ASM_OP_LDFPS_A: 1131 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A); 1132 op = ASM_OP_LDFPS; 1133 break; 1134 case ASM_OP_LDFPS_C_CLR: 1135 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR); 1136 op = ASM_OP_LDFPS; 1137 break; 1138 case ASM_OP_LDFPS_C_NC: 1139 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC); 1140 op = ASM_OP_LDFPS; 1141 break; 1142 case ASM_OP_LDFPS_S: 1143 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S); 1144 op = ASM_OP_LDFPS; 1145 break; 1146 case ASM_OP_LDFPS_SA: 1147 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA); 1148 op = ASM_OP_LDFPS; 1149 break; 1150 case ASM_OP_LDFS_: 1151 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE); 1152 op = ASM_OP_LDFS; 1153 break; 1154 case ASM_OP_LDFS_A: 1155 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A); 1156 op = ASM_OP_LDFS; 1157 break; 1158 case ASM_OP_LDFS_C_CLR: 1159 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR); 1160 op = ASM_OP_LDFS; 1161 break; 1162 case ASM_OP_LDFS_C_NC: 1163 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC); 1164 op = ASM_OP_LDFS; 1165 break; 1166 case ASM_OP_LDFS_S: 1167 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S); 1168 op = ASM_OP_LDFS; 1169 break; 1170 case ASM_OP_LDFS_SA: 1171 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA); 1172 op = ASM_OP_LDFS; 1173 break; 1174 case ASM_OP_LFETCH_: 1175 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_NONE); 1176 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_NONE); 1177 op = ASM_OP_LFETCH; 1178 break; 1179 case ASM_OP_LFETCH_EXCL: 1180 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_NONE); 1181 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_EXCL); 1182 op = ASM_OP_LFETCH; 1183 break; 1184 case ASM_OP_LFETCH_FAULT: 1185 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_FAULT); 1186 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_NONE); 1187 op = ASM_OP_LFETCH; 1188 break; 1189 case ASM_OP_LFETCH_FAULT_EXCL: 1190 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_FAULT); 1191 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_EXCL); 1192 op = ASM_OP_LFETCH; 1193 break; 1194 case ASM_OP_MF_: 1195 asm_cmpltr_add(i, ASM_CC_MF, ASM_CT_NONE); 1196 op = ASM_OP_MF; 1197 break; 1198 case ASM_OP_MF_A: 1199 asm_cmpltr_add(i, ASM_CC_MF, ASM_CT_A); 1200 op = ASM_OP_MF; 1201 break; 1202 case ASM_OP_MIX1_L: 1203 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L); 1204 op = ASM_OP_MIX1; 1205 break; 1206 case ASM_OP_MIX1_R: 1207 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R); 1208 op = ASM_OP_MIX1; 1209 break; 1210 case ASM_OP_MIX2_L: 1211 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L); 1212 op = ASM_OP_MIX2; 1213 break; 1214 case ASM_OP_MIX2_R: 1215 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R); 1216 op = ASM_OP_MIX2; 1217 break; 1218 case ASM_OP_MIX4_L: 1219 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L); 1220 op = ASM_OP_MIX4; 1221 break; 1222 case ASM_OP_MIX4_R: 1223 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R); 1224 op = ASM_OP_MIX4; 1225 break; 1226 case ASM_OP_MOV_: 1227 asm_cmpltr_add(i, ASM_CC_MOV, ASM_CT_NONE); 1228 op = ASM_OP_MOV; 1229 break; 1230 case ASM_OP_MOV_I: 1231 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I); 1232 op = ASM_OP_MOV; 1233 break; 1234 case ASM_OP_MOV_M: 1235 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M); 1236 op = ASM_OP_MOV; 1237 break; 1238 case ASM_OP_MOV_RET: 1239 asm_cmpltr_add(i, ASM_CC_MOV, ASM_CT_RET); 1240 op = ASM_OP_MOV; 1241 break; 1242 case ASM_OP_MOV_CPUID: 1243 ot = ASM_OPER_CPUID; 1244 op = ASM_OP_MOV; 1245 break; 1246 case ASM_OP_MOV_DBR: 1247 ot = ASM_OPER_DBR; 1248 op = ASM_OP_MOV; 1249 break; 1250 case ASM_OP_MOV_IBR: 1251 ot = ASM_OPER_IBR; 1252 op = ASM_OP_MOV; 1253 break; 1254 case ASM_OP_MOV_IP: 1255 ot = ASM_OPER_IP; 1256 op = ASM_OP_MOV; 1257 break; 1258 case ASM_OP_MOV_MSR: 1259 ot = ASM_OPER_MSR; 1260 op = ASM_OP_MOV; 1261 break; 1262 case ASM_OP_MOV_PKR: 1263 ot = ASM_OPER_PKR; 1264 op = ASM_OP_MOV; 1265 break; 1266 case ASM_OP_MOV_PMC: 1267 ot = ASM_OPER_PMC; 1268 op = ASM_OP_MOV; 1269 break; 1270 case ASM_OP_MOV_PMD: 1271 ot = ASM_OPER_PMD; 1272 op = ASM_OP_MOV; 1273 break; 1274 case ASM_OP_MOV_PR: 1275 ot = ASM_OPER_PR; 1276 op = ASM_OP_MOV; 1277 break; 1278 case ASM_OP_MOV_PSR: 1279 ot = ASM_OPER_PSR; 1280 op = ASM_OP_MOV; 1281 break; 1282 case ASM_OP_MOV_PSR_L: 1283 ot = ASM_OPER_PSR_L; 1284 op = ASM_OP_MOV; 1285 break; 1286 case ASM_OP_MOV_PSR_UM: 1287 ot = ASM_OPER_PSR_UM; 1288 op = ASM_OP_MOV; 1289 break; 1290 case ASM_OP_MOV_RR: 1291 ot = ASM_OPER_RR; 1292 op = ASM_OP_MOV; 1293 break; 1294 case ASM_OP_NOP_B: 1295 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B); 1296 op = ASM_OP_NOP; 1297 break; 1298 case ASM_OP_NOP_F: 1299 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F); 1300 op = ASM_OP_NOP; 1301 break; 1302 case ASM_OP_NOP_I: 1303 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I); 1304 op = ASM_OP_NOP; 1305 break; 1306 case ASM_OP_NOP_M: 1307 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M); 1308 op = ASM_OP_NOP; 1309 break; 1310 case ASM_OP_NOP_X: 1311 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X); 1312 op = ASM_OP_NOP; 1313 break; 1314 case ASM_OP_PACK2_SSS: 1315 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS); 1316 op = ASM_OP_PACK2; 1317 break; 1318 case ASM_OP_PACK2_USS: 1319 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_USS); 1320 op = ASM_OP_PACK2; 1321 break; 1322 case ASM_OP_PACK4_SSS: 1323 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS); 1324 op = ASM_OP_PACK4; 1325 break; 1326 case ASM_OP_PADD1_: 1327 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE); 1328 op = ASM_OP_PADD1; 1329 break; 1330 case ASM_OP_PADD1_SSS: 1331 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS); 1332 op = ASM_OP_PADD1; 1333 break; 1334 case ASM_OP_PADD1_UUS: 1335 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS); 1336 op = ASM_OP_PADD1; 1337 break; 1338 case ASM_OP_PADD1_UUU: 1339 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU); 1340 op = ASM_OP_PADD1; 1341 break; 1342 case ASM_OP_PADD2_: 1343 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE); 1344 op = ASM_OP_PADD2; 1345 break; 1346 case ASM_OP_PADD2_SSS: 1347 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS); 1348 op = ASM_OP_PADD2; 1349 break; 1350 case ASM_OP_PADD2_UUS: 1351 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS); 1352 op = ASM_OP_PADD2; 1353 break; 1354 case ASM_OP_PADD2_UUU: 1355 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU); 1356 op = ASM_OP_PADD2; 1357 break; 1358 case ASM_OP_PAVG1_: 1359 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_NONE); 1360 op = ASM_OP_PAVG1; 1361 break; 1362 case ASM_OP_PAVG1_RAZ: 1363 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_RAZ); 1364 op = ASM_OP_PAVG1; 1365 break; 1366 case ASM_OP_PAVG2_: 1367 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_NONE); 1368 op = ASM_OP_PAVG2; 1369 break; 1370 case ASM_OP_PAVG2_RAZ: 1371 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_RAZ); 1372 op = ASM_OP_PAVG2; 1373 break; 1374 case ASM_OP_PCMP1_EQ: 1375 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ); 1376 op = ASM_OP_PCMP1; 1377 break; 1378 case ASM_OP_PCMP1_GT: 1379 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT); 1380 op = ASM_OP_PCMP1; 1381 break; 1382 case ASM_OP_PCMP2_EQ: 1383 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ); 1384 op = ASM_OP_PCMP2; 1385 break; 1386 case ASM_OP_PCMP2_GT: 1387 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT); 1388 op = ASM_OP_PCMP2; 1389 break; 1390 case ASM_OP_PCMP4_EQ: 1391 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ); 1392 op = ASM_OP_PCMP4; 1393 break; 1394 case ASM_OP_PCMP4_GT: 1395 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT); 1396 op = ASM_OP_PCMP4; 1397 break; 1398 case ASM_OP_PMAX1_U: 1399 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U); 1400 op = ASM_OP_PMAX1; 1401 break; 1402 case ASM_OP_PMIN1_U: 1403 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U); 1404 op = ASM_OP_PMIN1; 1405 break; 1406 case ASM_OP_PMPY2_L: 1407 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L); 1408 op = ASM_OP_PMPY2; 1409 break; 1410 case ASM_OP_PMPY2_R: 1411 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R); 1412 op = ASM_OP_PMPY2; 1413 break; 1414 case ASM_OP_PMPYSHR2_: 1415 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE); 1416 op = ASM_OP_PMPYSHR2; 1417 break; 1418 case ASM_OP_PMPYSHR2_U: 1419 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U); 1420 op = ASM_OP_PMPYSHR2; 1421 break; 1422 case ASM_OP_PROBE_R: 1423 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_R); 1424 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_NONE); 1425 op = ASM_OP_PROBE; 1426 break; 1427 case ASM_OP_PROBE_R_FAULT: 1428 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_R); 1429 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT); 1430 op = ASM_OP_PROBE; 1431 break; 1432 case ASM_OP_PROBE_RW_FAULT: 1433 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_RW); 1434 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT); 1435 op = ASM_OP_PROBE; 1436 break; 1437 case ASM_OP_PROBE_W: 1438 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_W); 1439 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_NONE); 1440 op = ASM_OP_PROBE; 1441 break; 1442 case ASM_OP_PROBE_W_FAULT: 1443 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_W); 1444 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT); 1445 op = ASM_OP_PROBE; 1446 break; 1447 case ASM_OP_PSHR2_: 1448 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE); 1449 op = ASM_OP_PSHR2; 1450 break; 1451 case ASM_OP_PSHR2_U: 1452 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U); 1453 op = ASM_OP_PSHR2; 1454 break; 1455 case ASM_OP_PSHR4_: 1456 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE); 1457 op = ASM_OP_PSHR4; 1458 break; 1459 case ASM_OP_PSHR4_U: 1460 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U); 1461 op = ASM_OP_PSHR4; 1462 break; 1463 case ASM_OP_PSUB1_: 1464 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE); 1465 op = ASM_OP_PSUB1; 1466 break; 1467 case ASM_OP_PSUB1_SSS: 1468 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS); 1469 op = ASM_OP_PSUB1; 1470 break; 1471 case ASM_OP_PSUB1_UUS: 1472 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS); 1473 op = ASM_OP_PSUB1; 1474 break; 1475 case ASM_OP_PSUB1_UUU: 1476 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU); 1477 op = ASM_OP_PSUB1; 1478 break; 1479 case ASM_OP_PSUB2_: 1480 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE); 1481 op = ASM_OP_PSUB2; 1482 break; 1483 case ASM_OP_PSUB2_SSS: 1484 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS); 1485 op = ASM_OP_PSUB2; 1486 break; 1487 case ASM_OP_PSUB2_UUS: 1488 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS); 1489 op = ASM_OP_PSUB2; 1490 break; 1491 case ASM_OP_PSUB2_UUU: 1492 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU); 1493 op = ASM_OP_PSUB2; 1494 break; 1495 case ASM_OP_PTC_E: 1496 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_E); 1497 op = ASM_OP_PTC; 1498 break; 1499 case ASM_OP_PTC_G: 1500 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_G); 1501 op = ASM_OP_PTC; 1502 break; 1503 case ASM_OP_PTC_GA: 1504 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_GA); 1505 op = ASM_OP_PTC; 1506 break; 1507 case ASM_OP_PTC_L: 1508 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_L); 1509 op = ASM_OP_PTC; 1510 break; 1511 case ASM_OP_PTR_D: 1512 asm_cmpltr_add(i, ASM_CC_PTR, ASM_CT_D); 1513 op = ASM_OP_PTR; 1514 break; 1515 case ASM_OP_PTR_I: 1516 asm_cmpltr_add(i, ASM_CC_PTR, ASM_CT_I); 1517 op = ASM_OP_PTR; 1518 break; 1519 case ASM_OP_SETF_D: 1520 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_D); 1521 op = ASM_OP_SETF; 1522 break; 1523 case ASM_OP_SETF_EXP: 1524 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_EXP); 1525 op = ASM_OP_SETF; 1526 break; 1527 case ASM_OP_SETF_S: 1528 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_S); 1529 op = ASM_OP_SETF; 1530 break; 1531 case ASM_OP_SETF_SIG: 1532 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_SIG); 1533 op = ASM_OP_SETF; 1534 break; 1535 case ASM_OP_SHR_: 1536 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE); 1537 op = ASM_OP_SHR; 1538 break; 1539 case ASM_OP_SHR_U: 1540 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U); 1541 op = ASM_OP_SHR; 1542 break; 1543 case ASM_OP_SRLZ_D: 1544 asm_cmpltr_add(i, ASM_CC_SRLZ, ASM_CT_D); 1545 op = ASM_OP_SRLZ; 1546 break; 1547 case ASM_OP_SRLZ_I: 1548 asm_cmpltr_add(i, ASM_CC_SRLZ, ASM_CT_I); 1549 op = ASM_OP_SRLZ; 1550 break; 1551 case ASM_OP_ST1_: 1552 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE); 1553 op = ASM_OP_ST1; 1554 break; 1555 case ASM_OP_ST1_REL: 1556 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL); 1557 op = ASM_OP_ST1; 1558 break; 1559 case ASM_OP_ST16_: 1560 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE); 1561 op = ASM_OP_ST16; 1562 break; 1563 case ASM_OP_ST16_REL: 1564 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL); 1565 op = ASM_OP_ST16; 1566 break; 1567 case ASM_OP_ST2_: 1568 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE); 1569 op = ASM_OP_ST2; 1570 break; 1571 case ASM_OP_ST2_REL: 1572 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL); 1573 op = ASM_OP_ST2; 1574 break; 1575 case ASM_OP_ST4_: 1576 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE); 1577 op = ASM_OP_ST4; 1578 break; 1579 case ASM_OP_ST4_REL: 1580 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL); 1581 op = ASM_OP_ST4; 1582 break; 1583 case ASM_OP_ST8_: 1584 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE); 1585 op = ASM_OP_ST8; 1586 break; 1587 case ASM_OP_ST8_REL: 1588 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL); 1589 op = ASM_OP_ST8; 1590 break; 1591 case ASM_OP_ST8_SPILL: 1592 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_SPILL); 1593 op = ASM_OP_ST8; 1594 break; 1595 case ASM_OP_STF_SPILL: 1596 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_SPILL); 1597 op = ASM_OP_STF; 1598 break; 1599 case ASM_OP_SYNC_I: 1600 asm_cmpltr_add(i, ASM_CC_SYNC, ASM_CT_I); 1601 op = ASM_OP_SYNC; 1602 break; 1603 case ASM_OP_TBIT_NZ_AND: 1604 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ); 1605 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 1606 op = ASM_OP_TBIT; 1607 break; 1608 case ASM_OP_TBIT_NZ_OR: 1609 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ); 1610 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 1611 op = ASM_OP_TBIT; 1612 break; 1613 case ASM_OP_TBIT_NZ_OR_ANDCM: 1614 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ); 1615 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 1616 op = ASM_OP_TBIT; 1617 break; 1618 case ASM_OP_TBIT_Z: 1619 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); 1620 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE); 1621 op = ASM_OP_TBIT; 1622 break; 1623 case ASM_OP_TBIT_Z_AND: 1624 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); 1625 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 1626 op = ASM_OP_TBIT; 1627 break; 1628 case ASM_OP_TBIT_Z_OR: 1629 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); 1630 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 1631 op = ASM_OP_TBIT; 1632 break; 1633 case ASM_OP_TBIT_Z_OR_ANDCM: 1634 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); 1635 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 1636 op = ASM_OP_TBIT; 1637 break; 1638 case ASM_OP_TBIT_Z_UNC: 1639 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); 1640 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC); 1641 op = ASM_OP_TBIT; 1642 break; 1643 case ASM_OP_TNAT_NZ_AND: 1644 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ); 1645 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 1646 op = ASM_OP_TNAT; 1647 break; 1648 case ASM_OP_TNAT_NZ_OR: 1649 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ); 1650 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 1651 op = ASM_OP_TNAT; 1652 break; 1653 case ASM_OP_TNAT_NZ_OR_ANDCM: 1654 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ); 1655 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 1656 op = ASM_OP_TNAT; 1657 break; 1658 case ASM_OP_TNAT_Z: 1659 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); 1660 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE); 1661 op = ASM_OP_TNAT; 1662 break; 1663 case ASM_OP_TNAT_Z_AND: 1664 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); 1665 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); 1666 op = ASM_OP_TNAT; 1667 break; 1668 case ASM_OP_TNAT_Z_OR: 1669 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); 1670 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); 1671 op = ASM_OP_TNAT; 1672 break; 1673 case ASM_OP_TNAT_Z_OR_ANDCM: 1674 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); 1675 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); 1676 op = ASM_OP_TNAT; 1677 break; 1678 case ASM_OP_TNAT_Z_UNC: 1679 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); 1680 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC); 1681 op = ASM_OP_TNAT; 1682 break; 1683 case ASM_OP_UNPACK1_H: 1684 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H); 1685 op = ASM_OP_UNPACK1; 1686 break; 1687 case ASM_OP_UNPACK1_L: 1688 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L); 1689 op = ASM_OP_UNPACK1; 1690 break; 1691 case ASM_OP_UNPACK2_H: 1692 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H); 1693 op = ASM_OP_UNPACK2; 1694 break; 1695 case ASM_OP_UNPACK2_L: 1696 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L); 1697 op = ASM_OP_UNPACK2; 1698 break; 1699 case ASM_OP_UNPACK4_H: 1700 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H); 1701 op = ASM_OP_UNPACK4; 1702 break; 1703 case ASM_OP_UNPACK4_L: 1704 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L); 1705 op = ASM_OP_UNPACK4; 1706 break; 1707 case ASM_OP_XMA_H: 1708 asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_H); 1709 op = ASM_OP_XMA; 1710 break; 1711 case ASM_OP_XMA_HU: 1712 asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_HU); 1713 op = ASM_OP_XMA; 1714 break; 1715 case ASM_OP_XMA_L: 1716 asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_L); 1717 op = ASM_OP_XMA; 1718 break; 1719 default: 1720 KASSERT(op < ASM_OP_NUMBER_OF_OPCODES); 1721 break; 1722 } 1723 i->i_op = op; 1724 return (ot); 1725 } 1726 1727 static __inline void 1728 op_imm(struct asm_inst *i, int op, uint64_t val) 1729 { 1730 i->i_oper[op].o_type = ASM_OPER_IMM; 1731 i->i_oper[op].o_value = val; 1732 } 1733 1734 static __inline void 1735 op_type(struct asm_inst *i, int op, enum asm_oper_type ot) 1736 { 1737 i->i_oper[op].o_type = ot; 1738 } 1739 1740 static __inline void 1741 op_value(struct asm_inst *i, int op, uint64_t val) 1742 { 1743 i->i_oper[op].o_value = val; 1744 } 1745 1746 static __inline void 1747 operand(struct asm_inst *i, int op, enum asm_oper_type ot, uint64_t bits, 1748 int o, int l) 1749 { 1750 i->i_oper[op].o_type = ot; 1751 i->i_oper[op].o_value = FIELD(bits, o, l); 1752 } 1753 1754 static uint64_t 1755 imm(uint64_t bits, int sign, int o, int l) 1756 { 1757 uint64_t val = FIELD(bits, o, l); 1758 1759 if (sign && (val & (1LL << (l - 1))) != 0) 1760 val |= -1LL << l; 1761 return (val); 1762 } 1763 1764 static void 1765 s_imm(struct asm_inst *i, int op, uint64_t bits, int o, int l) 1766 { 1767 i->i_oper[op].o_type = ASM_OPER_IMM; 1768 i->i_oper[op].o_value = imm(bits, 1, o, l); 1769 } 1770 1771 static void 1772 u_imm(struct asm_inst *i, int op, uint64_t bits, int o, int l) 1773 { 1774 i->i_oper[op].o_type = ASM_OPER_IMM; 1775 i->i_oper[op].o_value = imm(bits, 0, o, l); 1776 } 1777 1778 static uint64_t 1779 vimm(uint64_t bits, int sign, va_list ap) 1780 { 1781 uint64_t val = 0; 1782 int len = 0; 1783 int frag; 1784 1785 while ((frag = va_arg(ap, int)) != 0) { 1786 val |= (uint64_t)FIELD(bits, FRAG_OFS(frag), FRAG_LEN(frag)) 1787 << len; 1788 len += FRAG_LEN(frag); 1789 } 1790 if (sign && (val & (1LL << (len - 1))) != 0) 1791 val |= -1LL << len; 1792 return (val); 1793 } 1794 1795 static void 1796 s_immf(struct asm_inst *i, int op, uint64_t bits, ...) 1797 { 1798 va_list ap; 1799 va_start(ap, bits); 1800 i->i_oper[op].o_type = ASM_OPER_IMM; 1801 i->i_oper[op].o_value = vimm(bits, 1, ap); 1802 va_end(ap); 1803 } 1804 1805 static void 1806 u_immf(struct asm_inst *i, int op, uint64_t bits, ...) 1807 { 1808 va_list ap; 1809 va_start(ap, bits); 1810 i->i_oper[op].o_type = ASM_OPER_IMM; 1811 i->i_oper[op].o_value = vimm(bits, 0, ap); 1812 va_end(ap); 1813 } 1814 1815 static void 1816 disp(struct asm_inst *i, int op, uint64_t bits, ...) 1817 { 1818 va_list ap; 1819 va_start(ap, bits); 1820 i->i_oper[op].o_type = ASM_OPER_DISP; 1821 i->i_oper[op].o_value = vimm(bits, 1, ap) << 4; 1822 va_end(ap); 1823 } 1824 1825 static __inline void 1826 combine(uint64_t *dst, int dl, uint64_t src, int sl, int so) 1827 { 1828 *dst = (*dst & ((1LL << dl) - 1LL)) | 1829 ((uint64_t)_FLD64(src, so, sl) << dl); 1830 } 1831 1832 int 1833 asm_extract(enum asm_op op, enum asm_fmt fmt, uint64_t bits, 1834 struct asm_bundle *b, int slot) 1835 { 1836 struct asm_inst *i = b->b_inst + slot; 1837 enum asm_oper_type ot; 1838 1839 KASSERT(op != ASM_OP_NONE); 1840 i->i_bits = bits; 1841 i->i_format = fmt; 1842 i->i_srcidx = 2; 1843 1844 ot = asm_normalize(i, op); 1845 1846 if (fmt != ASM_FMT_B6 && fmt != ASM_FMT_B7) 1847 operand(i, 0, ASM_OPER_PREG, bits, 0, 6); 1848 1849 switch (fmt) { 1850 case ASM_FMT_A1: 1851 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 1852 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 1853 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 1854 if ((op == ASM_OP_ADD && FIELD(bits, 27, 2) == 1) || 1855 (op == ASM_OP_SUB && FIELD(bits, 27, 2) == 0)) 1856 op_imm(i, 4, 1LL); 1857 break; 1858 case ASM_FMT_A2: 1859 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 1860 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 1861 op_imm(i, 3, 1LL + FIELD(bits, 27, 2)); 1862 operand(i, 4, ASM_OPER_GREG, bits, 20, 7); 1863 break; 1864 case ASM_FMT_A3: 1865 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 1866 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0); 1867 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 1868 break; 1869 case ASM_FMT_A4: 1870 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 1871 s_immf(i, 2, bits, FRAG(13,7), FRAG(27,6), FRAG(36,1), 0); 1872 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 1873 break; 1874 case ASM_FMT_A5: 1875 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 1876 s_immf(i, 2, bits, FRAG(13,7), FRAG(27,9), FRAG(22,5), 1877 FRAG(36,1), 0); 1878 operand(i, 3, ASM_OPER_GREG, bits, 20, 2); 1879 break; 1880 case ASM_FMT_A6: /* 2 dst */ 1881 operand(i, 1, ASM_OPER_PREG, bits, 6, 6); 1882 operand(i, 2, ASM_OPER_PREG, bits, 27, 6); 1883 operand(i, 3, ASM_OPER_GREG, bits, 13, 7); 1884 operand(i, 4, ASM_OPER_GREG, bits, 20, 7); 1885 i->i_srcidx++; 1886 break; 1887 case ASM_FMT_A7: /* 2 dst */ 1888 if (FIELD(bits, 13, 7) != 0) 1889 return (0); 1890 operand(i, 1, ASM_OPER_PREG, bits, 6, 6); 1891 operand(i, 2, ASM_OPER_PREG, bits, 27, 6); 1892 operand(i, 3, ASM_OPER_GREG, bits, 13, 7); 1893 operand(i, 4, ASM_OPER_GREG, bits, 20, 7); 1894 i->i_srcidx++; 1895 break; 1896 case ASM_FMT_A8: /* 2 dst */ 1897 operand(i, 1, ASM_OPER_PREG, bits, 6, 6); 1898 operand(i, 2, ASM_OPER_PREG, bits, 27, 6); 1899 s_immf(i, 3, bits, FRAG(13,7), FRAG(36,1), 0); 1900 operand(i, 4, ASM_OPER_GREG, bits, 20, 7); 1901 i->i_srcidx++; 1902 break; 1903 case ASM_FMT_A9: 1904 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 1905 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 1906 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 1907 break; 1908 case ASM_FMT_A10: 1909 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 1910 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 1911 op_imm(i, 3, 1LL + FIELD(bits, 27, 2)); 1912 operand(i, 4, ASM_OPER_GREG, bits, 20, 7); 1913 break; 1914 case ASM_FMT_B1: /* 0 dst */ 1915 asm_brhint(i); 1916 disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0); 1917 break; 1918 case ASM_FMT_B2: /* 0 dst */ 1919 if (FIELD(bits, 0, 6) != 0) 1920 return (0); 1921 asm_brhint(i); 1922 disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0); 1923 break; 1924 case ASM_FMT_B3: 1925 asm_brhint(i); 1926 operand(i, 1, ASM_OPER_BREG, bits, 6, 3); 1927 disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0); 1928 break; 1929 case ASM_FMT_B4: /* 0 dst */ 1930 asm_brhint(i); 1931 operand(i, 1, ASM_OPER_BREG, bits, 13, 3); 1932 break; 1933 case ASM_FMT_B5: 1934 #if 0 1935 if (FIELD(bits, 32, 1) == 0) 1936 return (0); 1937 #endif 1938 asm_brhint(i); 1939 operand(i, 1, ASM_OPER_BREG, bits, 6, 3); 1940 operand(i, 2, ASM_OPER_BREG, bits, 13, 3); 1941 break; 1942 case ASM_FMT_B6: /* 0 dst */ 1943 asm_brphint(i); 1944 disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0); 1945 disp(i, 2, bits, FRAG(6,7), FRAG(33,2), 0); 1946 i->i_srcidx--; 1947 break; 1948 case ASM_FMT_B7: /* 0 dst */ 1949 asm_brphint(i); 1950 operand(i, 1, ASM_OPER_BREG, bits, 13, 3); 1951 disp(i, 2, bits, FRAG(6,7), FRAG(33,2), 0); 1952 i->i_srcidx--; 1953 break; 1954 case ASM_FMT_B8: 1955 /* no operands */ 1956 break; 1957 case ASM_FMT_B9: /* 0 dst */ 1958 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0); 1959 break; 1960 case ASM_FMT_F1: 1961 asm_sf(i); 1962 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 1963 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 1964 operand(i, 3, ASM_OPER_FREG, bits, 20, 7); 1965 operand(i, 4, ASM_OPER_FREG, bits, 27, 7); 1966 break; 1967 case ASM_FMT_F2: 1968 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 1969 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 1970 operand(i, 3, ASM_OPER_FREG, bits, 20, 7); 1971 operand(i, 4, ASM_OPER_FREG, bits, 27, 7); 1972 break; 1973 case ASM_FMT_F3: 1974 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 1975 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 1976 operand(i, 3, ASM_OPER_FREG, bits, 20, 7); 1977 operand(i, 4, ASM_OPER_FREG, bits, 27, 7); 1978 break; 1979 case ASM_FMT_F4: /* 2 dst */ 1980 if (FIELD(bits, 33, 1)) { /* ra */ 1981 if (FIELD(bits, 36, 1)) /* rb */ 1982 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_UNORD); 1983 else 1984 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LE); 1985 } else { 1986 if (FIELD(bits, 36, 1)) /* rb */ 1987 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LT); 1988 else 1989 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_EQ); 1990 } 1991 if (FIELD(bits, 12, 1)) /* ta */ 1992 asm_cmpltr_add(i, ASM_CC_FCTYPE, ASM_CT_UNC); 1993 else 1994 asm_cmpltr_add(i, ASM_CC_FCTYPE, ASM_CT_NONE); 1995 asm_sf(i); 1996 operand(i, 1, ASM_OPER_PREG, bits, 6, 6); 1997 operand(i, 2, ASM_OPER_PREG, bits, 27, 6); 1998 operand(i, 3, ASM_OPER_FREG, bits, 13, 7); 1999 operand(i, 4, ASM_OPER_FREG, bits, 20, 7); 2000 i->i_srcidx++; 2001 break; 2002 case ASM_FMT_F5: /* 2 dst */ 2003 operand(i, 1, ASM_OPER_PREG, bits, 6, 6); 2004 operand(i, 2, ASM_OPER_PREG, bits, 27, 6); 2005 operand(i, 3, ASM_OPER_FREG, bits, 13, 7); 2006 u_immf(i, 4, bits, FRAG(33,2), FRAG(20,7), 0); 2007 i->i_srcidx++; 2008 break; 2009 case ASM_FMT_F6: /* 2 dst */ 2010 asm_sf(i); 2011 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2012 operand(i, 2, ASM_OPER_PREG, bits, 27, 6); 2013 operand(i, 3, ASM_OPER_FREG, bits, 13, 7); 2014 operand(i, 4, ASM_OPER_FREG, bits, 20, 7); 2015 i->i_srcidx++; 2016 break; 2017 case ASM_FMT_F7: /* 2 dst */ 2018 asm_sf(i); 2019 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2020 operand(i, 2, ASM_OPER_PREG, bits, 27, 6); 2021 operand(i, 3, ASM_OPER_FREG, bits, 20, 7); 2022 i->i_srcidx++; 2023 break; 2024 case ASM_FMT_F8: 2025 asm_sf(i); 2026 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2027 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 2028 operand(i, 3, ASM_OPER_FREG, bits, 20, 7); 2029 break; 2030 case ASM_FMT_F9: 2031 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2032 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 2033 operand(i, 3, ASM_OPER_FREG, bits, 20, 7); 2034 break; 2035 case ASM_FMT_F10: 2036 asm_sf(i); 2037 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2038 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 2039 break; 2040 case ASM_FMT_F11: 2041 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2042 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 2043 break; 2044 case ASM_FMT_F12: /* 0 dst */ 2045 asm_sf(i); 2046 u_imm(i, 1, bits, 13, 7); 2047 u_imm(i, 2, bits, 20, 7); 2048 i->i_srcidx--; 2049 break; 2050 case ASM_FMT_F13: 2051 asm_sf(i); 2052 /* no operands */ 2053 break; 2054 case ASM_FMT_F14: /* 0 dst */ 2055 asm_sf(i); 2056 disp(i, 1, bits, FRAG(6,20), FRAG(36,1), 0); 2057 break; 2058 case ASM_FMT_F15: /* 0 dst */ 2059 u_imm(i, 1, bits, 6, 20); 2060 break; 2061 case ASM_FMT_I1: 2062 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2063 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2064 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 2065 switch (FIELD(bits, 30, 2)) { 2066 case 0: op_imm(i, 4, 0LL); break; 2067 case 1: op_imm(i, 4, 7LL); break; 2068 case 2: op_imm(i, 4, 15LL); break; 2069 case 3: op_imm(i, 4, 16LL); break; 2070 } 2071 break; 2072 case ASM_FMT_I2: 2073 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2074 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2075 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 2076 break; 2077 case ASM_FMT_I3: 2078 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2079 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2080 u_imm(i, 3, bits, 20, 4); 2081 break; 2082 case ASM_FMT_I4: 2083 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2084 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2085 u_imm(i, 3, bits, 20, 8); 2086 break; 2087 case ASM_FMT_I5: 2088 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2089 operand(i, 2, ASM_OPER_GREG, bits, 20, 7); 2090 operand(i, 3, ASM_OPER_GREG, bits, 13, 7); 2091 break; 2092 case ASM_FMT_I6: 2093 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2094 operand(i, 2, ASM_OPER_GREG, bits, 20, 7); 2095 u_imm(i, 3, bits, 14, 5); 2096 break; 2097 case ASM_FMT_I7: 2098 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2099 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2100 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 2101 break; 2102 case ASM_FMT_I8: 2103 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2104 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2105 op_imm(i, 3, 31LL - FIELD(bits, 20, 5)); 2106 break; 2107 case ASM_FMT_I9: 2108 if (FIELD(bits, 13, 7) != 0) 2109 return (0); 2110 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2111 operand(i, 2, ASM_OPER_GREG, bits, 20, 7); 2112 break; 2113 case ASM_FMT_I10: 2114 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2115 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2116 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 2117 u_imm(i, 4, bits, 27, 6); 2118 break; 2119 case ASM_FMT_I11: 2120 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2121 operand(i, 2, ASM_OPER_GREG, bits, 20, 7); 2122 u_imm(i, 3, bits, 14, 6); 2123 op_imm(i, 4, 1LL + FIELD(bits, 27, 6)); 2124 break; 2125 case ASM_FMT_I12: 2126 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2127 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2128 op_imm(i, 3, 63LL - FIELD(bits, 20, 6)); 2129 op_imm(i, 4, 1LL + FIELD(bits, 27, 6)); 2130 break; 2131 case ASM_FMT_I13: 2132 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2133 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0); 2134 op_imm(i, 3, 63LL - FIELD(bits, 20, 6)); 2135 op_imm(i, 4, 1LL + FIELD(bits, 27, 6)); 2136 break; 2137 case ASM_FMT_I14: 2138 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2139 s_imm(i, 2, bits, 36, 1); 2140 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 2141 op_imm(i, 4, 63LL - FIELD(bits, 14, 6)); 2142 op_imm(i, 5, 1LL + FIELD(bits, 27, 6)); 2143 break; 2144 case ASM_FMT_I15: 2145 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2146 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2147 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 2148 op_imm(i, 4, 63LL - FIELD(bits, 31, 6)); 2149 op_imm(i, 5, 1LL + FIELD(bits, 27, 4)); 2150 break; 2151 case ASM_FMT_I16: /* 2 dst */ 2152 operand(i, 1, ASM_OPER_PREG, bits, 6, 6); 2153 operand(i, 2, ASM_OPER_PREG, bits, 27, 6); 2154 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 2155 u_imm(i, 4, bits, 14, 6); 2156 i->i_srcidx++; 2157 break; 2158 case ASM_FMT_I17: /* 2 dst */ 2159 operand(i, 1, ASM_OPER_PREG, bits, 6, 6); 2160 operand(i, 2, ASM_OPER_PREG, bits, 27, 6); 2161 operand(i, 3, ASM_OPER_GREG, bits, 20, 7); 2162 i->i_srcidx++; 2163 break; 2164 case ASM_FMT_I19: 2165 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0); 2166 break; 2167 case ASM_FMT_I20: /* 0 dst */ 2168 operand(i, 1, ASM_OPER_GREG, bits, 13, 7); 2169 disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0); 2170 i->i_srcidx--; 2171 break; 2172 case ASM_FMT_I21: 2173 switch (FIELD(bits, 20, 2)) { /* wh */ 2174 case 0: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_SPTK); break; 2175 case 1: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_NONE); break; 2176 case 2: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_DPTK); break; 2177 case 3: return (0); 2178 } 2179 if (FIELD(bits, 23, 1)) /* ih */ 2180 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_IMP); 2181 else 2182 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_NONE); 2183 operand(i, 1, ASM_OPER_BREG, bits, 6, 3); 2184 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2185 disp(i, 3, bits, FRAG(24,9), 0); 2186 break; 2187 case ASM_FMT_I22: 2188 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2189 operand(i, 2, ASM_OPER_BREG, bits, 13, 3); 2190 break; 2191 case ASM_FMT_I23: 2192 op_type(i, 1, ASM_OPER_PR); 2193 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2194 u_immf(i, 3, bits, FRAG(6,7), FRAG(24,8), FRAG(36,1), 0); 2195 i->i_oper[3].o_value <<= 1; 2196 break; 2197 case ASM_FMT_I24: 2198 op_type(i, 1, ASM_OPER_PR_ROT); 2199 s_immf(i, 2, bits, FRAG(6,27), FRAG(36,1), 0); 2200 break; 2201 case ASM_FMT_I25: 2202 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2203 op_type(i, 2, ot); 2204 break; 2205 case ASM_FMT_I26: 2206 operand(i, 1, ASM_OPER_AREG, bits, 20, 7); 2207 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2208 break; 2209 case ASM_FMT_I27: 2210 operand(i, 1, ASM_OPER_AREG, bits, 20, 7); 2211 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0); 2212 break; 2213 case ASM_FMT_I28: 2214 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2215 operand(i, 2, ASM_OPER_AREG, bits, 20, 7); 2216 break; 2217 case ASM_FMT_I29: 2218 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2219 operand(i, 2, ASM_OPER_GREG, bits, 20, 7); 2220 break; 2221 case ASM_FMT_M1: 2222 asm_hint(i, ASM_CC_LDHINT); 2223 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2224 if (i->i_op == ASM_OP_LD16) { 2225 op_type(i, 2, ASM_OPER_AREG); 2226 op_value(i, 2, AR_CSD); 2227 i->i_srcidx++; 2228 } 2229 operand(i, i->i_srcidx, ASM_OPER_MEM, bits, 20, 7); 2230 break; 2231 case ASM_FMT_M2: 2232 asm_hint(i, ASM_CC_LDHINT); 2233 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2234 operand(i, 2, ASM_OPER_MEM, bits, 20, 7); 2235 operand(i, 3, ASM_OPER_GREG, bits, 13, 7); 2236 break; 2237 case ASM_FMT_M3: 2238 asm_hint(i, ASM_CC_LDHINT); 2239 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2240 operand(i, 2, ASM_OPER_MEM, bits, 20, 7); 2241 s_immf(i, 3, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0); 2242 break; 2243 case ASM_FMT_M4: 2244 asm_hint(i, ASM_CC_STHINT); 2245 operand(i, 1, ASM_OPER_MEM, bits, 20, 7); 2246 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2247 if (i->i_op == ASM_OP_ST16) { 2248 op_type(i, 3, ASM_OPER_AREG); 2249 op_value(i, 3, AR_CSD); 2250 } 2251 break; 2252 case ASM_FMT_M5: 2253 asm_hint(i, ASM_CC_STHINT); 2254 operand(i, 1, ASM_OPER_MEM, bits, 20, 7); 2255 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2256 s_immf(i, 3, bits, FRAG(6,7), FRAG(27,1), FRAG(36,1), 0); 2257 break; 2258 case ASM_FMT_M6: 2259 asm_hint(i, ASM_CC_LDHINT); 2260 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2261 operand(i, 2, ASM_OPER_MEM, bits, 20, 7); 2262 break; 2263 case ASM_FMT_M7: 2264 asm_hint(i, ASM_CC_LDHINT); 2265 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2266 operand(i, 2, ASM_OPER_MEM, bits, 20, 7); 2267 operand(i, 3, ASM_OPER_GREG, bits, 13, 7); 2268 break; 2269 case ASM_FMT_M8: 2270 asm_hint(i, ASM_CC_LDHINT); 2271 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2272 operand(i, 2, ASM_OPER_MEM, bits, 20, 7); 2273 s_immf(i, 3, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0); 2274 break; 2275 case ASM_FMT_M9: 2276 asm_hint(i, ASM_CC_STHINT); 2277 operand(i, 1, ASM_OPER_MEM, bits, 20, 7); 2278 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 2279 break; 2280 case ASM_FMT_M10: 2281 asm_hint(i, ASM_CC_STHINT); 2282 operand(i, 1, ASM_OPER_MEM, bits, 20, 7); 2283 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 2284 s_immf(i, 3, bits, FRAG(6,7), FRAG(27,1), FRAG(36,1), 0); 2285 break; 2286 case ASM_FMT_M11: /* 2 dst */ 2287 asm_hint(i, ASM_CC_LDHINT); 2288 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2289 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 2290 operand(i, 3, ASM_OPER_MEM, bits, 20, 7); 2291 i->i_srcidx++; 2292 break; 2293 case ASM_FMT_M12: /* 2 dst */ 2294 asm_hint(i, ASM_CC_LDHINT); 2295 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2296 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 2297 operand(i, 3, ASM_OPER_MEM, bits, 20, 7); 2298 op_imm(i, 4, 8LL << FIELD(bits, 30, 1)); 2299 i->i_srcidx++; 2300 break; 2301 case ASM_FMT_M13: 2302 asm_hint(i, ASM_CC_LFHINT); 2303 operand(i, 1, ASM_OPER_MEM, bits, 20, 7); 2304 break; 2305 case ASM_FMT_M14: /* 0 dst */ 2306 asm_hint(i, ASM_CC_LFHINT); 2307 operand(i, 1, ASM_OPER_MEM, bits, 20, 7); 2308 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2309 i->i_srcidx--; 2310 break; 2311 case ASM_FMT_M15: /* 0 dst */ 2312 asm_hint(i, ASM_CC_LFHINT); 2313 operand(i, 1, ASM_OPER_MEM, bits, 20, 7); 2314 s_immf(i, 2, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0); 2315 i->i_srcidx--; 2316 break; 2317 case ASM_FMT_M16: { 2318 int oper; 2319 asm_hint(i, ASM_CC_LDHINT); 2320 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2321 operand(i, 2, ASM_OPER_MEM, bits, 20, 7); 2322 operand(i, 3, ASM_OPER_GREG, bits, 13, 7); 2323 if (i->i_op == ASM_OP_CMP8XCHG16) { 2324 op_type(i, 4, ASM_OPER_AREG); 2325 op_value(i, 4, AR_CSD); 2326 oper = 5; 2327 } else 2328 oper = 4; 2329 if (FIELD(bits, 30, 6) < 8) { 2330 op_type(i, oper, ASM_OPER_AREG); 2331 op_value(i, oper, AR_CCV); 2332 } 2333 break; 2334 } 2335 case ASM_FMT_M17: 2336 asm_hint(i, ASM_CC_LDHINT); 2337 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2338 operand(i, 2, ASM_OPER_MEM, bits, 20, 7); 2339 switch (FIELD(bits, 13, 2)) { 2340 case 0: op_imm(i, 3, 1LL << 4); break; 2341 case 1: op_imm(i, 3, 1LL << 3); break; 2342 case 2: op_imm(i, 3, 1LL << 2); break; 2343 case 3: op_imm(i, 3, 1LL); break; 2344 } 2345 if (FIELD(bits, 15, 1)) 2346 i->i_oper[3].o_value *= -1LL; 2347 break; 2348 case ASM_FMT_M18: 2349 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2350 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2351 break; 2352 case ASM_FMT_M19: 2353 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2354 operand(i, 2, ASM_OPER_FREG, bits, 13, 7); 2355 break; 2356 case ASM_FMT_M20: /* 0 dst */ 2357 operand(i, 1, ASM_OPER_GREG, bits, 13, 7); 2358 disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0); 2359 i->i_srcidx--; 2360 break; 2361 case ASM_FMT_M21: /* 0 dst */ 2362 operand(i, 1, ASM_OPER_FREG, bits, 13, 7); 2363 disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0); 2364 i->i_srcidx--; 2365 break; 2366 case ASM_FMT_M22: /* 0 dst */ 2367 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2368 disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0); 2369 i->i_srcidx--; 2370 break; 2371 case ASM_FMT_M23: /* 0 dst */ 2372 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2373 disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0); 2374 i->i_srcidx--; 2375 break; 2376 case ASM_FMT_M24: 2377 /* no operands */ 2378 break; 2379 case ASM_FMT_M25: 2380 if (FIELD(bits, 0, 6) != 0) 2381 return (0); 2382 /* no operands */ 2383 break; 2384 case ASM_FMT_M26: 2385 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2386 break; 2387 case ASM_FMT_M27: 2388 operand(i, 1, ASM_OPER_FREG, bits, 6, 7); 2389 break; 2390 case ASM_FMT_M28: 2391 operand(i, 1, ASM_OPER_GREG, bits, 20, 7); 2392 break; 2393 case ASM_FMT_M29: 2394 operand(i, 1, ASM_OPER_AREG, bits, 20, 7); 2395 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2396 break; 2397 case ASM_FMT_M30: 2398 operand(i, 1, ASM_OPER_AREG, bits, 20, 7); 2399 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0); 2400 break; 2401 case ASM_FMT_M31: 2402 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2403 operand(i, 2, ASM_OPER_AREG, bits, 20, 7); 2404 break; 2405 case ASM_FMT_M32: 2406 operand(i, 1, ASM_OPER_CREG, bits, 20, 7); 2407 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2408 break; 2409 case ASM_FMT_M33: 2410 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2411 operand(i, 2, ASM_OPER_CREG, bits, 20, 7); 2412 break; 2413 case ASM_FMT_M34: { 2414 uint64_t loc, out; 2415 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2416 op_type(i, 2, ASM_OPER_AREG); 2417 op_value(i, 2, AR_PFS); 2418 loc = FIELD(bits, 20, 7); 2419 out = FIELD(bits, 13, 7) - loc; 2420 op_imm(i, 3, 0); 2421 op_imm(i, 4, loc); 2422 op_imm(i, 5, out); 2423 op_imm(i, 6, (uint64_t)FIELD(bits, 27, 4) << 3); 2424 break; 2425 } 2426 case ASM_FMT_M35: 2427 if (FIELD(bits, 27, 6) == 0x2D) 2428 op_type(i, 1, ASM_OPER_PSR_L); 2429 else 2430 op_type(i, 1, ASM_OPER_PSR_UM); 2431 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2432 break; 2433 case ASM_FMT_M36: 2434 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2435 if (FIELD(bits, 27, 6) == 0x25) 2436 op_type(i, 2, ASM_OPER_PSR); 2437 else 2438 op_type(i, 2, ASM_OPER_PSR_UM); 2439 break; 2440 case ASM_FMT_M37: 2441 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0); 2442 break; 2443 case ASM_FMT_M38: 2444 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2445 operand(i, 2, ASM_OPER_GREG, bits, 20, 7); 2446 operand(i, 3, ASM_OPER_GREG, bits, 13, 7); 2447 break; 2448 case ASM_FMT_M39: 2449 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2450 operand(i, 2, ASM_OPER_GREG, bits, 20, 7); 2451 u_imm(i, 3, bits, 13, 2); 2452 break; 2453 case ASM_FMT_M40: /* 0 dst */ 2454 operand(i, 1, ASM_OPER_GREG, bits, 20, 7); 2455 u_imm(i, 2, bits, 13, 2); 2456 i->i_srcidx--; 2457 break; 2458 case ASM_FMT_M41: 2459 operand(i, 1, ASM_OPER_GREG, bits, 13, 7); 2460 break; 2461 case ASM_FMT_M42: 2462 operand(i, 1, ot, bits, 20, 7); 2463 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2464 break; 2465 case ASM_FMT_M43: 2466 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2467 operand(i, 2, ot, bits, 20, 7); 2468 break; 2469 case ASM_FMT_M44: 2470 u_immf(i, 1, bits, FRAG(6,21), FRAG(31,2), FRAG(36,1), 0); 2471 break; 2472 case ASM_FMT_M45: /* 0 dst */ 2473 operand(i, 1, ASM_OPER_GREG, bits, 20, 7); 2474 operand(i, 2, ASM_OPER_GREG, bits, 13, 7); 2475 i->i_srcidx--; 2476 break; 2477 case ASM_FMT_M46: 2478 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2479 operand(i, 2, ASM_OPER_GREG, bits, 20, 7); 2480 break; 2481 case ASM_FMT_X1: 2482 KASSERT(slot == 2); 2483 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0); 2484 combine(&i->i_oper[1].o_value, 21, b->b_inst[1].i_bits, 41, 0); 2485 break; 2486 case ASM_FMT_X2: 2487 KASSERT(slot == 2); 2488 operand(i, 1, ASM_OPER_GREG, bits, 6, 7); 2489 u_immf(i, 2, bits, FRAG(13,7), FRAG(27,9), FRAG(22,5), 2490 FRAG(21,1), 0); 2491 combine(&i->i_oper[2].o_value, 22, b->b_inst[1].i_bits, 41, 0); 2492 combine(&i->i_oper[2].o_value, 63, bits, 1, 36); 2493 break; 2494 case ASM_FMT_X3: 2495 KASSERT(slot == 2); 2496 asm_brhint(i); 2497 u_imm(i, 1, bits, 13, 20); 2498 combine(&i->i_oper[1].o_value, 20, b->b_inst[1].i_bits, 39, 2); 2499 combine(&i->i_oper[1].o_value, 59, bits, 1, 36); 2500 i->i_oper[1].o_value <<= 4; 2501 i->i_oper[1].o_type = ASM_OPER_DISP; 2502 break; 2503 case ASM_FMT_X4: 2504 KASSERT(slot == 2); 2505 asm_brhint(i); 2506 operand(i, 1, ASM_OPER_BREG, bits, 6, 3); 2507 u_imm(i, 2, bits, 13, 20); 2508 combine(&i->i_oper[2].o_value, 20, b->b_inst[1].i_bits, 39, 2); 2509 combine(&i->i_oper[2].o_value, 59, bits, 1, 36); 2510 i->i_oper[2].o_value <<= 4; 2511 i->i_oper[2].o_type = ASM_OPER_DISP; 2512 break; 2513 default: 2514 KASSERT(fmt == ASM_FMT_NONE); 2515 return (0); 2516 } 2517 2518 return (1); 2519 } 2520
Indexes created Wed Oct 01 12:09:54 GMT 2025