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cpu.h revision 1.8
      1  1.8  kiyohara /*	$NetBSD: cpu.h,v 1.8 2009/07/20 04:41:37 kiyohara Exp $	*/
      2  1.1    cherry 
      3  1.1    cherry /*-
      4  1.1    cherry  * Copyright (c) 2006 The NetBSD Foundation, Inc.
      5  1.1    cherry  * All rights reserved.
      6  1.1    cherry  *
      7  1.1    cherry  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1    cherry  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  1.1    cherry  * NASA Ames Research Center, and by Charles M. Hannum.
     10  1.1    cherry  *
     11  1.1    cherry  * Redistribution and use in source and binary forms, with or without
     12  1.1    cherry  * modification, are permitted provided that the following conditions
     13  1.1    cherry  * are met:
     14  1.1    cherry  * 1. Redistributions of source code must retain the above copyright
     15  1.1    cherry  *    notice, this list of conditions and the following disclaimer.
     16  1.1    cherry  * 2. Redistributions in binary form must reproduce the above copyright
     17  1.1    cherry  *    notice, this list of conditions and the following disclaimer in the
     18  1.1    cherry  *    documentation and/or other materials provided with the distribution.
     19  1.1    cherry  *
     20  1.1    cherry  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  1.1    cherry  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  1.1    cherry  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  1.1    cherry  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  1.1    cherry  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  1.1    cherry  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  1.1    cherry  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  1.1    cherry  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  1.1    cherry  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  1.1    cherry  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  1.1    cherry  * POSSIBILITY OF SUCH DAMAGE.
     31  1.1    cherry  */
     32  1.1    cherry 
     33  1.1    cherry 
     34  1.1    cherry /*-
     35  1.1    cherry  * Copyright (c) 1988 University of Utah.
     36  1.1    cherry  * Copyright (c) 1982, 1990, 1993
     37  1.1    cherry  *	The Regents of the University of California.  All rights reserved.
     38  1.1    cherry  *
     39  1.1    cherry  * This code is derived from software contributed to Berkeley by
     40  1.1    cherry  * the Systems Programming Group of the University of Utah Computer
     41  1.1    cherry  * Science Department.
     42  1.1    cherry  *
     43  1.1    cherry  * Redistribution and use in source and binary forms, with or without
     44  1.1    cherry  * modification, are permitted provided that the following conditions
     45  1.1    cherry  * are met:
     46  1.1    cherry  * 1. Redistributions of source code must retain the above copyright
     47  1.1    cherry  *    notice, this list of conditions and the following disclaimer.
     48  1.1    cherry  * 2. Redistributions in binary form must reproduce the above copyright
     49  1.1    cherry  *    notice, this list of conditions and the following disclaimer in the
     50  1.1    cherry  *    documentation and/or other materials provided with the distribution.
     51  1.1    cherry  * 4. Neither the name of the University nor the names of its contributors
     52  1.1    cherry  *    may be used to endorse or promote products derived from this software
     53  1.1    cherry  *    without specific prior written permission.
     54  1.1    cherry  *
     55  1.1    cherry  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     56  1.1    cherry  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     57  1.1    cherry  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     58  1.1    cherry  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     59  1.1    cherry  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     60  1.1    cherry  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     61  1.1    cherry  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     62  1.1    cherry  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     63  1.1    cherry  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     64  1.1    cherry  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     65  1.1    cherry  * SUCH DAMAGE.
     66  1.1    cherry  *
     67  1.1    cherry  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     68  1.1    cherry  *
     69  1.1    cherry  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     70  1.1    cherry  */
     71  1.1    cherry 
     72  1.1    cherry 
     73  1.1    cherry #ifndef _IA64_CPU_H_
     74  1.1    cherry #define _IA64_CPU_H_
     75  1.1    cherry 
     76  1.1    cherry #ifdef _KERNEL
     77  1.1    cherry #include <sys/cpu_data.h>
     78  1.3   tsutsui #include <sys/cctr.h>
     79  1.1    cherry #include <machine/frame.h>
     80  1.1    cherry #include <machine/ia64_cpu.h>
     81  1.1    cherry 
     82  1.1    cherry 
     83  1.1    cherry struct cpu_info {
     84  1.1    cherry 	struct device *ci_dev;		/* pointer to our device */
     85  1.8  kiyohara 
     86  1.1    cherry 	/*
     87  1.1    cherry 	 * Public members.
     88  1.1    cherry 	 */
     89  1.1    cherry 	struct lwp *ci_curlwp;		/* current owner of the processor */
     90  1.1    cherry 	struct cpu_data ci_data;	/* MI per-cpu data */
     91  1.3   tsutsui 	struct cctr_state ci_cc;	/* cycle counter state */
     92  1.1    cherry 	struct cpu_info *ci_next;	/* next cpu_info structure */
     93  1.1    cherry 
     94  1.5     kochi 	volatile int ci_mtx_count;	/* Negative count of spin mutexes */
     95  1.5     kochi 	volatile int ci_mtx_oldspl;	/* Old SPL at this ci_idepth */
     96  1.5     kochi 
     97  1.1    cherry 	/* XXX: Todo */
     98  1.1    cherry 	/*
     99  1.1    cherry 	 * Private members.
    100  1.1    cherry 	 */
    101  1.1    cherry 	cpuid_t ci_cpuid;		/* our CPU ID */
    102  1.1    cherry 	struct pmap *ci_pmap;		/* current pmap */
    103  1.1    cherry 	struct lwp *ci_fpcurlwp;	/* current owner of the FPU */
    104  1.1    cherry 	paddr_t ci_curpcb;		/* PA of current HW PCB */
    105  1.1    cherry 	struct pcb *ci_idle_pcb;	/* our idle PCB */
    106  1.1    cherry 	u_long ci_want_resched;		/* preempt current process */
    107  1.1    cherry 	u_long ci_intrdepth;		/* interrupt trap depth */
    108  1.1    cherry 	struct trapframe *ci_db_regs;	/* registers for debuggers */
    109  1.8  kiyohara 	uint64_t ci_clock;		/* clock counter */
    110  1.8  kiyohara 	uint64_t ci_clockadj;		/* clock adjust */
    111  1.1    cherry };
    112  1.1    cherry 
    113  1.1    cherry 
    114  1.1    cherry extern struct cpu_info cpu_info_primary;
    115  1.1    cherry 
    116  1.1    cherry #ifdef MULTIPROCESSOR
    117  1.5     kochi /*
    118  1.5     kochi  * XXX: TODO use percpu infrastructure that yamt proposed or use KR? for
    119  1.5     kochi  * storing the percpu pointer.
    120  1.5     kochi  */
    121  1.1    cherry #else
    122  1.1    cherry #define	curcpu() (&cpu_info_primary)
    123  1.1    cherry #endif /* MULTIPROCESSOR */
    124  1.8  kiyohara #define curlwp	(curcpu()->ci_curlwp)
    125  1.1    cherry 
    126  1.1    cherry #define cpu_number() 0              /*XXX: FIXME */
    127  1.1    cherry 
    128  1.5     kochi #define aston(l) ((l)->l_md.md_astpending = 1)
    129  1.1    cherry 
    130  1.1    cherry #define	need_resched(ci)            /*XXX: FIXME */
    131  1.1    cherry 
    132  1.1    cherry struct clockframe {
    133  1.1    cherry 	struct trapframe cf_tf;
    134  1.1    cherry };
    135  1.1    cherry 
    136  1.8  kiyohara #define	CLKF_PC(cf)		(TRAPF_PC(&(cf)->cf_tf))
    137  1.8  kiyohara #define	CLKF_CPL(cf)		(TRAPF_CPL(&(cf)->cf_tf))
    138  1.8  kiyohara #define	CLKF_USERMODE(cf)	(TRAPF_USERMODE(&(cf)->cf_tf))
    139  1.1    cherry #define	CLKF_INTR(frame)	(curcpu()->ci_intrdepth)
    140  1.1    cherry 
    141  1.1    cherry #define	TRAPF_PC(tf)		((tf)->tf_special.iip)
    142  1.1    cherry #define	TRAPF_CPL(tf)		((tf)->tf_special.psr & IA64_PSR_CPL)
    143  1.1    cherry #define	TRAPF_USERMODE(tf)	(TRAPF_CPL(tf) != IA64_PSR_CPL_KERN)
    144  1.1    cherry 
    145  1.1    cherry /*
    146  1.1    cherry  * Give a profiling tick to the current process when the user profiling
    147  1.1    cherry  * buffer pages are invalid. XXX:Fixme.... On the ia64 I haven't yet figured
    148  1.1    cherry  * out what to do about this.. XXX.
    149  1.1    cherry  */
    150  1.5     kochi /* extern void	cpu_need_proftick(struct lwp *l); */
    151  1.5     kochi #define cpu_need_proftick(l)
    152  1.1    cherry 
    153  1.1    cherry /*
    154  1.5     kochi  * Notify the LWP l that it has a signal pending, process as soon as possible.
    155  1.1    cherry  */
    156  1.5     kochi #define	cpu_signotify(l)	aston(l)
    157  1.5     kochi 
    158  1.5     kochi // void cpu_need_resched(struct cpu_info *ci, int flags)
    159  1.5     kochi #define cpu_need_resched(ci, f) do { \
    160  1.5     kochi } while(0)
    161  1.1    cherry 
    162  1.1    cherry #define setsoftclock()              /*XXX: FIXME */
    163  1.1    cherry 
    164  1.1    cherry /* machdep.c */
    165  1.5     kochi int cpu_maxproc(void); /*XXX: Fill in machdep.c */
    166  1.1    cherry 
    167  1.1    cherry #define	cpu_proc_fork(p1, p2) /* XXX: Look into this. */
    168  1.1    cherry 
    169  1.5     kochi #define DELAY(x)		/* XXX: FIXME */
    170  1.5     kochi 
    171  1.5     kochi static inline void cpu_idle(void);
    172  1.5     kochi static inline
    173  1.7    cegger void cpu_idle(void)
    174  1.5     kochi {
    175  1.5     kochi 	asm ("hint @pause" ::: "memory");
    176  1.5     kochi }
    177  1.5     kochi 
    178  1.5     kochi /* XXX: revisit later */
    179  1.5     kochi #define __NO_CPU_LWP_FREE
    180  1.1    cherry 
    181  1.1    cherry #endif /* _KERNEL_ */
    182  1.1    cherry #endif /* _IA64_CPU_H */
    183