cpu.h revision 1.1.14.5
1 /* $NetBSD: cpu.h,v 1.1.14.5 2008/03/24 09:38:39 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center, and by Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 41 /*- 42 * Copyright (c) 1988 University of Utah. 43 * Copyright (c) 1982, 1990, 1993 44 * The Regents of the University of California. All rights reserved. 45 * 46 * This code is derived from software contributed to Berkeley by 47 * the Systems Programming Group of the University of Utah Computer 48 * Science Department. 49 * 50 * Redistribution and use in source and binary forms, with or without 51 * modification, are permitted provided that the following conditions 52 * are met: 53 * 1. Redistributions of source code must retain the above copyright 54 * notice, this list of conditions and the following disclaimer. 55 * 2. Redistributions in binary form must reproduce the above copyright 56 * notice, this list of conditions and the following disclaimer in the 57 * documentation and/or other materials provided with the distribution. 58 * 4. Neither the name of the University nor the names of its contributors 59 * may be used to endorse or promote products derived from this software 60 * without specific prior written permission. 61 * 62 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 63 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 64 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 65 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 66 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 67 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 68 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 69 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 70 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 71 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 72 * SUCH DAMAGE. 73 * 74 * from: Utah $Hdr: cpu.h 1.16 91/03/25$ 75 * 76 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 77 */ 78 79 80 #ifndef _IA64_CPU_H_ 81 #define _IA64_CPU_H_ 82 83 #ifdef _KERNEL 84 #include <sys/cpu_data.h> 85 #include <sys/cctr.h> 86 #include <machine/frame.h> 87 #include <machine/ia64_cpu.h> 88 89 90 struct cpu_info { 91 struct device *ci_dev; /* pointer to our device */ 92 struct cpu_info *ci_self; /* self-pointer */ 93 /* 94 * Public members. 95 */ 96 struct lwp *ci_curlwp; /* current owner of the processor */ 97 struct cpu_data ci_data; /* MI per-cpu data */ 98 struct cctr_state ci_cc; /* cycle counter state */ 99 struct cpu_info *ci_next; /* next cpu_info structure */ 100 101 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 102 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 103 104 /* XXX: Todo */ 105 /* 106 * Private members. 107 */ 108 cpuid_t ci_cpuid; /* our CPU ID */ 109 struct pmap *ci_pmap; /* current pmap */ 110 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 111 paddr_t ci_curpcb; /* PA of current HW PCB */ 112 struct pcb *ci_idle_pcb; /* our idle PCB */ 113 struct cpu_softc *ci_softc; /* pointer to our device */ 114 u_long ci_want_resched; /* preempt current process */ 115 u_long ci_intrdepth; /* interrupt trap depth */ 116 struct trapframe *ci_db_regs; /* registers for debuggers */ 117 }; 118 119 120 extern struct cpu_info cpu_info_primary; 121 122 #ifdef MULTIPROCESSOR 123 /* 124 * XXX: TODO use percpu infrastructure that yamt proposed or use KR? for 125 * storing the percpu pointer. 126 */ 127 #else 128 #define curcpu() (&cpu_info_primary) 129 #endif /* MULTIPROCESSOR */ 130 131 #define cpu_number() 0 /*XXX: FIXME */ 132 133 #define aston(l) ((l)->l_md.md_astpending = 1) 134 135 #define need_resched(ci) /*XXX: FIXME */ 136 137 struct clockframe { 138 struct trapframe cf_tf; 139 }; 140 141 #define CLKF_PC(cf) ((cf)->cf_tf.tf_special.iip) 142 #define CLKF_CPL(cf) ((cf)->cf_tf.tf_special.psr & IA64_PSR_CPL) 143 #define CLKF_USERMODE(cf) (CLKF_CPL(cf) != IA64_PSR_CPL_KERN) 144 #define CLKF_INTR(frame) (curcpu()->ci_intrdepth) 145 146 #define TRAPF_PC(tf) ((tf)->tf_special.iip) 147 #define TRAPF_CPL(tf) ((tf)->tf_special.psr & IA64_PSR_CPL) 148 #define TRAPF_USERMODE(tf) (TRAPF_CPL(tf) != IA64_PSR_CPL_KERN) 149 150 /* 151 * Give a profiling tick to the current process when the user profiling 152 * buffer pages are invalid. XXX:Fixme.... On the ia64 I haven't yet figured 153 * out what to do about this.. XXX. 154 */ 155 /* extern void cpu_need_proftick(struct lwp *l); */ 156 #define cpu_need_proftick(l) 157 158 /* 159 * Notify the LWP l that it has a signal pending, process as soon as possible. 160 */ 161 #define cpu_signotify(l) aston(l) 162 163 // void cpu_need_resched(struct cpu_info *ci, int flags) 164 #define cpu_need_resched(ci, f) do { \ 165 } while(0) 166 167 #define setsoftclock() /*XXX: FIXME */ 168 169 /* machdep.c */ 170 int cpu_maxproc(void); /*XXX: Fill in machdep.c */ 171 172 #define cpu_proc_fork(p1, p2) /* XXX: Look into this. */ 173 174 #define DELAY(x) /* XXX: FIXME */ 175 176 static inline void cpu_idle(void); 177 static inline 178 void cpu_idle() 179 { 180 asm ("hint @pause" ::: "memory"); 181 } 182 183 /* XXX: revisit later */ 184 #define __NO_CPU_LWP_FREE 185 186 #endif /* _KERNEL_ */ 187 #endif /* _IA64_CPU_H */ 188
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