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cpu.h revision 1.7
      1 /*	$NetBSD: cpu.h,v 1.7 2009/03/18 10:22:30 cegger Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2006 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center, and by Charles M. Hannum.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  * POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 
     34 /*-
     35  * Copyright (c) 1988 University of Utah.
     36  * Copyright (c) 1982, 1990, 1993
     37  *	The Regents of the University of California.  All rights reserved.
     38  *
     39  * This code is derived from software contributed to Berkeley by
     40  * the Systems Programming Group of the University of Utah Computer
     41  * Science Department.
     42  *
     43  * Redistribution and use in source and binary forms, with or without
     44  * modification, are permitted provided that the following conditions
     45  * are met:
     46  * 1. Redistributions of source code must retain the above copyright
     47  *    notice, this list of conditions and the following disclaimer.
     48  * 2. Redistributions in binary form must reproduce the above copyright
     49  *    notice, this list of conditions and the following disclaimer in the
     50  *    documentation and/or other materials provided with the distribution.
     51  * 4. Neither the name of the University nor the names of its contributors
     52  *    may be used to endorse or promote products derived from this software
     53  *    without specific prior written permission.
     54  *
     55  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     56  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     57  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     58  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     59  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     60  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     61  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     62  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     63  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     64  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     65  * SUCH DAMAGE.
     66  *
     67  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     68  *
     69  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     70  */
     71 
     72 
     73 #ifndef _IA64_CPU_H_
     74 #define _IA64_CPU_H_
     75 
     76 #ifdef _KERNEL
     77 #include <sys/cpu_data.h>
     78 #include <sys/cctr.h>
     79 #include <machine/frame.h>
     80 #include <machine/ia64_cpu.h>
     81 
     82 
     83 struct cpu_info {
     84 	struct device *ci_dev;		/* pointer to our device */
     85 	struct cpu_info *ci_self;	/* self-pointer */
     86 	/*
     87 	 * Public members.
     88 	 */
     89 	struct lwp *ci_curlwp;		/* current owner of the processor */
     90 	struct cpu_data ci_data;	/* MI per-cpu data */
     91 	struct cctr_state ci_cc;	/* cycle counter state */
     92 	struct cpu_info *ci_next;	/* next cpu_info structure */
     93 
     94 	volatile int ci_mtx_count;	/* Negative count of spin mutexes */
     95 	volatile int ci_mtx_oldspl;	/* Old SPL at this ci_idepth */
     96 
     97 	/* XXX: Todo */
     98 	/*
     99 	 * Private members.
    100 	 */
    101 	cpuid_t ci_cpuid;		/* our CPU ID */
    102 	struct pmap *ci_pmap;		/* current pmap */
    103 	struct lwp *ci_fpcurlwp;	/* current owner of the FPU */
    104 	paddr_t ci_curpcb;		/* PA of current HW PCB */
    105 	struct pcb *ci_idle_pcb;	/* our idle PCB */
    106 	struct cpu_softc *ci_softc;	/* pointer to our device */
    107 	u_long ci_want_resched;		/* preempt current process */
    108 	u_long ci_intrdepth;		/* interrupt trap depth */
    109 	struct trapframe *ci_db_regs;	/* registers for debuggers */
    110 };
    111 
    112 
    113 extern struct cpu_info cpu_info_primary;
    114 
    115 #ifdef MULTIPROCESSOR
    116 /*
    117  * XXX: TODO use percpu infrastructure that yamt proposed or use KR? for
    118  * storing the percpu pointer.
    119  */
    120 #else
    121 #define	curcpu() (&cpu_info_primary)
    122 #endif /* MULTIPROCESSOR */
    123 
    124 #define cpu_number() 0              /*XXX: FIXME */
    125 
    126 #define aston(l) ((l)->l_md.md_astpending = 1)
    127 
    128 #define	need_resched(ci)            /*XXX: FIXME */
    129 
    130 struct clockframe {
    131 	struct trapframe cf_tf;
    132 };
    133 
    134 #define	CLKF_PC(cf)		((cf)->cf_tf.tf_special.iip)
    135 #define	CLKF_CPL(cf)		((cf)->cf_tf.tf_special.psr & IA64_PSR_CPL)
    136 #define	CLKF_USERMODE(cf)	(CLKF_CPL(cf) != IA64_PSR_CPL_KERN)
    137 #define	CLKF_INTR(frame)	(curcpu()->ci_intrdepth)
    138 
    139 #define	TRAPF_PC(tf)		((tf)->tf_special.iip)
    140 #define	TRAPF_CPL(tf)		((tf)->tf_special.psr & IA64_PSR_CPL)
    141 #define	TRAPF_USERMODE(tf)	(TRAPF_CPL(tf) != IA64_PSR_CPL_KERN)
    142 
    143 /*
    144  * Give a profiling tick to the current process when the user profiling
    145  * buffer pages are invalid. XXX:Fixme.... On the ia64 I haven't yet figured
    146  * out what to do about this.. XXX.
    147  */
    148 /* extern void	cpu_need_proftick(struct lwp *l); */
    149 #define cpu_need_proftick(l)
    150 
    151 /*
    152  * Notify the LWP l that it has a signal pending, process as soon as possible.
    153  */
    154 #define	cpu_signotify(l)	aston(l)
    155 
    156 // void cpu_need_resched(struct cpu_info *ci, int flags)
    157 #define cpu_need_resched(ci, f) do { \
    158 } while(0)
    159 
    160 #define setsoftclock()              /*XXX: FIXME */
    161 
    162 /* machdep.c */
    163 int cpu_maxproc(void); /*XXX: Fill in machdep.c */
    164 
    165 #define	cpu_proc_fork(p1, p2) /* XXX: Look into this. */
    166 
    167 #define DELAY(x)		/* XXX: FIXME */
    168 
    169 static inline void cpu_idle(void);
    170 static inline
    171 void cpu_idle(void)
    172 {
    173 	asm ("hint @pause" ::: "memory");
    174 }
    175 
    176 /* XXX: revisit later */
    177 #define __NO_CPU_LWP_FREE
    178 
    179 #endif /* _KERNEL_ */
    180 #endif /* _IA64_CPU_H */
    181