1 1.1 cherry /* $NetBSD: pal.h,v 1.1 2006/04/07 14:21:18 cherry Exp $ */ 2 1.1 cherry 3 1.1 cherry /*- 4 1.1 cherry * Copyright (c) 2000 Doug Rabson 5 1.1 cherry * All rights reserved. 6 1.1 cherry * 7 1.1 cherry * Redistribution and use in source and binary forms, with or without 8 1.1 cherry * modification, are permitted provided that the following conditions 9 1.1 cherry * are met: 10 1.1 cherry * 1. Redistributions of source code must retain the above copyright 11 1.1 cherry * notice, this list of conditions and the following disclaimer. 12 1.1 cherry * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 cherry * notice, this list of conditions and the following disclaimer in the 14 1.1 cherry * documentation and/or other materials provided with the distribution. 15 1.1 cherry * 16 1.1 cherry * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 1.1 cherry * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 1.1 cherry * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 1.1 cherry * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 1.1 cherry * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 1.1 cherry * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 1.1 cherry * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 1.1 cherry * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 1.1 cherry * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 cherry * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 cherry * SUCH DAMAGE. 27 1.1 cherry * 28 1.1 cherry * $FreeBSD$ 29 1.1 cherry */ 30 1.1 cherry 31 1.1 cherry #ifndef _MACHINE_PAL_H_ 32 1.1 cherry #define _MACHINE_PAL_H_ 33 1.1 cherry 34 1.1 cherry /* 35 1.1 cherry * Architected static calling convention procedures. 36 1.1 cherry */ 37 1.1 cherry #define PAL_CACHE_FLUSH 1 38 1.1 cherry #define PAL_CACHE_INFO 2 39 1.1 cherry #define PAL_CACHE_INIT 3 40 1.1 cherry #define PAL_CACHE_SUMMARY 4 41 1.1 cherry #define PAL_MEM_ATTRIB 5 42 1.1 cherry #define PAL_PTCE_INFO 6 43 1.1 cherry #define PAL_VM_INFO 7 44 1.1 cherry #define PAL_VM_SUMMARY 8 45 1.1 cherry #define PAL_BUS_GET_FEATURES 9 46 1.1 cherry #define PAL_BUS_SET_FEATURES 10 47 1.1 cherry #define PAL_DEBUG_INFO 11 48 1.1 cherry #define PAL_FIXED_ADDR 12 49 1.1 cherry #define PAL_FREQ_BASE 13 50 1.1 cherry #define PAL_FREQ_RATIOS 14 51 1.1 cherry #define PAL_PERF_MON_INFO 15 52 1.1 cherry #define PAL_PLATFORM_ADDR 16 53 1.1 cherry #define PAL_PROC_GET_FEATURE 17 54 1.1 cherry #define PAL_PROC_SET_FEATURE 18 55 1.1 cherry #define PAL_RSE_INFO 19 56 1.1 cherry #define PAL_VERSION 20 57 1.1 cherry #define PAL_MC_CLEAR_LOG 21 58 1.1 cherry #define PAL_MC_DRAIN 22 59 1.1 cherry #define PAL_MC_DYNAMIC_STATE 24 60 1.1 cherry #define PAL_MC_ERROR_INFO 25 61 1.1 cherry #define PAL_MC_EXPECTED 23 62 1.1 cherry #define PAL_MC_REGISTER_MEM 27 63 1.1 cherry #define PAL_MC_RESUME 26 64 1.1 cherry #define PAL_HALT 28 65 1.1 cherry #define PAL_HALT_LIGHT 29 66 1.1 cherry #define PAL_COPY_INFO 30 67 1.1 cherry #define PAL_CACHE_LINE_INIT 31 68 1.1 cherry #define PAL_PMI_ENTRYPOINT 32 69 1.1 cherry #define PAL_ENTER_IA_32_ENV 33 70 1.1 cherry #define PAL_VM_PAGE_SIZE 34 71 1.1 cherry #define PAL_MEM_FOR_TEST 37 72 1.1 cherry #define PAL_CACHE_PROT_INFO 38 73 1.1 cherry #define PAL_REGISTER_INFO 39 74 1.1 cherry #define PAL_SHUTDOWN 40 75 1.1 cherry #define PAL_PREFETCH_VISIBILITY 41 76 1.1 cherry 77 1.1 cherry /* 78 1.1 cherry * Architected stacked calling convention procedures. 79 1.1 cherry */ 80 1.1 cherry #define PAL_COPY_PAL 256 81 1.1 cherry #define PAL_HALT_INFO 257 82 1.1 cherry #define PAL_TEST_PROC 258 83 1.1 cherry #define PAL_CACHE_READ 259 84 1.1 cherry #define PAL_CACHE_WRITE 260 85 1.1 cherry #define PAL_VM_TR_READ 261 86 1.1 cherry 87 1.1 cherry /* 88 1.1 cherry * Default physical address of the Processor Interrupt Block (PIB). 89 1.1 cherry * See also: IA-64 SDM, rev 1.1, volume 2, page 5-31. 90 1.1 cherry */ 91 1.1 cherry #define PAL_PIB_DEFAULT_ADDR 0x00000000FEE00000L 92 1.1 cherry 93 1.1 cherry struct ia64_pal_result { 94 1.1 cherry int64_t pal_status; 95 1.1 cherry u_int64_t pal_result[3]; 96 1.1 cherry }; 97 1.1 cherry 98 1.1 cherry extern struct ia64_pal_result 99 1.1 cherry ia64_call_pal_static(u_int64_t proc, u_int64_t arg1, 100 1.1 cherry u_int64_t arg2, u_int64_t arg3); 101 1.1 cherry extern struct ia64_pal_result 102 1.1 cherry ia64_call_pal_static_physical(u_int64_t proc, u_int64_t arg1, 103 1.1 cherry u_int64_t arg2, u_int64_t arg3); 104 1.1 cherry extern struct ia64_pal_result 105 1.1 cherry ia64_call_pal_stacked(u_int64_t proc, u_int64_t arg1, 106 1.1 cherry u_int64_t arg2, u_int64_t arg3); 107 1.1 cherry extern struct ia64_pal_result 108 1.1 cherry ia64_call_pal_stacked_physical(u_int64_t proc, u_int64_t arg1, 109 1.1 cherry u_int64_t arg2, u_int64_t arg3); 110 1.1 cherry 111 1.1 cherry #endif /* _MACHINE_PAL_H_ */ 112