vmparam.h revision 1.11 1 1.11 scole /* $NetBSD: vmparam.h,v 1.11 2019/03/29 16:04:54 scole Exp $ */
2 1.1 cherry
3 1.1 cherry /*-
4 1.1 cherry * Copyright (c) 1990 The Regents of the University of California.
5 1.1 cherry * All rights reserved.
6 1.1 cherry *
7 1.1 cherry * This code is derived from software contributed to Berkeley by
8 1.1 cherry * William Jolitz.
9 1.1 cherry *
10 1.1 cherry * Redistribution and use in source and binary forms, with or without
11 1.1 cherry * modification, are permitted provided that the following conditions
12 1.1 cherry * are met:
13 1.1 cherry * 1. Redistributions of source code must retain the above copyright
14 1.1 cherry * notice, this list of conditions and the following disclaimer.
15 1.1 cherry * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 cherry * notice, this list of conditions and the following disclaimer in the
17 1.1 cherry * documentation and/or other materials provided with the distribution.
18 1.1 cherry * 3. Neither the name of the University nor the names of its contributors
19 1.1 cherry * may be used to endorse or promote products derived from this software
20 1.1 cherry * without specific prior written permission.
21 1.1 cherry *
22 1.1 cherry * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 1.1 cherry * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.1 cherry * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.1 cherry * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 1.1 cherry * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.1 cherry * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 1.1 cherry * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 1.1 cherry * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 1.1 cherry * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 1.1 cherry * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 cherry * SUCH DAMAGE.
33 1.1 cherry *
34 1.1 cherry * @(#)vmparam.h 5.9 (Berkeley) 5/12/91
35 1.1 cherry */
36 1.1 cherry
37 1.1 cherry #ifndef _VMPARAM_H_
38 1.1 cherry #define _VMPARAM_H_
39 1.1 cherry
40 1.1 cherry #define USRSTACK VM_MAX_ADDRESS /* XXX: Revisit vm address space. */
41 1.1 cherry
42 1.1 cherry /*
43 1.1 cherry * Virtual memory related constants, all in bytes
44 1.1 cherry */
45 1.1 cherry #ifndef MAXTSIZ
46 1.1 cherry #define MAXTSIZ (1<<30) /* max text size (1G) */
47 1.1 cherry #endif
48 1.1 cherry #ifndef DFLDSIZ
49 1.1 cherry #define DFLDSIZ (1<<27) /* initial data size (128M) */
50 1.1 cherry #endif
51 1.1 cherry #ifndef MAXDSIZ
52 1.1 cherry #define MAXDSIZ (1<<30) /* max data size (1G) */
53 1.1 cherry #endif
54 1.1 cherry #ifndef DFLSSIZ
55 1.1 cherry #define DFLSSIZ (1<<21) /* initial stack size (2M) */
56 1.1 cherry #endif
57 1.1 cherry #ifndef MAXSSIZ
58 1.1 cherry #define MAXSSIZ (1<<28) /* max stack size (256M) */
59 1.1 cherry #endif
60 1.1 cherry
61 1.8 scole #define IA64_VM_MINKERN_REGION 4
62 1.1 cherry
63 1.1 cherry /*
64 1.1 cherry * PTEs for mapping user space into the kernel for phyio operations.
65 1.1 cherry * 64 pte's are enough to cover 8 disks * MAXBSIZE.
66 1.1 cherry */
67 1.1 cherry #ifndef USRIOSIZE
68 1.1 cherry #define USRIOSIZE 64
69 1.1 cherry #endif
70 1.1 cherry
71 1.1 cherry /*
72 1.1 cherry * Manipulating region bits of an address.
73 1.1 cherry */
74 1.5 kiyohara #define IA64_RR_BASE(n) (((uint64_t) (n)) << 61)
75 1.1 cherry #define IA64_RR_MASK(x) ((x) & ((1L << 61) - 1))
76 1.1 cherry
77 1.1 cherry #define IA64_PHYS_TO_RR6(x) ((x) | IA64_RR_BASE(6))
78 1.1 cherry #define IA64_PHYS_TO_RR7(x) ((x) | IA64_RR_BASE(7))
79 1.1 cherry
80 1.8 scole /*
81 1.8 scole * The Itanium architecture defines that all implementations support at
82 1.8 scole * least 51 virtual address bits (i.e. IMPL_VA_MSB=50). The unimplemented
83 1.8 scole * bits are sign-extended from VA{IMPL_VA_MSB}. As such, there's a gap in
84 1.8 scole * the virtual address range, which extends at most from 0x0004000000000000
85 1.8 scole * to 0x1ffbffffffffffff. We define the top half of a region in terms of
86 1.8 scole * this worst-case gap.
87 1.8 scole */
88 1.8 scole #define IA64_REGION_GAP_START 0x0004000000000000
89 1.8 scole #define IA64_REGION_GAP_EXTEND 0x1ffc000000000000
90 1.8 scole
91 1.8 scole /*
92 1.8 scole * Parameters for Pre-Boot Virtual Memory (PBVM).
93 1.8 scole * The kernel, its modules and metadata are loaded in the PBVM by the loader.
94 1.8 scole * The PBVM consists of pages for which the mapping is maintained in a page
95 1.8 scole * table. The page table is at least 1 EFI page large (i.e. 4KB), but can be
96 1.8 scole * larger to accommodate more PBVM. The maximum page table size is 1MB. With
97 1.8 scole * 8 bytes per page table entry, this means that the PBVM has at least 512
98 1.8 scole * pages and at most 128K pages.
99 1.8 scole * The GNU toolchain (in particular GNU ld) does not support an alignment
100 1.8 scole * larger than 64K. This means that we cannot guarantee page alignment for
101 1.8 scole * a page size that's larger than 64K. We do want to have text and data in
102 1.8 scole * different pages, which means that the maximum usable page size is 64KB.
103 1.8 scole * Consequently:
104 1.8 scole * The maximum total PBVM size is 8GB -- enough for a DVD image. A page table
105 1.8 scole * of a single EFI page (4KB) allows for 32MB of PBVM.
106 1.8 scole *
107 1.8 scole * The kernel is given the PA and size of the page table that provides the
108 1.8 scole * mapping of the PBVM. The page table itself is assumed to be mapped at a
109 1.8 scole * known virtual address and using a single translation wired into the CPU.
110 1.8 scole * As such, the page table is assumed to be a power of 2 and naturally aligned.
111 1.8 scole * The kernel also assumes that a good portion of the kernel text is mapped
112 1.8 scole * and wired into the CPU, but does not assume that the mapping covers the
113 1.8 scole * whole of PBVM.
114 1.8 scole */
115 1.8 scole #define IA64_PBVM_RR IA64_VM_MINKERN_REGION
116 1.8 scole #define IA64_PBVM_BASE \
117 1.8 scole (IA64_RR_BASE(IA64_PBVM_RR) + IA64_REGION_GAP_EXTEND)
118 1.8 scole
119 1.8 scole #define IA64_PBVM_PGTBL_MAXSZ 1048576
120 1.8 scole #define IA64_PBVM_PGTBL \
121 1.8 scole (IA64_RR_BASE(IA64_PBVM_RR + 1) - IA64_PBVM_PGTBL_MAXSZ)
122 1.8 scole
123 1.8 scole #define IA64_PBVM_PAGE_SHIFT 16 /* 64KB */
124 1.8 scole #define IA64_PBVM_PAGE_SIZE (1 << IA64_PBVM_PAGE_SHIFT)
125 1.8 scole #define IA64_PBVM_PAGE_MASK (IA64_PBVM_PAGE_SIZE - 1)
126 1.8 scole
127 1.1 cherry #define IA64_ID_PAGE_SHIFT 28 /* 256M */
128 1.1 cherry #define IA64_ID_PAGE_SIZE (1 << IA64_ID_PAGE_SHIFT)
129 1.1 cherry #define IA64_ID_PAGE_MASK (IA64_ID_PAGE_SIZE-1)
130 1.1 cherry
131 1.10 scole /* XXX freebsd uses
132 1.10 scole #define IA64_BACKINGSTORE (USRSTACK - (2 * MAXSSIZ) - PAGE_SIZE)
133 1.10 scole */
134 1.2 cherry #define IA64_BACKINGSTORE IA64_RR_BASE(4)
135 1.2 cherry
136 1.1 cherry #define PAGE_SHIFT 14 /* 16K pages by default. */
137 1.1 cherry #define PAGE_SIZE (1 << PAGE_SHIFT)
138 1.1 cherry #define PAGE_MASK (PAGE_SIZE - 1)
139 1.1 cherry
140 1.1 cherry /* user/kernel map constants */
141 1.1 cherry #define VM_MIN_ADDRESS ((vaddr_t)0)
142 1.1 cherry #define VM_MAX_ADDRESS ((vaddr_t) IA64_RR_BASE(5))
143 1.1 cherry #define VM_GATEWAY_SIZE PAGE_SIZE
144 1.1 cherry #define VM_MAXUSER_ADDRESS (VM_MAX_ADDRESS + VM_GATEWAY_SIZE)
145 1.1 cherry #define VM_MIN_KERNEL_ADDRESS VM_MAXUSER_ADDRESS
146 1.10 scole #define VM_INIT_KERNEL_ADDRESS IA64_RR_BASE(IA64_VM_MINKERN_REGION + 1)
147 1.1 cherry #define VM_MAX_KERNEL_ADDRESS ((vaddr_t) (IA64_RR_BASE(6) - 1))
148 1.1 cherry
149 1.1 cherry #define VM_PHYSSEG_MAX 16 /* XXX: */
150 1.1 cherry #define VM_PHYSSEG_STRAT VM_PSTRAT_BSEARCH
151 1.1 cherry
152 1.1 cherry #define VM_NFREELIST 1 /* XXX: */
153 1.1 cherry #define VM_FREELIST_DEFAULT 0 /* XXX: */
154 1.1 cherry
155 1.1 cherry /* virtual sizes (bytes) for various kernel submaps */
156 1.1 cherry #define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE)
157 1.1 cherry
158 1.1 cherry #endif /* _VMPARAM_H_ */
159