1 1.11 thorpej /* $NetBSD: obio.c,v 1.11 2021/08/07 16:18:57 thorpej Exp $ */ 2 1.1 uwe 3 1.1 uwe /*- 4 1.1 uwe * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 1.1 uwe * All rights reserved. 6 1.1 uwe * 7 1.1 uwe * This code is derived from software contributed to The NetBSD Foundation 8 1.1 uwe * by Charles M. Hannum. 9 1.1 uwe * 10 1.1 uwe * Redistribution and use in source and binary forms, with or without 11 1.1 uwe * modification, are permitted provided that the following conditions 12 1.1 uwe * are met: 13 1.1 uwe * 1. Redistributions of source code must retain the above copyright 14 1.1 uwe * notice, this list of conditions and the following disclaimer. 15 1.1 uwe * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 uwe * notice, this list of conditions and the following disclaimer in the 17 1.1 uwe * documentation and/or other materials provided with the distribution. 18 1.1 uwe * 19 1.1 uwe * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 uwe * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 uwe * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 uwe * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 uwe * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 uwe * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 uwe * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 uwe * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 uwe * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 uwe * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 uwe * POSSIBILITY OF SUCH DAMAGE. 30 1.1 uwe */ 31 1.1 uwe 32 1.1 uwe #include <sys/cdefs.h> 33 1.11 thorpej __KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.11 2021/08/07 16:18:57 thorpej Exp $"); 34 1.1 uwe 35 1.1 uwe #include "btn_obio.h" 36 1.1 uwe #include "pwrsw_obio.h" 37 1.1 uwe 38 1.1 uwe #include <sys/param.h> 39 1.1 uwe #include <sys/systm.h> 40 1.1 uwe #include <sys/device.h> 41 1.1 uwe 42 1.1 uwe #include <uvm/uvm_extern.h> 43 1.1 uwe 44 1.1 uwe #include <sh3/devreg.h> 45 1.1 uwe #include <sh3/mmu.h> 46 1.1 uwe #include <sh3/pmap.h> 47 1.1 uwe #include <sh3/pte.h> 48 1.1 uwe 49 1.9 dyoung #include <sys/bus.h> 50 1.1 uwe #include <machine/cpu.h> 51 1.1 uwe #include <machine/intr.h> 52 1.1 uwe 53 1.1 uwe #include <landisk/dev/obiovar.h> 54 1.1 uwe 55 1.1 uwe #if (NPWRSW_OBIO > 0) || (NBTN_OBIO > 0) 56 1.1 uwe #include <dev/sysmon/sysmonvar.h> 57 1.1 uwe #include <dev/sysmon/sysmon_taskq.h> 58 1.1 uwe #endif 59 1.1 uwe 60 1.1 uwe #include "locators.h" 61 1.1 uwe 62 1.5 uwe 63 1.5 uwe struct obio_softc { 64 1.5 uwe device_t sc_dev; 65 1.5 uwe 66 1.5 uwe bus_space_tag_t sc_iot; /* io space tag */ 67 1.5 uwe bus_space_tag_t sc_memt; /* mem space tag */ 68 1.5 uwe }; 69 1.5 uwe 70 1.5 uwe static int obio_match(device_t, cfdata_t, void *); 71 1.4 uwe static void obio_attach(device_t, device_t, void *); 72 1.1 uwe static int obio_print(void *, const char *); 73 1.5 uwe static int obio_search(device_t, cfdata_t, const int *, void *); 74 1.1 uwe 75 1.5 uwe CFATTACH_DECL_NEW(obio, sizeof(struct obio_softc), 76 1.1 uwe obio_match, obio_attach, NULL, NULL); 77 1.1 uwe 78 1.1 uwe static int 79 1.5 uwe obio_match(device_t parent, cfdata_t cf, void *aux) 80 1.1 uwe { 81 1.1 uwe struct obiobus_attach_args *oba = aux; 82 1.1 uwe 83 1.1 uwe if (strcmp(oba->oba_busname, cf->cf_name)) 84 1.1 uwe return (0); 85 1.1 uwe 86 1.1 uwe return (1); 87 1.1 uwe } 88 1.1 uwe 89 1.1 uwe static void 90 1.4 uwe obio_attach(device_t parent, device_t self, void *aux) 91 1.1 uwe { 92 1.4 uwe struct obio_softc *sc = device_private(self); 93 1.1 uwe struct obiobus_attach_args *oba = aux; 94 1.1 uwe 95 1.4 uwe aprint_naive("\n"); 96 1.4 uwe aprint_normal("\n"); 97 1.1 uwe 98 1.5 uwe sc->sc_dev = self; 99 1.5 uwe 100 1.1 uwe sc->sc_iot = oba->oba_iot; 101 1.1 uwe sc->sc_memt = oba->oba_memt; 102 1.1 uwe 103 1.1 uwe #if (NPWRSW_OBIO > 0) || (NBTN_OBIO > 0) 104 1.1 uwe sysmon_power_settype("landisk"); 105 1.1 uwe sysmon_task_queue_init(); 106 1.1 uwe #endif 107 1.1 uwe 108 1.10 thorpej config_search(self, NULL, 109 1.11 thorpej CFARGS(.search = obio_search)); 110 1.1 uwe } 111 1.1 uwe 112 1.1 uwe static int 113 1.5 uwe obio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 114 1.1 uwe { 115 1.1 uwe struct obio_io res_io[1]; 116 1.1 uwe struct obio_iomem res_mem[1]; 117 1.1 uwe struct obio_irq res_irq[1]; 118 1.4 uwe struct obio_softc *sc = device_private(parent); 119 1.1 uwe struct obio_attach_args oa; 120 1.1 uwe int tryagain; 121 1.1 uwe 122 1.1 uwe do { 123 1.1 uwe oa.oa_iot = sc->sc_iot; 124 1.1 uwe oa.oa_memt = sc->sc_memt; 125 1.1 uwe 126 1.1 uwe res_io[0].or_addr = cf->cf_iobase; 127 1.1 uwe res_io[0].or_size = cf->cf_iosize; 128 1.1 uwe 129 1.1 uwe res_mem[0].or_addr = cf->cf_maddr; 130 1.1 uwe res_mem[0].or_size = cf->cf_msize; 131 1.1 uwe 132 1.1 uwe res_irq[0].or_irq = cf->cf_irq; 133 1.1 uwe 134 1.1 uwe oa.oa_io = res_io; 135 1.1 uwe oa.oa_nio = 1; 136 1.1 uwe 137 1.1 uwe oa.oa_iomem = res_mem; 138 1.1 uwe oa.oa_niomem = 1; 139 1.1 uwe 140 1.1 uwe oa.oa_irq = res_irq; 141 1.1 uwe oa.oa_nirq = 1; 142 1.1 uwe 143 1.1 uwe tryagain = 0; 144 1.10 thorpej if (config_probe(parent, cf, &oa)) { 145 1.11 thorpej config_attach(parent, cf, &oa, obio_print, CFARGS_NONE); 146 1.1 uwe tryagain = (cf->cf_fstate == FSTATE_STAR); 147 1.1 uwe } 148 1.1 uwe } while (tryagain); 149 1.1 uwe 150 1.1 uwe return (0); 151 1.1 uwe } 152 1.1 uwe 153 1.1 uwe static int 154 1.1 uwe obio_print(void *args, const char *name) 155 1.1 uwe { 156 1.1 uwe struct obio_attach_args *oa = args; 157 1.1 uwe const char *sep; 158 1.1 uwe int i; 159 1.1 uwe 160 1.1 uwe if (oa->oa_nio) { 161 1.1 uwe sep = ""; 162 1.1 uwe aprint_normal(" port "); 163 1.1 uwe for (i = 0; i < oa->oa_nio; i++) { 164 1.1 uwe if (oa->oa_io[i].or_size == 0) 165 1.1 uwe continue; 166 1.1 uwe aprint_normal("%s0x%x", sep, oa->oa_io[i].or_addr); 167 1.1 uwe if (oa->oa_io[i].or_size > 1) 168 1.1 uwe aprint_normal("-0x%x", oa->oa_io[i].or_addr + 169 1.1 uwe oa->oa_io[i].or_size - 1); 170 1.1 uwe sep = ","; 171 1.1 uwe } 172 1.1 uwe } 173 1.1 uwe 174 1.1 uwe if (oa->oa_niomem) { 175 1.1 uwe sep = ""; 176 1.1 uwe aprint_normal(" iomem "); 177 1.1 uwe for (i = 0; i < oa->oa_niomem; i++) { 178 1.1 uwe if (oa->oa_iomem[i].or_size == 0) 179 1.1 uwe continue; 180 1.1 uwe aprint_normal("%s0x%x", sep, oa->oa_iomem[i].or_addr); 181 1.1 uwe if (oa->oa_iomem[i].or_size > 1) 182 1.1 uwe aprint_normal("-0x%x", oa->oa_iomem[i].or_addr + 183 1.1 uwe oa->oa_iomem[i].or_size - 1); 184 1.1 uwe sep = ","; 185 1.1 uwe } 186 1.1 uwe } 187 1.1 uwe 188 1.1 uwe if (oa->oa_nirq) { 189 1.1 uwe sep = ""; 190 1.1 uwe aprint_normal(" irq "); 191 1.1 uwe for (i = 0; i < oa->oa_nirq; i++) { 192 1.1 uwe if (oa->oa_irq[i].or_irq == IRQUNK) 193 1.1 uwe continue; 194 1.1 uwe aprint_normal("%s%d", sep, oa->oa_irq[i].or_irq); 195 1.1 uwe sep = ","; 196 1.1 uwe } 197 1.1 uwe } 198 1.1 uwe 199 1.1 uwe return (UNCONF); 200 1.1 uwe } 201 1.1 uwe 202 1.1 uwe /* 203 1.1 uwe * Set up an interrupt handler to start being called. 204 1.1 uwe */ 205 1.1 uwe void * 206 1.1 uwe obio_intr_establish(int irq, int level, int (*ih_fun)(void *), void *ih_arg) 207 1.1 uwe { 208 1.1 uwe 209 1.1 uwe return extintr_establish(irq, level, ih_fun, ih_arg); 210 1.1 uwe } 211 1.1 uwe 212 1.1 uwe /* 213 1.1 uwe * Deregister an interrupt handler. 214 1.1 uwe */ 215 1.1 uwe void 216 1.1 uwe obio_intr_disestablish(void *arg) 217 1.1 uwe { 218 1.1 uwe 219 1.1 uwe extintr_disestablish(arg); 220 1.1 uwe } 221 1.1 uwe 222 1.1 uwe /* 223 1.1 uwe * on-board I/O bus space 224 1.1 uwe */ 225 1.1 uwe #define OBIO_IOMEM_IO 0 /* space is i/o space */ 226 1.1 uwe #define OBIO_IOMEM_MEM 1 /* space is mem space */ 227 1.1 uwe #define OBIO_IOMEM_PCMCIA_IO 2 /* PCMCIA IO space */ 228 1.1 uwe #define OBIO_IOMEM_PCMCIA_MEM 3 /* PCMCIA Mem space */ 229 1.1 uwe #define OBIO_IOMEM_PCMCIA_ATT 4 /* PCMCIA Attr space */ 230 1.1 uwe #define OBIO_IOMEM_PCMCIA_8BIT 0x8000 /* PCMCIA BUS 8 BIT WIDTH */ 231 1.1 uwe #define OBIO_IOMEM_PCMCIA_IO8 \ 232 1.1 uwe (OBIO_IOMEM_PCMCIA_IO|OBIO_IOMEM_PCMCIA_8BIT) 233 1.1 uwe #define OBIO_IOMEM_PCMCIA_MEM8 \ 234 1.1 uwe (OBIO_IOMEM_PCMCIA_MEM|OBIO_IOMEM_PCMCIA_8BIT) 235 1.1 uwe #define OBIO_IOMEM_PCMCIA_ATT8 \ 236 1.1 uwe (OBIO_IOMEM_PCMCIA_ATT|OBIO_IOMEM_PCMCIA_8BIT) 237 1.1 uwe 238 1.1 uwe int obio_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags, 239 1.1 uwe bus_space_handle_t *bshp); 240 1.1 uwe void obio_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size); 241 1.1 uwe int obio_iomem_subregion(void *v, bus_space_handle_t bsh, 242 1.1 uwe bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp); 243 1.1 uwe int obio_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend, 244 1.1 uwe bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, 245 1.1 uwe bus_addr_t *bpap, bus_space_handle_t *bshp); 246 1.1 uwe void obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size); 247 1.7 nonaka paddr_t obio_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot, 248 1.7 nonaka int flags); 249 1.1 uwe 250 1.1 uwe static int obio_iomem_add_mapping(bus_addr_t, bus_size_t, int, 251 1.1 uwe bus_space_handle_t *); 252 1.1 uwe 253 1.1 uwe static int 254 1.1 uwe obio_iomem_add_mapping(bus_addr_t bpa, bus_size_t size, int type, 255 1.1 uwe bus_space_handle_t *bshp) 256 1.1 uwe { 257 1.1 uwe u_long pa, endpa; 258 1.1 uwe vaddr_t va; 259 1.1 uwe pt_entry_t *pte; 260 1.1 uwe unsigned int m = 0; 261 1.1 uwe int io_type = type & ~OBIO_IOMEM_PCMCIA_8BIT; 262 1.1 uwe 263 1.1 uwe pa = sh3_trunc_page(bpa); 264 1.1 uwe endpa = sh3_round_page(bpa + size); 265 1.1 uwe 266 1.1 uwe #ifdef DIAGNOSTIC 267 1.1 uwe if (endpa <= pa) 268 1.1 uwe panic("obio_iomem_add_mapping: overflow"); 269 1.1 uwe #endif 270 1.1 uwe 271 1.1 uwe va = uvm_km_alloc(kernel_map, endpa - pa, 0, UVM_KMF_VAONLY); 272 1.1 uwe if (va == 0){ 273 1.1 uwe printf("obio_iomem_add_mapping: nomem\n"); 274 1.1 uwe return (ENOMEM); 275 1.1 uwe } 276 1.1 uwe 277 1.1 uwe *bshp = (bus_space_handle_t)(va + (bpa & PGOFSET)); 278 1.1 uwe 279 1.1 uwe #define MODE(t, s) \ 280 1.1 uwe ((t) & OBIO_IOMEM_PCMCIA_8BIT) ? \ 281 1.1 uwe _PG_PCMCIA_ ## s ## 8 : \ 282 1.1 uwe _PG_PCMCIA_ ## s ## 16 283 1.1 uwe switch (io_type) { 284 1.1 uwe default: 285 1.1 uwe panic("unknown pcmcia space."); 286 1.1 uwe /* NOTREACHED */ 287 1.1 uwe case OBIO_IOMEM_PCMCIA_IO: 288 1.1 uwe m = MODE(type, IO); 289 1.1 uwe break; 290 1.1 uwe case OBIO_IOMEM_PCMCIA_MEM: 291 1.1 uwe m = MODE(type, MEM); 292 1.1 uwe break; 293 1.1 uwe case OBIO_IOMEM_PCMCIA_ATT: 294 1.1 uwe m = MODE(type, ATTR); 295 1.1 uwe break; 296 1.1 uwe } 297 1.1 uwe #undef MODE 298 1.1 uwe 299 1.1 uwe for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) { 300 1.8 cegger pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, 0); 301 1.1 uwe pte = __pmap_kpte_lookup(va); 302 1.1 uwe KDASSERT(pte); 303 1.1 uwe *pte |= m; /* PTEA PCMCIA assistant bit */ 304 1.1 uwe sh_tlb_update(0, va, *pte); 305 1.1 uwe } 306 1.1 uwe 307 1.1 uwe return (0); 308 1.1 uwe } 309 1.1 uwe 310 1.1 uwe int 311 1.1 uwe obio_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, 312 1.1 uwe int flags, bus_space_handle_t *bshp) 313 1.1 uwe { 314 1.1 uwe bus_addr_t addr = SH3_PHYS_TO_P2SEG(bpa); 315 1.1 uwe int error; 316 1.1 uwe 317 1.1 uwe KASSERT((bpa & SH3_PHYS_MASK) == bpa); 318 1.1 uwe 319 1.1 uwe if (bpa < 0x14000000 || bpa >= 0x1c000000) { 320 1.1 uwe /* CS0,1,2,3,4,7 */ 321 1.1 uwe *bshp = (bus_space_handle_t)addr; 322 1.1 uwe return (0); 323 1.1 uwe } 324 1.1 uwe 325 1.1 uwe /* CS5,6 */ 326 1.1 uwe error = obio_iomem_add_mapping(addr, size, (int)(u_long)v, bshp); 327 1.1 uwe 328 1.1 uwe return (error); 329 1.1 uwe } 330 1.1 uwe 331 1.1 uwe void 332 1.1 uwe obio_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size) 333 1.1 uwe { 334 1.1 uwe u_long va, endva; 335 1.1 uwe bus_addr_t bpa; 336 1.1 uwe 337 1.1 uwe if (bsh >= SH3_P2SEG_BASE && bsh <= SH3_P2SEG_END) { 338 1.1 uwe /* maybe CS0,1,2,3,4,7 */ 339 1.1 uwe return; 340 1.1 uwe } 341 1.1 uwe 342 1.1 uwe /* CS5,6 */ 343 1.1 uwe va = sh3_trunc_page(bsh); 344 1.1 uwe endva = sh3_round_page(bsh + size); 345 1.1 uwe 346 1.1 uwe #ifdef DIAGNOSTIC 347 1.1 uwe if (endva <= va) 348 1.1 uwe panic("obio_io_unmap: overflow"); 349 1.1 uwe #endif 350 1.1 uwe 351 1.1 uwe pmap_extract(pmap_kernel(), va, &bpa); 352 1.1 uwe bpa += bsh & PGOFSET; 353 1.1 uwe 354 1.1 uwe pmap_kremove(va, endva - va); 355 1.1 uwe 356 1.1 uwe /* 357 1.1 uwe * Free the kernel virtual mapping. 358 1.1 uwe */ 359 1.1 uwe uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY); 360 1.1 uwe } 361 1.1 uwe 362 1.1 uwe int 363 1.1 uwe obio_iomem_subregion(void *v, bus_space_handle_t bsh, 364 1.1 uwe bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp) 365 1.1 uwe { 366 1.1 uwe 367 1.1 uwe *nbshp = bsh + offset; 368 1.1 uwe 369 1.1 uwe return (0); 370 1.1 uwe } 371 1.1 uwe 372 1.1 uwe int 373 1.1 uwe obio_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend, 374 1.1 uwe bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, 375 1.1 uwe bus_addr_t *bpap, bus_space_handle_t *bshp) 376 1.1 uwe { 377 1.1 uwe 378 1.1 uwe *bshp = *bpap = rstart; 379 1.1 uwe 380 1.1 uwe return (0); 381 1.1 uwe } 382 1.1 uwe 383 1.1 uwe void 384 1.1 uwe obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size) 385 1.1 uwe { 386 1.1 uwe 387 1.1 uwe obio_iomem_unmap(v, bsh, size); 388 1.1 uwe } 389 1.1 uwe 390 1.7 nonaka paddr_t 391 1.7 nonaka obio_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot, int flags) 392 1.7 nonaka { 393 1.7 nonaka 394 1.7 nonaka return (paddr_t)-1; 395 1.7 nonaka } 396 1.7 nonaka 397 1.1 uwe /* 398 1.1 uwe * on-board I/O bus space read/write 399 1.1 uwe */ 400 1.1 uwe uint8_t obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset); 401 1.1 uwe uint16_t obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset); 402 1.1 uwe uint32_t obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset); 403 1.1 uwe void obio_iomem_read_multi_1(void *v, bus_space_handle_t bsh, 404 1.1 uwe bus_size_t offset, uint8_t *addr, bus_size_t count); 405 1.1 uwe void obio_iomem_read_multi_2(void *v, bus_space_handle_t bsh, 406 1.1 uwe bus_size_t offset, uint16_t *addr, bus_size_t count); 407 1.1 uwe void obio_iomem_read_multi_4(void *v, bus_space_handle_t bsh, 408 1.1 uwe bus_size_t offset, uint32_t *addr, bus_size_t count); 409 1.1 uwe void obio_iomem_read_region_1(void *v, bus_space_handle_t bsh, 410 1.1 uwe bus_size_t offset, uint8_t *addr, bus_size_t count); 411 1.1 uwe void obio_iomem_read_region_2(void *v, bus_space_handle_t bsh, 412 1.1 uwe bus_size_t offset, uint16_t *addr, bus_size_t count); 413 1.1 uwe void obio_iomem_read_region_4(void *v, bus_space_handle_t bsh, 414 1.1 uwe bus_size_t offset, uint32_t *addr, bus_size_t count); 415 1.1 uwe void obio_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset, 416 1.1 uwe uint8_t value); 417 1.1 uwe void obio_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset, 418 1.1 uwe uint16_t value); 419 1.1 uwe void obio_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset, 420 1.1 uwe uint32_t value); 421 1.1 uwe void obio_iomem_write_multi_1(void *v, bus_space_handle_t bsh, 422 1.1 uwe bus_size_t offset, const uint8_t *addr, bus_size_t count); 423 1.1 uwe void obio_iomem_write_multi_2(void *v, bus_space_handle_t bsh, 424 1.1 uwe bus_size_t offset, const uint16_t *addr, bus_size_t count); 425 1.1 uwe void obio_iomem_write_multi_4(void *v, bus_space_handle_t bsh, 426 1.1 uwe bus_size_t offset, const uint32_t *addr, bus_size_t count); 427 1.1 uwe void obio_iomem_write_region_1(void *v, bus_space_handle_t bsh, 428 1.1 uwe bus_size_t offset, const uint8_t *addr, bus_size_t count); 429 1.1 uwe void obio_iomem_write_region_2(void *v, bus_space_handle_t bsh, 430 1.1 uwe bus_size_t offset, const uint16_t *addr, bus_size_t count); 431 1.1 uwe void obio_iomem_write_region_4(void *v, bus_space_handle_t bsh, 432 1.1 uwe bus_size_t offset, const uint32_t *addr, bus_size_t count); 433 1.1 uwe void obio_iomem_set_multi_1(void *v, bus_space_handle_t bsh, bus_size_t offset, 434 1.1 uwe uint8_t val, bus_size_t count); 435 1.1 uwe void obio_iomem_set_multi_2(void *v, bus_space_handle_t bsh, bus_size_t offset, 436 1.1 uwe uint16_t val, bus_size_t count); 437 1.1 uwe void obio_iomem_set_multi_4(void *v, bus_space_handle_t bsh, bus_size_t offset, 438 1.1 uwe uint32_t val, bus_size_t count); 439 1.1 uwe void obio_iomem_set_region_1(void *v, bus_space_handle_t bsh, 440 1.1 uwe bus_size_t offset, uint8_t val, bus_size_t count); 441 1.1 uwe void obio_iomem_set_region_2(void *v, bus_space_handle_t bsh, 442 1.1 uwe bus_size_t offset, uint16_t val, bus_size_t count); 443 1.1 uwe void obio_iomem_set_region_4(void *v, bus_space_handle_t bsh, 444 1.1 uwe bus_size_t offset, uint32_t val, bus_size_t count); 445 1.1 uwe void obio_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1, 446 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count); 447 1.1 uwe void obio_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1, 448 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count); 449 1.1 uwe void obio_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1, 450 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count); 451 1.1 uwe 452 1.1 uwe struct _bus_space obio_bus_io = 453 1.1 uwe { 454 1.1 uwe .bs_cookie = (void *)OBIO_IOMEM_PCMCIA_IO, 455 1.1 uwe 456 1.1 uwe .bs_map = obio_iomem_map, 457 1.1 uwe .bs_unmap = obio_iomem_unmap, 458 1.1 uwe .bs_subregion = obio_iomem_subregion, 459 1.1 uwe 460 1.1 uwe .bs_alloc = obio_iomem_alloc, 461 1.1 uwe .bs_free = obio_iomem_free, 462 1.1 uwe 463 1.7 nonaka .bs_mmap = obio_iomem_mmap, 464 1.7 nonaka 465 1.1 uwe .bs_r_1 = obio_iomem_read_1, 466 1.1 uwe .bs_r_2 = obio_iomem_read_2, 467 1.1 uwe .bs_r_4 = obio_iomem_read_4, 468 1.1 uwe 469 1.1 uwe .bs_rm_1 = obio_iomem_read_multi_1, 470 1.1 uwe .bs_rm_2 = obio_iomem_read_multi_2, 471 1.1 uwe .bs_rm_4 = obio_iomem_read_multi_4, 472 1.1 uwe 473 1.1 uwe .bs_rr_1 = obio_iomem_read_region_1, 474 1.1 uwe .bs_rr_2 = obio_iomem_read_region_2, 475 1.1 uwe .bs_rr_4 = obio_iomem_read_region_4, 476 1.1 uwe 477 1.1 uwe .bs_w_1 = obio_iomem_write_1, 478 1.1 uwe .bs_w_2 = obio_iomem_write_2, 479 1.1 uwe .bs_w_4 = obio_iomem_write_4, 480 1.1 uwe 481 1.1 uwe .bs_wm_1 = obio_iomem_write_multi_1, 482 1.1 uwe .bs_wm_2 = obio_iomem_write_multi_2, 483 1.1 uwe .bs_wm_4 = obio_iomem_write_multi_4, 484 1.1 uwe 485 1.1 uwe .bs_wr_1 = obio_iomem_write_region_1, 486 1.1 uwe .bs_wr_2 = obio_iomem_write_region_2, 487 1.1 uwe .bs_wr_4 = obio_iomem_write_region_4, 488 1.1 uwe 489 1.1 uwe .bs_sm_1 = obio_iomem_set_multi_1, 490 1.1 uwe .bs_sm_2 = obio_iomem_set_multi_2, 491 1.1 uwe .bs_sm_4 = obio_iomem_set_multi_4, 492 1.1 uwe 493 1.1 uwe .bs_sr_1 = obio_iomem_set_region_1, 494 1.1 uwe .bs_sr_2 = obio_iomem_set_region_2, 495 1.1 uwe .bs_sr_4 = obio_iomem_set_region_4, 496 1.1 uwe 497 1.1 uwe .bs_c_1 = obio_iomem_copy_region_1, 498 1.1 uwe .bs_c_2 = obio_iomem_copy_region_2, 499 1.1 uwe .bs_c_4 = obio_iomem_copy_region_4, 500 1.1 uwe }; 501 1.1 uwe 502 1.1 uwe struct _bus_space obio_bus_mem = 503 1.1 uwe { 504 1.1 uwe .bs_cookie = (void *)OBIO_IOMEM_PCMCIA_MEM, 505 1.1 uwe 506 1.1 uwe .bs_map = obio_iomem_map, 507 1.1 uwe .bs_unmap = obio_iomem_unmap, 508 1.1 uwe .bs_subregion = obio_iomem_subregion, 509 1.1 uwe 510 1.1 uwe .bs_alloc = obio_iomem_alloc, 511 1.1 uwe .bs_free = obio_iomem_free, 512 1.1 uwe 513 1.1 uwe .bs_r_1 = obio_iomem_read_1, 514 1.1 uwe .bs_r_2 = obio_iomem_read_2, 515 1.1 uwe .bs_r_4 = obio_iomem_read_4, 516 1.1 uwe 517 1.1 uwe .bs_rm_1 = obio_iomem_read_multi_1, 518 1.1 uwe .bs_rm_2 = obio_iomem_read_multi_2, 519 1.1 uwe .bs_rm_4 = obio_iomem_read_multi_4, 520 1.1 uwe 521 1.1 uwe .bs_rr_1 = obio_iomem_read_region_1, 522 1.1 uwe .bs_rr_2 = obio_iomem_read_region_2, 523 1.1 uwe .bs_rr_4 = obio_iomem_read_region_4, 524 1.1 uwe 525 1.1 uwe .bs_w_1 = obio_iomem_write_1, 526 1.1 uwe .bs_w_2 = obio_iomem_write_2, 527 1.1 uwe .bs_w_4 = obio_iomem_write_4, 528 1.1 uwe 529 1.1 uwe .bs_wm_1 = obio_iomem_write_multi_1, 530 1.1 uwe .bs_wm_2 = obio_iomem_write_multi_2, 531 1.1 uwe .bs_wm_4 = obio_iomem_write_multi_4, 532 1.1 uwe 533 1.1 uwe .bs_wr_1 = obio_iomem_write_region_1, 534 1.1 uwe .bs_wr_2 = obio_iomem_write_region_2, 535 1.1 uwe .bs_wr_4 = obio_iomem_write_region_4, 536 1.1 uwe 537 1.1 uwe .bs_sm_1 = obio_iomem_set_multi_1, 538 1.1 uwe .bs_sm_2 = obio_iomem_set_multi_2, 539 1.1 uwe .bs_sm_4 = obio_iomem_set_multi_4, 540 1.1 uwe 541 1.1 uwe .bs_sr_1 = obio_iomem_set_region_1, 542 1.1 uwe .bs_sr_2 = obio_iomem_set_region_2, 543 1.1 uwe .bs_sr_4 = obio_iomem_set_region_4, 544 1.1 uwe 545 1.1 uwe .bs_c_1 = obio_iomem_copy_region_1, 546 1.1 uwe .bs_c_2 = obio_iomem_copy_region_2, 547 1.1 uwe .bs_c_4 = obio_iomem_copy_region_4, 548 1.1 uwe }; 549 1.1 uwe 550 1.1 uwe /* read */ 551 1.1 uwe uint8_t 552 1.1 uwe obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset) 553 1.1 uwe { 554 1.1 uwe 555 1.1 uwe return *(volatile uint8_t *)(bsh + offset); 556 1.1 uwe } 557 1.1 uwe 558 1.1 uwe uint16_t 559 1.1 uwe obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset) 560 1.1 uwe { 561 1.1 uwe 562 1.1 uwe return *(volatile uint16_t *)(bsh + offset); 563 1.1 uwe } 564 1.1 uwe 565 1.1 uwe uint32_t 566 1.1 uwe obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset) 567 1.1 uwe { 568 1.1 uwe 569 1.1 uwe return *(volatile uint32_t *)(bsh + offset); 570 1.1 uwe } 571 1.1 uwe 572 1.1 uwe void 573 1.1 uwe obio_iomem_read_multi_1(void *v, bus_space_handle_t bsh, 574 1.1 uwe bus_size_t offset, uint8_t *addr, bus_size_t count) 575 1.1 uwe { 576 1.1 uwe volatile uint8_t *p = (void *)(bsh + offset); 577 1.1 uwe 578 1.1 uwe while (count--) { 579 1.1 uwe *addr++ = *p; 580 1.1 uwe } 581 1.1 uwe } 582 1.1 uwe 583 1.1 uwe void 584 1.1 uwe obio_iomem_read_multi_2(void *v, bus_space_handle_t bsh, 585 1.1 uwe bus_size_t offset, uint16_t *addr, bus_size_t count) 586 1.1 uwe { 587 1.1 uwe volatile uint16_t *p = (void *)(bsh + offset); 588 1.1 uwe 589 1.1 uwe while (count--) { 590 1.1 uwe *addr++ = *p; 591 1.1 uwe } 592 1.1 uwe } 593 1.1 uwe 594 1.1 uwe void 595 1.1 uwe obio_iomem_read_multi_4(void *v, bus_space_handle_t bsh, 596 1.1 uwe bus_size_t offset, uint32_t *addr, bus_size_t count) 597 1.1 uwe { 598 1.1 uwe volatile uint32_t *p = (void *)(bsh + offset); 599 1.1 uwe 600 1.1 uwe while (count--) { 601 1.1 uwe *addr++ = *p; 602 1.1 uwe } 603 1.1 uwe } 604 1.1 uwe 605 1.1 uwe void 606 1.1 uwe obio_iomem_read_region_1(void *v, bus_space_handle_t bsh, 607 1.1 uwe bus_size_t offset, uint8_t *addr, bus_size_t count) 608 1.1 uwe { 609 1.1 uwe volatile uint8_t *p = (void *)(bsh + offset); 610 1.1 uwe 611 1.1 uwe while (count--) { 612 1.1 uwe *addr++ = *p++; 613 1.1 uwe } 614 1.1 uwe } 615 1.1 uwe 616 1.1 uwe void 617 1.1 uwe obio_iomem_read_region_2(void *v, bus_space_handle_t bsh, 618 1.1 uwe bus_size_t offset, uint16_t *addr, bus_size_t count) 619 1.1 uwe { 620 1.1 uwe volatile uint16_t *p = (void *)(bsh + offset); 621 1.1 uwe 622 1.1 uwe while (count--) { 623 1.1 uwe *addr++ = *p++; 624 1.1 uwe } 625 1.1 uwe } 626 1.1 uwe 627 1.1 uwe void 628 1.1 uwe obio_iomem_read_region_4(void *v, bus_space_handle_t bsh, 629 1.1 uwe bus_size_t offset, uint32_t *addr, bus_size_t count) 630 1.1 uwe { 631 1.1 uwe volatile uint32_t *p = (void *)(bsh + offset); 632 1.1 uwe 633 1.1 uwe while (count--) { 634 1.1 uwe *addr++ = *p++; 635 1.1 uwe } 636 1.1 uwe } 637 1.1 uwe 638 1.1 uwe /* write */ 639 1.1 uwe void 640 1.1 uwe obio_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset, 641 1.1 uwe uint8_t value) 642 1.1 uwe { 643 1.1 uwe 644 1.1 uwe *(volatile uint8_t *)(bsh + offset) = value; 645 1.1 uwe } 646 1.1 uwe 647 1.1 uwe void 648 1.1 uwe obio_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset, 649 1.1 uwe uint16_t value) 650 1.1 uwe { 651 1.1 uwe 652 1.1 uwe *(volatile uint16_t *)(bsh + offset) = value; 653 1.1 uwe } 654 1.1 uwe 655 1.1 uwe void 656 1.1 uwe obio_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset, 657 1.1 uwe uint32_t value) 658 1.1 uwe { 659 1.1 uwe 660 1.1 uwe *(volatile uint32_t *)(bsh + offset) = value; 661 1.1 uwe } 662 1.1 uwe 663 1.1 uwe void 664 1.1 uwe obio_iomem_write_multi_1(void *v, bus_space_handle_t bsh, 665 1.1 uwe bus_size_t offset, const uint8_t *addr, bus_size_t count) 666 1.1 uwe { 667 1.1 uwe volatile uint8_t *p = (void *)(bsh + offset); 668 1.1 uwe 669 1.1 uwe while (count--) { 670 1.1 uwe *p = *addr++; 671 1.1 uwe } 672 1.1 uwe } 673 1.1 uwe 674 1.1 uwe void 675 1.1 uwe obio_iomem_write_multi_2(void *v, bus_space_handle_t bsh, 676 1.1 uwe bus_size_t offset, const uint16_t *addr, bus_size_t count) 677 1.1 uwe { 678 1.1 uwe volatile uint16_t *p = (void *)(bsh + offset); 679 1.1 uwe 680 1.1 uwe while (count--) { 681 1.1 uwe *p = *addr++; 682 1.1 uwe } 683 1.1 uwe } 684 1.1 uwe 685 1.1 uwe void 686 1.1 uwe obio_iomem_write_multi_4(void *v, bus_space_handle_t bsh, 687 1.1 uwe bus_size_t offset, const uint32_t *addr, bus_size_t count) 688 1.1 uwe { 689 1.1 uwe volatile uint32_t *p = (void *)(bsh + offset); 690 1.1 uwe 691 1.1 uwe while (count--) { 692 1.1 uwe *p = *addr++; 693 1.1 uwe } 694 1.1 uwe } 695 1.1 uwe 696 1.1 uwe void 697 1.1 uwe obio_iomem_write_region_1(void *v, bus_space_handle_t bsh, 698 1.1 uwe bus_size_t offset, const uint8_t *addr, bus_size_t count) 699 1.1 uwe { 700 1.1 uwe volatile uint8_t *p = (void *)(bsh + offset); 701 1.1 uwe 702 1.1 uwe while (count--) { 703 1.1 uwe *p++ = *addr++; 704 1.1 uwe } 705 1.1 uwe } 706 1.1 uwe 707 1.1 uwe void 708 1.1 uwe obio_iomem_write_region_2(void *v, bus_space_handle_t bsh, 709 1.1 uwe bus_size_t offset, const uint16_t *addr, bus_size_t count) 710 1.1 uwe { 711 1.1 uwe volatile uint16_t *p = (void *)(bsh + offset); 712 1.1 uwe 713 1.1 uwe while (count--) { 714 1.1 uwe *p++ = *addr++; 715 1.1 uwe } 716 1.1 uwe } 717 1.1 uwe 718 1.1 uwe void 719 1.1 uwe obio_iomem_write_region_4(void *v, bus_space_handle_t bsh, 720 1.1 uwe bus_size_t offset, const uint32_t *addr, bus_size_t count) 721 1.1 uwe { 722 1.1 uwe volatile uint32_t *p = (void *)(bsh + offset); 723 1.1 uwe 724 1.1 uwe while (count--) { 725 1.1 uwe *p++ = *addr++; 726 1.1 uwe } 727 1.1 uwe } 728 1.1 uwe 729 1.1 uwe void 730 1.1 uwe obio_iomem_set_multi_1(void *v, bus_space_handle_t bsh, 731 1.1 uwe bus_size_t offset, uint8_t val, bus_size_t count) 732 1.1 uwe { 733 1.1 uwe volatile uint8_t *p = (void *)(bsh + offset); 734 1.1 uwe 735 1.1 uwe while (count--) { 736 1.1 uwe *p = val; 737 1.1 uwe } 738 1.1 uwe } 739 1.1 uwe 740 1.1 uwe void 741 1.1 uwe obio_iomem_set_multi_2(void *v, bus_space_handle_t bsh, 742 1.1 uwe bus_size_t offset, uint16_t val, bus_size_t count) 743 1.1 uwe { 744 1.1 uwe volatile uint16_t *p = (void *)(bsh + offset); 745 1.1 uwe 746 1.1 uwe while (count--) { 747 1.1 uwe *p = val; 748 1.1 uwe } 749 1.1 uwe } 750 1.1 uwe 751 1.1 uwe void 752 1.1 uwe obio_iomem_set_multi_4(void *v, bus_space_handle_t bsh, 753 1.1 uwe bus_size_t offset, uint32_t val, bus_size_t count) 754 1.1 uwe { 755 1.1 uwe volatile uint32_t *p = (void *)(bsh + offset); 756 1.1 uwe 757 1.1 uwe while (count--) { 758 1.1 uwe *p = val; 759 1.1 uwe } 760 1.1 uwe } 761 1.1 uwe 762 1.1 uwe void 763 1.1 uwe obio_iomem_set_region_1(void *v, bus_space_handle_t bsh, 764 1.1 uwe bus_size_t offset, uint8_t val, bus_size_t count) 765 1.1 uwe { 766 1.1 uwe volatile uint8_t *addr = (void *)(bsh + offset); 767 1.1 uwe 768 1.1 uwe while (count--) { 769 1.1 uwe *addr++ = val; 770 1.1 uwe } 771 1.1 uwe } 772 1.1 uwe 773 1.1 uwe void 774 1.1 uwe obio_iomem_set_region_2(void *v, bus_space_handle_t bsh, 775 1.1 uwe bus_size_t offset, uint16_t val, bus_size_t count) 776 1.1 uwe { 777 1.1 uwe volatile uint16_t *addr = (void *)(bsh + offset); 778 1.1 uwe 779 1.1 uwe while (count--) { 780 1.1 uwe *addr++ = val; 781 1.1 uwe } 782 1.1 uwe } 783 1.1 uwe 784 1.1 uwe void 785 1.1 uwe obio_iomem_set_region_4(void *v, bus_space_handle_t bsh, 786 1.1 uwe bus_size_t offset, uint32_t val, bus_size_t count) 787 1.1 uwe { 788 1.1 uwe volatile uint32_t *addr = (void *)(bsh + offset); 789 1.1 uwe 790 1.1 uwe while (count--) { 791 1.1 uwe *addr++ = val; 792 1.1 uwe } 793 1.1 uwe } 794 1.1 uwe 795 1.1 uwe void 796 1.1 uwe obio_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1, 797 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count) 798 1.1 uwe { 799 1.1 uwe volatile uint8_t *addr1 = (void *)(h1 + o1); 800 1.1 uwe volatile uint8_t *addr2 = (void *)(h2 + o2); 801 1.1 uwe 802 1.1 uwe if (addr1 >= addr2) { /* src after dest: copy forward */ 803 1.1 uwe while (count--) { 804 1.1 uwe *addr2++ = *addr1++; 805 1.1 uwe } 806 1.1 uwe } else { /* dest after src: copy backwards */ 807 1.1 uwe addr1 += count - 1; 808 1.1 uwe addr2 += count - 1; 809 1.1 uwe while (count--) { 810 1.1 uwe *addr2-- = *addr1--; 811 1.1 uwe } 812 1.1 uwe } 813 1.1 uwe } 814 1.1 uwe 815 1.1 uwe void 816 1.1 uwe obio_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1, 817 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count) 818 1.1 uwe { 819 1.1 uwe volatile uint16_t *addr1 = (void *)(h1 + o1); 820 1.1 uwe volatile uint16_t *addr2 = (void *)(h2 + o2); 821 1.1 uwe 822 1.1 uwe if (addr1 >= addr2) { /* src after dest: copy forward */ 823 1.1 uwe while (count--) { 824 1.1 uwe *addr2++ = *addr1++; 825 1.1 uwe } 826 1.1 uwe } else { /* dest after src: copy backwards */ 827 1.1 uwe addr1 += count - 1; 828 1.1 uwe addr2 += count - 1; 829 1.1 uwe while (count--) { 830 1.1 uwe *addr2-- = *addr1--; 831 1.1 uwe } 832 1.1 uwe } 833 1.1 uwe } 834 1.1 uwe 835 1.1 uwe void 836 1.1 uwe obio_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1, 837 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count) 838 1.1 uwe { 839 1.1 uwe volatile uint32_t *addr1 = (void *)(h1 + o1); 840 1.1 uwe volatile uint32_t *addr2 = (void *)(h2 + o2); 841 1.1 uwe 842 1.1 uwe if (addr1 >= addr2) { /* src after dest: copy forward */ 843 1.1 uwe while (count--) { 844 1.1 uwe *addr2++ = *addr1++; 845 1.1 uwe } 846 1.1 uwe } else { /* dest after src: copy backwards */ 847 1.1 uwe addr1 += count - 1; 848 1.1 uwe addr2 += count - 1; 849 1.1 uwe while (count--) { 850 1.1 uwe *addr2-- = *addr1--; 851 1.1 uwe } 852 1.1 uwe } 853 1.1 uwe } 854