obio.c revision 1.7 1 1.7 nonaka /* $NetBSD: obio.c,v 1.7 2009/08/02 00:06:44 nonaka Exp $ */
2 1.1 uwe
3 1.1 uwe /*-
4 1.1 uwe * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 uwe * All rights reserved.
6 1.1 uwe *
7 1.1 uwe * This code is derived from software contributed to The NetBSD Foundation
8 1.1 uwe * by Charles M. Hannum.
9 1.1 uwe *
10 1.1 uwe * Redistribution and use in source and binary forms, with or without
11 1.1 uwe * modification, are permitted provided that the following conditions
12 1.1 uwe * are met:
13 1.1 uwe * 1. Redistributions of source code must retain the above copyright
14 1.1 uwe * notice, this list of conditions and the following disclaimer.
15 1.1 uwe * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 uwe * notice, this list of conditions and the following disclaimer in the
17 1.1 uwe * documentation and/or other materials provided with the distribution.
18 1.1 uwe *
19 1.1 uwe * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 uwe * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 uwe * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 uwe * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 uwe * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 uwe * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 uwe * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 uwe * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 uwe * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 uwe * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 uwe * POSSIBILITY OF SUCH DAMAGE.
30 1.1 uwe */
31 1.1 uwe
32 1.1 uwe #include <sys/cdefs.h>
33 1.7 nonaka __KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.7 2009/08/02 00:06:44 nonaka Exp $");
34 1.1 uwe
35 1.1 uwe #include "btn_obio.h"
36 1.1 uwe #include "pwrsw_obio.h"
37 1.1 uwe
38 1.1 uwe #include <sys/param.h>
39 1.1 uwe #include <sys/systm.h>
40 1.1 uwe #include <sys/device.h>
41 1.1 uwe
42 1.1 uwe #include <uvm/uvm_extern.h>
43 1.1 uwe
44 1.1 uwe #include <sh3/devreg.h>
45 1.1 uwe #include <sh3/mmu.h>
46 1.1 uwe #include <sh3/pmap.h>
47 1.1 uwe #include <sh3/pte.h>
48 1.1 uwe
49 1.1 uwe #include <machine/bus.h>
50 1.1 uwe #include <machine/cpu.h>
51 1.1 uwe #include <machine/intr.h>
52 1.1 uwe
53 1.1 uwe #include <landisk/dev/obiovar.h>
54 1.1 uwe
55 1.1 uwe #if (NPWRSW_OBIO > 0) || (NBTN_OBIO > 0)
56 1.1 uwe #include <dev/sysmon/sysmonvar.h>
57 1.1 uwe #include <dev/sysmon/sysmon_taskq.h>
58 1.1 uwe #endif
59 1.1 uwe
60 1.1 uwe #include "locators.h"
61 1.1 uwe
62 1.5 uwe
63 1.5 uwe struct obio_softc {
64 1.5 uwe device_t sc_dev;
65 1.5 uwe
66 1.5 uwe bus_space_tag_t sc_iot; /* io space tag */
67 1.5 uwe bus_space_tag_t sc_memt; /* mem space tag */
68 1.5 uwe };
69 1.5 uwe
70 1.5 uwe static int obio_match(device_t, cfdata_t, void *);
71 1.4 uwe static void obio_attach(device_t, device_t, void *);
72 1.1 uwe static int obio_print(void *, const char *);
73 1.5 uwe static int obio_search(device_t, cfdata_t, const int *, void *);
74 1.1 uwe
75 1.5 uwe CFATTACH_DECL_NEW(obio, sizeof(struct obio_softc),
76 1.1 uwe obio_match, obio_attach, NULL, NULL);
77 1.1 uwe
78 1.1 uwe static int
79 1.5 uwe obio_match(device_t parent, cfdata_t cf, void *aux)
80 1.1 uwe {
81 1.1 uwe struct obiobus_attach_args *oba = aux;
82 1.1 uwe
83 1.1 uwe if (strcmp(oba->oba_busname, cf->cf_name))
84 1.1 uwe return (0);
85 1.1 uwe
86 1.1 uwe return (1);
87 1.1 uwe }
88 1.1 uwe
89 1.1 uwe static void
90 1.4 uwe obio_attach(device_t parent, device_t self, void *aux)
91 1.1 uwe {
92 1.4 uwe struct obio_softc *sc = device_private(self);
93 1.1 uwe struct obiobus_attach_args *oba = aux;
94 1.1 uwe
95 1.4 uwe aprint_naive("\n");
96 1.4 uwe aprint_normal("\n");
97 1.1 uwe
98 1.5 uwe sc->sc_dev = self;
99 1.5 uwe
100 1.1 uwe sc->sc_iot = oba->oba_iot;
101 1.1 uwe sc->sc_memt = oba->oba_memt;
102 1.1 uwe
103 1.1 uwe #if (NPWRSW_OBIO > 0) || (NBTN_OBIO > 0)
104 1.1 uwe sysmon_power_settype("landisk");
105 1.1 uwe sysmon_task_queue_init();
106 1.1 uwe #endif
107 1.1 uwe
108 1.1 uwe config_search_ia(obio_search, self, "obio", NULL);
109 1.1 uwe }
110 1.1 uwe
111 1.1 uwe static int
112 1.5 uwe obio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
113 1.1 uwe {
114 1.1 uwe struct obio_io res_io[1];
115 1.1 uwe struct obio_iomem res_mem[1];
116 1.1 uwe struct obio_irq res_irq[1];
117 1.4 uwe struct obio_softc *sc = device_private(parent);
118 1.1 uwe struct obio_attach_args oa;
119 1.1 uwe int tryagain;
120 1.1 uwe
121 1.1 uwe do {
122 1.1 uwe oa.oa_iot = sc->sc_iot;
123 1.1 uwe oa.oa_memt = sc->sc_memt;
124 1.1 uwe
125 1.1 uwe res_io[0].or_addr = cf->cf_iobase;
126 1.1 uwe res_io[0].or_size = cf->cf_iosize;
127 1.1 uwe
128 1.1 uwe res_mem[0].or_addr = cf->cf_maddr;
129 1.1 uwe res_mem[0].or_size = cf->cf_msize;
130 1.1 uwe
131 1.1 uwe res_irq[0].or_irq = cf->cf_irq;
132 1.1 uwe
133 1.1 uwe oa.oa_io = res_io;
134 1.1 uwe oa.oa_nio = 1;
135 1.1 uwe
136 1.1 uwe oa.oa_iomem = res_mem;
137 1.1 uwe oa.oa_niomem = 1;
138 1.1 uwe
139 1.1 uwe oa.oa_irq = res_irq;
140 1.1 uwe oa.oa_nirq = 1;
141 1.1 uwe
142 1.1 uwe tryagain = 0;
143 1.1 uwe if (config_match(parent, cf, &oa) > 0) {
144 1.1 uwe config_attach(parent, cf, &oa, obio_print);
145 1.1 uwe tryagain = (cf->cf_fstate == FSTATE_STAR);
146 1.1 uwe }
147 1.1 uwe } while (tryagain);
148 1.1 uwe
149 1.1 uwe return (0);
150 1.1 uwe }
151 1.1 uwe
152 1.1 uwe static int
153 1.1 uwe obio_print(void *args, const char *name)
154 1.1 uwe {
155 1.1 uwe struct obio_attach_args *oa = args;
156 1.1 uwe const char *sep;
157 1.1 uwe int i;
158 1.1 uwe
159 1.1 uwe if (oa->oa_nio) {
160 1.1 uwe sep = "";
161 1.1 uwe aprint_normal(" port ");
162 1.1 uwe for (i = 0; i < oa->oa_nio; i++) {
163 1.1 uwe if (oa->oa_io[i].or_size == 0)
164 1.1 uwe continue;
165 1.1 uwe aprint_normal("%s0x%x", sep, oa->oa_io[i].or_addr);
166 1.1 uwe if (oa->oa_io[i].or_size > 1)
167 1.1 uwe aprint_normal("-0x%x", oa->oa_io[i].or_addr +
168 1.1 uwe oa->oa_io[i].or_size - 1);
169 1.1 uwe sep = ",";
170 1.1 uwe }
171 1.1 uwe }
172 1.1 uwe
173 1.1 uwe if (oa->oa_niomem) {
174 1.1 uwe sep = "";
175 1.1 uwe aprint_normal(" iomem ");
176 1.1 uwe for (i = 0; i < oa->oa_niomem; i++) {
177 1.1 uwe if (oa->oa_iomem[i].or_size == 0)
178 1.1 uwe continue;
179 1.1 uwe aprint_normal("%s0x%x", sep, oa->oa_iomem[i].or_addr);
180 1.1 uwe if (oa->oa_iomem[i].or_size > 1)
181 1.1 uwe aprint_normal("-0x%x", oa->oa_iomem[i].or_addr +
182 1.1 uwe oa->oa_iomem[i].or_size - 1);
183 1.1 uwe sep = ",";
184 1.1 uwe }
185 1.1 uwe }
186 1.1 uwe
187 1.1 uwe if (oa->oa_nirq) {
188 1.1 uwe sep = "";
189 1.1 uwe aprint_normal(" irq ");
190 1.1 uwe for (i = 0; i < oa->oa_nirq; i++) {
191 1.1 uwe if (oa->oa_irq[i].or_irq == IRQUNK)
192 1.1 uwe continue;
193 1.1 uwe aprint_normal("%s%d", sep, oa->oa_irq[i].or_irq);
194 1.1 uwe sep = ",";
195 1.1 uwe }
196 1.1 uwe }
197 1.1 uwe
198 1.1 uwe return (UNCONF);
199 1.1 uwe }
200 1.1 uwe
201 1.1 uwe /*
202 1.1 uwe * Set up an interrupt handler to start being called.
203 1.1 uwe */
204 1.1 uwe void *
205 1.1 uwe obio_intr_establish(int irq, int level, int (*ih_fun)(void *), void *ih_arg)
206 1.1 uwe {
207 1.1 uwe
208 1.1 uwe return extintr_establish(irq, level, ih_fun, ih_arg);
209 1.1 uwe }
210 1.1 uwe
211 1.1 uwe /*
212 1.1 uwe * Deregister an interrupt handler.
213 1.1 uwe */
214 1.1 uwe void
215 1.1 uwe obio_intr_disestablish(void *arg)
216 1.1 uwe {
217 1.1 uwe
218 1.1 uwe extintr_disestablish(arg);
219 1.1 uwe }
220 1.1 uwe
221 1.1 uwe /*
222 1.1 uwe * on-board I/O bus space
223 1.1 uwe */
224 1.1 uwe #define OBIO_IOMEM_IO 0 /* space is i/o space */
225 1.1 uwe #define OBIO_IOMEM_MEM 1 /* space is mem space */
226 1.1 uwe #define OBIO_IOMEM_PCMCIA_IO 2 /* PCMCIA IO space */
227 1.1 uwe #define OBIO_IOMEM_PCMCIA_MEM 3 /* PCMCIA Mem space */
228 1.1 uwe #define OBIO_IOMEM_PCMCIA_ATT 4 /* PCMCIA Attr space */
229 1.1 uwe #define OBIO_IOMEM_PCMCIA_8BIT 0x8000 /* PCMCIA BUS 8 BIT WIDTH */
230 1.1 uwe #define OBIO_IOMEM_PCMCIA_IO8 \
231 1.1 uwe (OBIO_IOMEM_PCMCIA_IO|OBIO_IOMEM_PCMCIA_8BIT)
232 1.1 uwe #define OBIO_IOMEM_PCMCIA_MEM8 \
233 1.1 uwe (OBIO_IOMEM_PCMCIA_MEM|OBIO_IOMEM_PCMCIA_8BIT)
234 1.1 uwe #define OBIO_IOMEM_PCMCIA_ATT8 \
235 1.1 uwe (OBIO_IOMEM_PCMCIA_ATT|OBIO_IOMEM_PCMCIA_8BIT)
236 1.1 uwe
237 1.1 uwe int obio_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags,
238 1.1 uwe bus_space_handle_t *bshp);
239 1.1 uwe void obio_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size);
240 1.1 uwe int obio_iomem_subregion(void *v, bus_space_handle_t bsh,
241 1.1 uwe bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
242 1.1 uwe int obio_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
243 1.1 uwe bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
244 1.1 uwe bus_addr_t *bpap, bus_space_handle_t *bshp);
245 1.1 uwe void obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size);
246 1.7 nonaka paddr_t obio_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot,
247 1.7 nonaka int flags);
248 1.1 uwe
249 1.1 uwe static int obio_iomem_add_mapping(bus_addr_t, bus_size_t, int,
250 1.1 uwe bus_space_handle_t *);
251 1.1 uwe
252 1.1 uwe static int
253 1.1 uwe obio_iomem_add_mapping(bus_addr_t bpa, bus_size_t size, int type,
254 1.1 uwe bus_space_handle_t *bshp)
255 1.1 uwe {
256 1.1 uwe u_long pa, endpa;
257 1.1 uwe vaddr_t va;
258 1.1 uwe pt_entry_t *pte;
259 1.1 uwe unsigned int m = 0;
260 1.1 uwe int io_type = type & ~OBIO_IOMEM_PCMCIA_8BIT;
261 1.1 uwe
262 1.1 uwe pa = sh3_trunc_page(bpa);
263 1.1 uwe endpa = sh3_round_page(bpa + size);
264 1.1 uwe
265 1.1 uwe #ifdef DIAGNOSTIC
266 1.1 uwe if (endpa <= pa)
267 1.1 uwe panic("obio_iomem_add_mapping: overflow");
268 1.1 uwe #endif
269 1.1 uwe
270 1.1 uwe va = uvm_km_alloc(kernel_map, endpa - pa, 0, UVM_KMF_VAONLY);
271 1.1 uwe if (va == 0){
272 1.1 uwe printf("obio_iomem_add_mapping: nomem\n");
273 1.1 uwe return (ENOMEM);
274 1.1 uwe }
275 1.1 uwe
276 1.1 uwe *bshp = (bus_space_handle_t)(va + (bpa & PGOFSET));
277 1.1 uwe
278 1.1 uwe #define MODE(t, s) \
279 1.1 uwe ((t) & OBIO_IOMEM_PCMCIA_8BIT) ? \
280 1.1 uwe _PG_PCMCIA_ ## s ## 8 : \
281 1.1 uwe _PG_PCMCIA_ ## s ## 16
282 1.1 uwe switch (io_type) {
283 1.1 uwe default:
284 1.1 uwe panic("unknown pcmcia space.");
285 1.1 uwe /* NOTREACHED */
286 1.1 uwe case OBIO_IOMEM_PCMCIA_IO:
287 1.1 uwe m = MODE(type, IO);
288 1.1 uwe break;
289 1.1 uwe case OBIO_IOMEM_PCMCIA_MEM:
290 1.1 uwe m = MODE(type, MEM);
291 1.1 uwe break;
292 1.1 uwe case OBIO_IOMEM_PCMCIA_ATT:
293 1.1 uwe m = MODE(type, ATTR);
294 1.1 uwe break;
295 1.1 uwe }
296 1.1 uwe #undef MODE
297 1.1 uwe
298 1.1 uwe for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
299 1.1 uwe pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE);
300 1.1 uwe pte = __pmap_kpte_lookup(va);
301 1.1 uwe KDASSERT(pte);
302 1.1 uwe *pte |= m; /* PTEA PCMCIA assistant bit */
303 1.1 uwe sh_tlb_update(0, va, *pte);
304 1.1 uwe }
305 1.1 uwe
306 1.1 uwe return (0);
307 1.1 uwe }
308 1.1 uwe
309 1.1 uwe int
310 1.1 uwe obio_iomem_map(void *v, bus_addr_t bpa, bus_size_t size,
311 1.1 uwe int flags, bus_space_handle_t *bshp)
312 1.1 uwe {
313 1.1 uwe bus_addr_t addr = SH3_PHYS_TO_P2SEG(bpa);
314 1.1 uwe int error;
315 1.1 uwe
316 1.1 uwe KASSERT((bpa & SH3_PHYS_MASK) == bpa);
317 1.1 uwe
318 1.1 uwe if (bpa < 0x14000000 || bpa >= 0x1c000000) {
319 1.1 uwe /* CS0,1,2,3,4,7 */
320 1.1 uwe *bshp = (bus_space_handle_t)addr;
321 1.1 uwe return (0);
322 1.1 uwe }
323 1.1 uwe
324 1.1 uwe /* CS5,6 */
325 1.1 uwe error = obio_iomem_add_mapping(addr, size, (int)(u_long)v, bshp);
326 1.1 uwe
327 1.1 uwe return (error);
328 1.1 uwe }
329 1.1 uwe
330 1.1 uwe void
331 1.1 uwe obio_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size)
332 1.1 uwe {
333 1.1 uwe u_long va, endva;
334 1.1 uwe bus_addr_t bpa;
335 1.1 uwe
336 1.1 uwe if (bsh >= SH3_P2SEG_BASE && bsh <= SH3_P2SEG_END) {
337 1.1 uwe /* maybe CS0,1,2,3,4,7 */
338 1.1 uwe return;
339 1.1 uwe }
340 1.1 uwe
341 1.1 uwe /* CS5,6 */
342 1.1 uwe va = sh3_trunc_page(bsh);
343 1.1 uwe endva = sh3_round_page(bsh + size);
344 1.1 uwe
345 1.1 uwe #ifdef DIAGNOSTIC
346 1.1 uwe if (endva <= va)
347 1.1 uwe panic("obio_io_unmap: overflow");
348 1.1 uwe #endif
349 1.1 uwe
350 1.1 uwe pmap_extract(pmap_kernel(), va, &bpa);
351 1.1 uwe bpa += bsh & PGOFSET;
352 1.1 uwe
353 1.1 uwe pmap_kremove(va, endva - va);
354 1.1 uwe
355 1.1 uwe /*
356 1.1 uwe * Free the kernel virtual mapping.
357 1.1 uwe */
358 1.1 uwe uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
359 1.1 uwe }
360 1.1 uwe
361 1.1 uwe int
362 1.1 uwe obio_iomem_subregion(void *v, bus_space_handle_t bsh,
363 1.1 uwe bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
364 1.1 uwe {
365 1.1 uwe
366 1.1 uwe *nbshp = bsh + offset;
367 1.1 uwe
368 1.1 uwe return (0);
369 1.1 uwe }
370 1.1 uwe
371 1.1 uwe int
372 1.1 uwe obio_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
373 1.1 uwe bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
374 1.1 uwe bus_addr_t *bpap, bus_space_handle_t *bshp)
375 1.1 uwe {
376 1.1 uwe
377 1.1 uwe *bshp = *bpap = rstart;
378 1.1 uwe
379 1.1 uwe return (0);
380 1.1 uwe }
381 1.1 uwe
382 1.1 uwe void
383 1.1 uwe obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size)
384 1.1 uwe {
385 1.1 uwe
386 1.1 uwe obio_iomem_unmap(v, bsh, size);
387 1.1 uwe }
388 1.1 uwe
389 1.7 nonaka paddr_t
390 1.7 nonaka obio_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot, int flags)
391 1.7 nonaka {
392 1.7 nonaka
393 1.7 nonaka return (paddr_t)-1;
394 1.7 nonaka }
395 1.7 nonaka
396 1.1 uwe /*
397 1.1 uwe * on-board I/O bus space read/write
398 1.1 uwe */
399 1.1 uwe uint8_t obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
400 1.1 uwe uint16_t obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
401 1.1 uwe uint32_t obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
402 1.1 uwe void obio_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
403 1.1 uwe bus_size_t offset, uint8_t *addr, bus_size_t count);
404 1.1 uwe void obio_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
405 1.1 uwe bus_size_t offset, uint16_t *addr, bus_size_t count);
406 1.1 uwe void obio_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
407 1.1 uwe bus_size_t offset, uint32_t *addr, bus_size_t count);
408 1.1 uwe void obio_iomem_read_region_1(void *v, bus_space_handle_t bsh,
409 1.1 uwe bus_size_t offset, uint8_t *addr, bus_size_t count);
410 1.1 uwe void obio_iomem_read_region_2(void *v, bus_space_handle_t bsh,
411 1.1 uwe bus_size_t offset, uint16_t *addr, bus_size_t count);
412 1.1 uwe void obio_iomem_read_region_4(void *v, bus_space_handle_t bsh,
413 1.1 uwe bus_size_t offset, uint32_t *addr, bus_size_t count);
414 1.1 uwe void obio_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
415 1.1 uwe uint8_t value);
416 1.1 uwe void obio_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
417 1.1 uwe uint16_t value);
418 1.1 uwe void obio_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
419 1.1 uwe uint32_t value);
420 1.1 uwe void obio_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
421 1.1 uwe bus_size_t offset, const uint8_t *addr, bus_size_t count);
422 1.1 uwe void obio_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
423 1.1 uwe bus_size_t offset, const uint16_t *addr, bus_size_t count);
424 1.1 uwe void obio_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
425 1.1 uwe bus_size_t offset, const uint32_t *addr, bus_size_t count);
426 1.1 uwe void obio_iomem_write_region_1(void *v, bus_space_handle_t bsh,
427 1.1 uwe bus_size_t offset, const uint8_t *addr, bus_size_t count);
428 1.1 uwe void obio_iomem_write_region_2(void *v, bus_space_handle_t bsh,
429 1.1 uwe bus_size_t offset, const uint16_t *addr, bus_size_t count);
430 1.1 uwe void obio_iomem_write_region_4(void *v, bus_space_handle_t bsh,
431 1.1 uwe bus_size_t offset, const uint32_t *addr, bus_size_t count);
432 1.1 uwe void obio_iomem_set_multi_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
433 1.1 uwe uint8_t val, bus_size_t count);
434 1.1 uwe void obio_iomem_set_multi_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
435 1.1 uwe uint16_t val, bus_size_t count);
436 1.1 uwe void obio_iomem_set_multi_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
437 1.1 uwe uint32_t val, bus_size_t count);
438 1.1 uwe void obio_iomem_set_region_1(void *v, bus_space_handle_t bsh,
439 1.1 uwe bus_size_t offset, uint8_t val, bus_size_t count);
440 1.1 uwe void obio_iomem_set_region_2(void *v, bus_space_handle_t bsh,
441 1.1 uwe bus_size_t offset, uint16_t val, bus_size_t count);
442 1.1 uwe void obio_iomem_set_region_4(void *v, bus_space_handle_t bsh,
443 1.1 uwe bus_size_t offset, uint32_t val, bus_size_t count);
444 1.1 uwe void obio_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1,
445 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
446 1.1 uwe void obio_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1,
447 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
448 1.1 uwe void obio_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1,
449 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
450 1.1 uwe
451 1.1 uwe struct _bus_space obio_bus_io =
452 1.1 uwe {
453 1.1 uwe .bs_cookie = (void *)OBIO_IOMEM_PCMCIA_IO,
454 1.1 uwe
455 1.1 uwe .bs_map = obio_iomem_map,
456 1.1 uwe .bs_unmap = obio_iomem_unmap,
457 1.1 uwe .bs_subregion = obio_iomem_subregion,
458 1.1 uwe
459 1.1 uwe .bs_alloc = obio_iomem_alloc,
460 1.1 uwe .bs_free = obio_iomem_free,
461 1.1 uwe
462 1.7 nonaka .bs_mmap = obio_iomem_mmap,
463 1.7 nonaka
464 1.1 uwe .bs_r_1 = obio_iomem_read_1,
465 1.1 uwe .bs_r_2 = obio_iomem_read_2,
466 1.1 uwe .bs_r_4 = obio_iomem_read_4,
467 1.1 uwe
468 1.1 uwe .bs_rm_1 = obio_iomem_read_multi_1,
469 1.1 uwe .bs_rm_2 = obio_iomem_read_multi_2,
470 1.1 uwe .bs_rm_4 = obio_iomem_read_multi_4,
471 1.1 uwe
472 1.1 uwe .bs_rr_1 = obio_iomem_read_region_1,
473 1.1 uwe .bs_rr_2 = obio_iomem_read_region_2,
474 1.1 uwe .bs_rr_4 = obio_iomem_read_region_4,
475 1.1 uwe
476 1.1 uwe .bs_w_1 = obio_iomem_write_1,
477 1.1 uwe .bs_w_2 = obio_iomem_write_2,
478 1.1 uwe .bs_w_4 = obio_iomem_write_4,
479 1.1 uwe
480 1.1 uwe .bs_wm_1 = obio_iomem_write_multi_1,
481 1.1 uwe .bs_wm_2 = obio_iomem_write_multi_2,
482 1.1 uwe .bs_wm_4 = obio_iomem_write_multi_4,
483 1.1 uwe
484 1.1 uwe .bs_wr_1 = obio_iomem_write_region_1,
485 1.1 uwe .bs_wr_2 = obio_iomem_write_region_2,
486 1.1 uwe .bs_wr_4 = obio_iomem_write_region_4,
487 1.1 uwe
488 1.1 uwe .bs_sm_1 = obio_iomem_set_multi_1,
489 1.1 uwe .bs_sm_2 = obio_iomem_set_multi_2,
490 1.1 uwe .bs_sm_4 = obio_iomem_set_multi_4,
491 1.1 uwe
492 1.1 uwe .bs_sr_1 = obio_iomem_set_region_1,
493 1.1 uwe .bs_sr_2 = obio_iomem_set_region_2,
494 1.1 uwe .bs_sr_4 = obio_iomem_set_region_4,
495 1.1 uwe
496 1.1 uwe .bs_c_1 = obio_iomem_copy_region_1,
497 1.1 uwe .bs_c_2 = obio_iomem_copy_region_2,
498 1.1 uwe .bs_c_4 = obio_iomem_copy_region_4,
499 1.1 uwe };
500 1.1 uwe
501 1.1 uwe struct _bus_space obio_bus_mem =
502 1.1 uwe {
503 1.1 uwe .bs_cookie = (void *)OBIO_IOMEM_PCMCIA_MEM,
504 1.1 uwe
505 1.1 uwe .bs_map = obio_iomem_map,
506 1.1 uwe .bs_unmap = obio_iomem_unmap,
507 1.1 uwe .bs_subregion = obio_iomem_subregion,
508 1.1 uwe
509 1.1 uwe .bs_alloc = obio_iomem_alloc,
510 1.1 uwe .bs_free = obio_iomem_free,
511 1.1 uwe
512 1.1 uwe .bs_r_1 = obio_iomem_read_1,
513 1.1 uwe .bs_r_2 = obio_iomem_read_2,
514 1.1 uwe .bs_r_4 = obio_iomem_read_4,
515 1.1 uwe
516 1.1 uwe .bs_rm_1 = obio_iomem_read_multi_1,
517 1.1 uwe .bs_rm_2 = obio_iomem_read_multi_2,
518 1.1 uwe .bs_rm_4 = obio_iomem_read_multi_4,
519 1.1 uwe
520 1.1 uwe .bs_rr_1 = obio_iomem_read_region_1,
521 1.1 uwe .bs_rr_2 = obio_iomem_read_region_2,
522 1.1 uwe .bs_rr_4 = obio_iomem_read_region_4,
523 1.1 uwe
524 1.1 uwe .bs_w_1 = obio_iomem_write_1,
525 1.1 uwe .bs_w_2 = obio_iomem_write_2,
526 1.1 uwe .bs_w_4 = obio_iomem_write_4,
527 1.1 uwe
528 1.1 uwe .bs_wm_1 = obio_iomem_write_multi_1,
529 1.1 uwe .bs_wm_2 = obio_iomem_write_multi_2,
530 1.1 uwe .bs_wm_4 = obio_iomem_write_multi_4,
531 1.1 uwe
532 1.1 uwe .bs_wr_1 = obio_iomem_write_region_1,
533 1.1 uwe .bs_wr_2 = obio_iomem_write_region_2,
534 1.1 uwe .bs_wr_4 = obio_iomem_write_region_4,
535 1.1 uwe
536 1.1 uwe .bs_sm_1 = obio_iomem_set_multi_1,
537 1.1 uwe .bs_sm_2 = obio_iomem_set_multi_2,
538 1.1 uwe .bs_sm_4 = obio_iomem_set_multi_4,
539 1.1 uwe
540 1.1 uwe .bs_sr_1 = obio_iomem_set_region_1,
541 1.1 uwe .bs_sr_2 = obio_iomem_set_region_2,
542 1.1 uwe .bs_sr_4 = obio_iomem_set_region_4,
543 1.1 uwe
544 1.1 uwe .bs_c_1 = obio_iomem_copy_region_1,
545 1.1 uwe .bs_c_2 = obio_iomem_copy_region_2,
546 1.1 uwe .bs_c_4 = obio_iomem_copy_region_4,
547 1.1 uwe };
548 1.1 uwe
549 1.1 uwe /* read */
550 1.1 uwe uint8_t
551 1.1 uwe obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
552 1.1 uwe {
553 1.1 uwe
554 1.1 uwe return *(volatile uint8_t *)(bsh + offset);
555 1.1 uwe }
556 1.1 uwe
557 1.1 uwe uint16_t
558 1.1 uwe obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
559 1.1 uwe {
560 1.1 uwe
561 1.1 uwe return *(volatile uint16_t *)(bsh + offset);
562 1.1 uwe }
563 1.1 uwe
564 1.1 uwe uint32_t
565 1.1 uwe obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
566 1.1 uwe {
567 1.1 uwe
568 1.1 uwe return *(volatile uint32_t *)(bsh + offset);
569 1.1 uwe }
570 1.1 uwe
571 1.1 uwe void
572 1.1 uwe obio_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
573 1.1 uwe bus_size_t offset, uint8_t *addr, bus_size_t count)
574 1.1 uwe {
575 1.1 uwe volatile uint8_t *p = (void *)(bsh + offset);
576 1.1 uwe
577 1.1 uwe while (count--) {
578 1.1 uwe *addr++ = *p;
579 1.1 uwe }
580 1.1 uwe }
581 1.1 uwe
582 1.1 uwe void
583 1.1 uwe obio_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
584 1.1 uwe bus_size_t offset, uint16_t *addr, bus_size_t count)
585 1.1 uwe {
586 1.1 uwe volatile uint16_t *p = (void *)(bsh + offset);
587 1.1 uwe
588 1.1 uwe while (count--) {
589 1.1 uwe *addr++ = *p;
590 1.1 uwe }
591 1.1 uwe }
592 1.1 uwe
593 1.1 uwe void
594 1.1 uwe obio_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
595 1.1 uwe bus_size_t offset, uint32_t *addr, bus_size_t count)
596 1.1 uwe {
597 1.1 uwe volatile uint32_t *p = (void *)(bsh + offset);
598 1.1 uwe
599 1.1 uwe while (count--) {
600 1.1 uwe *addr++ = *p;
601 1.1 uwe }
602 1.1 uwe }
603 1.1 uwe
604 1.1 uwe void
605 1.1 uwe obio_iomem_read_region_1(void *v, bus_space_handle_t bsh,
606 1.1 uwe bus_size_t offset, uint8_t *addr, bus_size_t count)
607 1.1 uwe {
608 1.1 uwe volatile uint8_t *p = (void *)(bsh + offset);
609 1.1 uwe
610 1.1 uwe while (count--) {
611 1.1 uwe *addr++ = *p++;
612 1.1 uwe }
613 1.1 uwe }
614 1.1 uwe
615 1.1 uwe void
616 1.1 uwe obio_iomem_read_region_2(void *v, bus_space_handle_t bsh,
617 1.1 uwe bus_size_t offset, uint16_t *addr, bus_size_t count)
618 1.1 uwe {
619 1.1 uwe volatile uint16_t *p = (void *)(bsh + offset);
620 1.1 uwe
621 1.1 uwe while (count--) {
622 1.1 uwe *addr++ = *p++;
623 1.1 uwe }
624 1.1 uwe }
625 1.1 uwe
626 1.1 uwe void
627 1.1 uwe obio_iomem_read_region_4(void *v, bus_space_handle_t bsh,
628 1.1 uwe bus_size_t offset, uint32_t *addr, bus_size_t count)
629 1.1 uwe {
630 1.1 uwe volatile uint32_t *p = (void *)(bsh + offset);
631 1.1 uwe
632 1.1 uwe while (count--) {
633 1.1 uwe *addr++ = *p++;
634 1.1 uwe }
635 1.1 uwe }
636 1.1 uwe
637 1.1 uwe /* write */
638 1.1 uwe void
639 1.1 uwe obio_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,
640 1.1 uwe uint8_t value)
641 1.1 uwe {
642 1.1 uwe
643 1.1 uwe *(volatile uint8_t *)(bsh + offset) = value;
644 1.1 uwe }
645 1.1 uwe
646 1.1 uwe void
647 1.1 uwe obio_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,
648 1.1 uwe uint16_t value)
649 1.1 uwe {
650 1.1 uwe
651 1.1 uwe *(volatile uint16_t *)(bsh + offset) = value;
652 1.1 uwe }
653 1.1 uwe
654 1.1 uwe void
655 1.1 uwe obio_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,
656 1.1 uwe uint32_t value)
657 1.1 uwe {
658 1.1 uwe
659 1.1 uwe *(volatile uint32_t *)(bsh + offset) = value;
660 1.1 uwe }
661 1.1 uwe
662 1.1 uwe void
663 1.1 uwe obio_iomem_write_multi_1(void *v, bus_space_handle_t bsh,
664 1.1 uwe bus_size_t offset, const uint8_t *addr, bus_size_t count)
665 1.1 uwe {
666 1.1 uwe volatile uint8_t *p = (void *)(bsh + offset);
667 1.1 uwe
668 1.1 uwe while (count--) {
669 1.1 uwe *p = *addr++;
670 1.1 uwe }
671 1.1 uwe }
672 1.1 uwe
673 1.1 uwe void
674 1.1 uwe obio_iomem_write_multi_2(void *v, bus_space_handle_t bsh,
675 1.1 uwe bus_size_t offset, const uint16_t *addr, bus_size_t count)
676 1.1 uwe {
677 1.1 uwe volatile uint16_t *p = (void *)(bsh + offset);
678 1.1 uwe
679 1.1 uwe while (count--) {
680 1.1 uwe *p = *addr++;
681 1.1 uwe }
682 1.1 uwe }
683 1.1 uwe
684 1.1 uwe void
685 1.1 uwe obio_iomem_write_multi_4(void *v, bus_space_handle_t bsh,
686 1.1 uwe bus_size_t offset, const uint32_t *addr, bus_size_t count)
687 1.1 uwe {
688 1.1 uwe volatile uint32_t *p = (void *)(bsh + offset);
689 1.1 uwe
690 1.1 uwe while (count--) {
691 1.1 uwe *p = *addr++;
692 1.1 uwe }
693 1.1 uwe }
694 1.1 uwe
695 1.1 uwe void
696 1.1 uwe obio_iomem_write_region_1(void *v, bus_space_handle_t bsh,
697 1.1 uwe bus_size_t offset, const uint8_t *addr, bus_size_t count)
698 1.1 uwe {
699 1.1 uwe volatile uint8_t *p = (void *)(bsh + offset);
700 1.1 uwe
701 1.1 uwe while (count--) {
702 1.1 uwe *p++ = *addr++;
703 1.1 uwe }
704 1.1 uwe }
705 1.1 uwe
706 1.1 uwe void
707 1.1 uwe obio_iomem_write_region_2(void *v, bus_space_handle_t bsh,
708 1.1 uwe bus_size_t offset, const uint16_t *addr, bus_size_t count)
709 1.1 uwe {
710 1.1 uwe volatile uint16_t *p = (void *)(bsh + offset);
711 1.1 uwe
712 1.1 uwe while (count--) {
713 1.1 uwe *p++ = *addr++;
714 1.1 uwe }
715 1.1 uwe }
716 1.1 uwe
717 1.1 uwe void
718 1.1 uwe obio_iomem_write_region_4(void *v, bus_space_handle_t bsh,
719 1.1 uwe bus_size_t offset, const uint32_t *addr, bus_size_t count)
720 1.1 uwe {
721 1.1 uwe volatile uint32_t *p = (void *)(bsh + offset);
722 1.1 uwe
723 1.1 uwe while (count--) {
724 1.1 uwe *p++ = *addr++;
725 1.1 uwe }
726 1.1 uwe }
727 1.1 uwe
728 1.1 uwe void
729 1.1 uwe obio_iomem_set_multi_1(void *v, bus_space_handle_t bsh,
730 1.1 uwe bus_size_t offset, uint8_t val, bus_size_t count)
731 1.1 uwe {
732 1.1 uwe volatile uint8_t *p = (void *)(bsh + offset);
733 1.1 uwe
734 1.1 uwe while (count--) {
735 1.1 uwe *p = val;
736 1.1 uwe }
737 1.1 uwe }
738 1.1 uwe
739 1.1 uwe void
740 1.1 uwe obio_iomem_set_multi_2(void *v, bus_space_handle_t bsh,
741 1.1 uwe bus_size_t offset, uint16_t val, bus_size_t count)
742 1.1 uwe {
743 1.1 uwe volatile uint16_t *p = (void *)(bsh + offset);
744 1.1 uwe
745 1.1 uwe while (count--) {
746 1.1 uwe *p = val;
747 1.1 uwe }
748 1.1 uwe }
749 1.1 uwe
750 1.1 uwe void
751 1.1 uwe obio_iomem_set_multi_4(void *v, bus_space_handle_t bsh,
752 1.1 uwe bus_size_t offset, uint32_t val, bus_size_t count)
753 1.1 uwe {
754 1.1 uwe volatile uint32_t *p = (void *)(bsh + offset);
755 1.1 uwe
756 1.1 uwe while (count--) {
757 1.1 uwe *p = val;
758 1.1 uwe }
759 1.1 uwe }
760 1.1 uwe
761 1.1 uwe void
762 1.1 uwe obio_iomem_set_region_1(void *v, bus_space_handle_t bsh,
763 1.1 uwe bus_size_t offset, uint8_t val, bus_size_t count)
764 1.1 uwe {
765 1.1 uwe volatile uint8_t *addr = (void *)(bsh + offset);
766 1.1 uwe
767 1.1 uwe while (count--) {
768 1.1 uwe *addr++ = val;
769 1.1 uwe }
770 1.1 uwe }
771 1.1 uwe
772 1.1 uwe void
773 1.1 uwe obio_iomem_set_region_2(void *v, bus_space_handle_t bsh,
774 1.1 uwe bus_size_t offset, uint16_t val, bus_size_t count)
775 1.1 uwe {
776 1.1 uwe volatile uint16_t *addr = (void *)(bsh + offset);
777 1.1 uwe
778 1.1 uwe while (count--) {
779 1.1 uwe *addr++ = val;
780 1.1 uwe }
781 1.1 uwe }
782 1.1 uwe
783 1.1 uwe void
784 1.1 uwe obio_iomem_set_region_4(void *v, bus_space_handle_t bsh,
785 1.1 uwe bus_size_t offset, uint32_t val, bus_size_t count)
786 1.1 uwe {
787 1.1 uwe volatile uint32_t *addr = (void *)(bsh + offset);
788 1.1 uwe
789 1.1 uwe while (count--) {
790 1.1 uwe *addr++ = val;
791 1.1 uwe }
792 1.1 uwe }
793 1.1 uwe
794 1.1 uwe void
795 1.1 uwe obio_iomem_copy_region_1(void *v, bus_space_handle_t h1, bus_size_t o1,
796 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
797 1.1 uwe {
798 1.1 uwe volatile uint8_t *addr1 = (void *)(h1 + o1);
799 1.1 uwe volatile uint8_t *addr2 = (void *)(h2 + o2);
800 1.1 uwe
801 1.1 uwe if (addr1 >= addr2) { /* src after dest: copy forward */
802 1.1 uwe while (count--) {
803 1.1 uwe *addr2++ = *addr1++;
804 1.1 uwe }
805 1.1 uwe } else { /* dest after src: copy backwards */
806 1.1 uwe addr1 += count - 1;
807 1.1 uwe addr2 += count - 1;
808 1.1 uwe while (count--) {
809 1.1 uwe *addr2-- = *addr1--;
810 1.1 uwe }
811 1.1 uwe }
812 1.1 uwe }
813 1.1 uwe
814 1.1 uwe void
815 1.1 uwe obio_iomem_copy_region_2(void *v, bus_space_handle_t h1, bus_size_t o1,
816 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
817 1.1 uwe {
818 1.1 uwe volatile uint16_t *addr1 = (void *)(h1 + o1);
819 1.1 uwe volatile uint16_t *addr2 = (void *)(h2 + o2);
820 1.1 uwe
821 1.1 uwe if (addr1 >= addr2) { /* src after dest: copy forward */
822 1.1 uwe while (count--) {
823 1.1 uwe *addr2++ = *addr1++;
824 1.1 uwe }
825 1.1 uwe } else { /* dest after src: copy backwards */
826 1.1 uwe addr1 += count - 1;
827 1.1 uwe addr2 += count - 1;
828 1.1 uwe while (count--) {
829 1.1 uwe *addr2-- = *addr1--;
830 1.1 uwe }
831 1.1 uwe }
832 1.1 uwe }
833 1.1 uwe
834 1.1 uwe void
835 1.1 uwe obio_iomem_copy_region_4(void *v, bus_space_handle_t h1, bus_size_t o1,
836 1.1 uwe bus_space_handle_t h2, bus_size_t o2, bus_size_t count)
837 1.1 uwe {
838 1.1 uwe volatile uint32_t *addr1 = (void *)(h1 + o1);
839 1.1 uwe volatile uint32_t *addr2 = (void *)(h2 + o2);
840 1.1 uwe
841 1.1 uwe if (addr1 >= addr2) { /* src after dest: copy forward */
842 1.1 uwe while (count--) {
843 1.1 uwe *addr2++ = *addr1++;
844 1.1 uwe }
845 1.1 uwe } else { /* dest after src: copy backwards */
846 1.1 uwe addr1 += count - 1;
847 1.1 uwe addr2 += count - 1;
848 1.1 uwe while (count--) {
849 1.1 uwe *addr2-- = *addr1--;
850 1.1 uwe }
851 1.1 uwe }
852 1.1 uwe }
853