rs5c313_landisk.c revision 1.5 1 1.5 nonaka /* $NetBSD: rs5c313_landisk.c,v 1.5 2010/04/06 15:29:19 nonaka Exp $ */
2 1.1 uwe
3 1.1 uwe /*-
4 1.1 uwe * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 1.1 uwe * All rights reserved.
6 1.1 uwe *
7 1.1 uwe * Redistribution and use in source and binary forms, with or without
8 1.1 uwe * modification, are permitted provided that the following conditions
9 1.1 uwe * are met:
10 1.1 uwe * 1. Redistributions of source code must retain the above copyright
11 1.1 uwe * notice, this list of conditions and the following disclaimer.
12 1.1 uwe * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 uwe * notice, this list of conditions and the following disclaimer in the
14 1.1 uwe * documentation and/or other materials provided with the distribution.
15 1.1 uwe *
16 1.1 uwe * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.1 uwe * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 uwe * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 uwe * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.1 uwe * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 uwe * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 uwe * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 uwe * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 uwe * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.1 uwe * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.1 uwe * POSSIBILITY OF SUCH DAMAGE.
27 1.1 uwe */
28 1.1 uwe
29 1.1 uwe #include <sys/cdefs.h>
30 1.5 nonaka __KERNEL_RCSID(0, "$NetBSD: rs5c313_landisk.c,v 1.5 2010/04/06 15:29:19 nonaka Exp $");
31 1.1 uwe
32 1.1 uwe #include <sys/param.h>
33 1.1 uwe #include <sys/systm.h>
34 1.1 uwe #include <sys/device.h>
35 1.1 uwe #include <sys/kernel.h>
36 1.1 uwe
37 1.1 uwe #include <dev/clock_subr.h>
38 1.1 uwe #include <dev/ic/rs5c313var.h>
39 1.1 uwe
40 1.1 uwe #include <sh3/devreg.h>
41 1.1 uwe #include <sh3/scireg.h>
42 1.1 uwe
43 1.1 uwe #include <landisk/landisk/landiskreg.h>
44 1.1 uwe
45 1.1 uwe
46 1.1 uwe /* autoconf glue */
47 1.3 uwe static int rs5c313_landisk_match(device_t, cfdata_t, void *);
48 1.2 uwe static void rs5c313_landisk_attach(device_t, device_t, void *);
49 1.1 uwe
50 1.3 uwe CFATTACH_DECL_NEW(rs5c313_landisk, sizeof(struct rs5c313_softc),
51 1.1 uwe rs5c313_landisk_match, rs5c313_landisk_attach, NULL, NULL);
52 1.1 uwe
53 1.1 uwe
54 1.1 uwe /* chip access methods */
55 1.1 uwe static void rtc_begin(struct rs5c313_softc *);
56 1.1 uwe static void rtc_ce(struct rs5c313_softc *, int);
57 1.1 uwe static void rtc_dir(struct rs5c313_softc *, int);
58 1.1 uwe static void rtc_clk(struct rs5c313_softc *, int);
59 1.1 uwe static int rtc_read(struct rs5c313_softc *);
60 1.1 uwe static void rtc_write(struct rs5c313_softc *, int);
61 1.1 uwe
62 1.2 uwe static struct rs5c313_ops rs5c313_landisk_ops = {
63 1.1 uwe .rs5c313_op_begin = rtc_begin,
64 1.1 uwe .rs5c313_op_ce = rtc_ce,
65 1.1 uwe .rs5c313_op_clk = rtc_clk,
66 1.1 uwe .rs5c313_op_dir = rtc_dir,
67 1.1 uwe .rs5c313_op_read = rtc_read,
68 1.1 uwe .rs5c313_op_write = rtc_write,
69 1.1 uwe };
70 1.1 uwe
71 1.1 uwe #define ndelay(x) delay(x)
72 1.1 uwe
73 1.1 uwe
74 1.1 uwe
75 1.1 uwe static int
76 1.3 uwe rs5c313_landisk_match(device_t parent, cfdata_t cf, void *aux)
77 1.1 uwe {
78 1.1 uwe static int matched = 0;
79 1.1 uwe
80 1.1 uwe if (matched)
81 1.1 uwe return 0;
82 1.1 uwe
83 1.1 uwe matched = 1;
84 1.1 uwe return 1;
85 1.1 uwe }
86 1.1 uwe
87 1.1 uwe
88 1.1 uwe static void
89 1.2 uwe rs5c313_landisk_attach(device_t parent, device_t self, void *aux)
90 1.1 uwe {
91 1.2 uwe struct rs5c313_softc *sc = device_private(self);
92 1.1 uwe
93 1.3 uwe sc->sc_dev = self;
94 1.5 nonaka sc->sc_model = MODEL_5C313;
95 1.1 uwe sc->sc_ops = &rs5c313_landisk_ops;
96 1.1 uwe rs5c313_attach(sc);
97 1.1 uwe }
98 1.1 uwe
99 1.1 uwe
100 1.1 uwe static void
101 1.1 uwe rtc_begin(struct rs5c313_softc *sc)
102 1.1 uwe {
103 1.1 uwe
104 1.1 uwe SHREG_SCSPTR = SCSPTR_SPB1IO | SCSPTR_SPB1DT
105 1.1 uwe | SCSPTR_SPB0IO | SCSPTR_SPB0DT;
106 1.1 uwe ndelay(100);
107 1.1 uwe }
108 1.1 uwe
109 1.1 uwe
110 1.1 uwe /*
111 1.1 uwe * CE pin
112 1.1 uwe */
113 1.1 uwe static void
114 1.1 uwe rtc_ce(struct rs5c313_softc *sc, int onoff)
115 1.1 uwe {
116 1.1 uwe
117 1.1 uwe if (onoff)
118 1.1 uwe _reg_write_1(LANDISK_PWRMNG, PWRMNG_RTC_CE);
119 1.1 uwe else
120 1.1 uwe _reg_write_1(LANDISK_PWRMNG, 0);
121 1.1 uwe ndelay(600);
122 1.1 uwe }
123 1.1 uwe
124 1.1 uwe
125 1.1 uwe /*
126 1.1 uwe * SCLK pin is connnected to SPB0DT.
127 1.1 uwe * SPB0DT is always in output mode, we set SPB0IO in rtc_begin.
128 1.1 uwe */
129 1.1 uwe static void
130 1.1 uwe rtc_clk(struct rs5c313_softc *sc, int onoff)
131 1.1 uwe {
132 1.1 uwe uint8_t r = SHREG_SCSPTR;
133 1.1 uwe
134 1.1 uwe if (onoff)
135 1.1 uwe r |= SCSPTR_SPB0DT;
136 1.1 uwe else
137 1.1 uwe r &= ~SCSPTR_SPB0DT;
138 1.1 uwe SHREG_SCSPTR = r;
139 1.1 uwe }
140 1.1 uwe
141 1.1 uwe
142 1.1 uwe /*
143 1.1 uwe * SIO pin is connected to SPB1DT.
144 1.1 uwe * SPB1DT is output when SPB1IO is set.
145 1.1 uwe */
146 1.1 uwe static void
147 1.1 uwe rtc_dir(struct rs5c313_softc *sc, int output)
148 1.1 uwe {
149 1.1 uwe uint8_t r = SHREG_SCSPTR;
150 1.1 uwe
151 1.1 uwe if (output)
152 1.1 uwe r |= SCSPTR_SPB1IO;
153 1.1 uwe else
154 1.1 uwe r &= ~SCSPTR_SPB1IO;
155 1.1 uwe SHREG_SCSPTR = r;
156 1.1 uwe }
157 1.1 uwe
158 1.1 uwe
159 1.1 uwe /*
160 1.1 uwe * Read bit from SPB1DT pin.
161 1.1 uwe */
162 1.1 uwe static int
163 1.1 uwe rtc_read(struct rs5c313_softc *sc)
164 1.1 uwe {
165 1.1 uwe int bit;
166 1.1 uwe
167 1.1 uwe ndelay(300);
168 1.1 uwe
169 1.1 uwe bit = (SHREG_SCSPTR & SCSPTR_SPB1DT) ? 1 : 0;
170 1.1 uwe
171 1.1 uwe rtc_clk(sc, 0);
172 1.1 uwe ndelay(300);
173 1.1 uwe rtc_clk(sc, 1);
174 1.1 uwe
175 1.1 uwe return bit;
176 1.1 uwe }
177 1.1 uwe
178 1.1 uwe
179 1.1 uwe /*
180 1.1 uwe * Write bit via SPB1DT pin.
181 1.1 uwe */
182 1.1 uwe static void
183 1.1 uwe rtc_write(struct rs5c313_softc *sc, int bit)
184 1.1 uwe {
185 1.1 uwe uint8_t r = SHREG_SCSPTR;
186 1.1 uwe
187 1.1 uwe if (bit)
188 1.1 uwe r |= SCSPTR_SPB1DT;
189 1.1 uwe else
190 1.1 uwe r &= ~SCSPTR_SPB1DT;
191 1.1 uwe SHREG_SCSPTR = r;
192 1.1 uwe
193 1.1 uwe ndelay(300);
194 1.1 uwe
195 1.1 uwe rtc_clk(sc, 0);
196 1.1 uwe ndelay(300);
197 1.1 uwe rtc_clk(sc, 1);
198 1.1 uwe }
199