lunafb.c revision 1.48
1 /* $NetBSD: lunafb.c,v 1.48 2022/10/01 14:02:08 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Tohru Nishimura. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 33 34 __KERNEL_RCSID(0, "$NetBSD: lunafb.c,v 1.48 2022/10/01 14:02:08 tsutsui Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 #include <sys/ioctl.h> 41 #include <sys/kmem.h> 42 #include <sys/mman.h> 43 #include <sys/proc.h> 44 #include <sys/tty.h> 45 #include <sys/errno.h> 46 #include <sys/buf.h> 47 48 #include <uvm/uvm_extern.h> 49 50 #include <dev/wscons/wsconsio.h> 51 #include <dev/wscons/wsdisplayvar.h> 52 #include <dev/rasops/rasops.h> 53 54 #include <machine/cpu.h> 55 #include <machine/autoconf.h> 56 57 #include <arch/luna68k/dev/omrasopsvar.h> 58 59 #include "ioconf.h" 60 61 struct bt454 { 62 volatile uint8_t bt_addr; /* map address register */ 63 volatile uint8_t bt_cmap; /* colormap data register */ 64 }; 65 66 struct bt458 { 67 volatile uint8_t bt_addr; /* map address register */ 68 uint8_t pad0[3]; 69 volatile uint8_t bt_cmap; /* colormap data register */ 70 uint8_t pad1[3]; 71 volatile uint8_t bt_ctrl; /* control register */ 72 uint8_t pad2[3]; 73 volatile uint8_t bt_omap; /* overlay (cursor) map register */ 74 uint8_t pad3[3]; 75 }; 76 77 #define OMFB_RFCNT BMAP_RFCNT /* video h-origin/v-origin */ 78 #define OMFB_RAMDAC BMAP_PALLET2 /* Bt454/Bt458 RAMDAC */ 79 #define OMFB_FB_WADDR (BMAP_BMP + 8) /* common bitmap plane */ 80 #define OMFB_FB_RADDR (BMAP_BMAP0 + 8)/* bitmap plane #0 */ 81 82 #define OMFB_SIZE (BMAP_FN0 - BMAP_BMP + PAGE_SIZE) 83 84 struct hwcmap { 85 #define CMAP_SIZE 256 86 uint8_t r[CMAP_SIZE]; 87 uint8_t g[CMAP_SIZE]; 88 uint8_t b[CMAP_SIZE]; 89 }; 90 91 static const struct { 92 uint8_t r; 93 uint8_t g; 94 uint8_t b; 95 } ansicmap[16] = { 96 { 0, 0, 0}, 97 { 0x80, 0, 0}, 98 { 0, 0x80, 0}, 99 { 0x80, 0x80, 0}, 100 { 0, 0, 0x80}, 101 { 0x80, 0, 0x80}, 102 { 0, 0x80, 0x80}, 103 { 0xc0, 0xc0, 0xc0}, 104 { 0x80, 0x80, 0x80}, 105 { 0xff, 0, 0}, 106 { 0, 0xff, 0}, 107 { 0xff, 0xff, 0}, 108 { 0, 0, 0xff}, 109 { 0xff, 0, 0xff}, 110 { 0, 0xff, 0xff}, 111 { 0xff, 0xff, 0xff}, 112 }; 113 114 struct om_hwdevconfig { 115 int dc_wid; /* width of frame buffer */ 116 int dc_ht; /* height of frame buffer */ 117 int dc_depth; /* depth, bits per pixel */ 118 int dc_rowbytes; /* bytes in a FB scan line */ 119 int dc_cmsize; /* colormap size */ 120 struct hwcmap dc_cmap; /* software copy of colormap */ 121 vaddr_t dc_videobase; /* base of flat frame buffer */ 122 struct rasops_info dc_ri; /* raster blitter variables */ 123 }; 124 125 struct omfb_softc { 126 device_t sc_dev; /* base device */ 127 struct om_hwdevconfig *sc_dc; /* device configuration */ 128 int sc_nscreens; 129 int sc_mode; 130 }; 131 132 static int omgetcmap(struct omfb_softc *, struct wsdisplay_cmap *); 133 static int omsetcmap(struct omfb_softc *, struct wsdisplay_cmap *); 134 135 static struct om_hwdevconfig omfb_console_dc; 136 static void omfb_resetcmap(struct om_hwdevconfig *); 137 static void omfb_getdevconfig(paddr_t, struct om_hwdevconfig *); 138 139 static struct wsscreen_descr omfb_stdscreen = { 140 .name = "std" 141 }; 142 143 static const struct wsscreen_descr *_omfb_scrlist[] = { 144 &omfb_stdscreen, 145 }; 146 147 static const struct wsscreen_list omfb_screenlist = { 148 sizeof(_omfb_scrlist) / sizeof(struct wsscreen_descr *), _omfb_scrlist 149 }; 150 151 static int omfbioctl(void *, void *, u_long, void *, int, struct lwp *); 152 static paddr_t omfbmmap(void *, void *, off_t, int); 153 static int omfb_alloc_screen(void *, const struct wsscreen_descr *, 154 void **, int *, int *, long *); 155 static void omfb_free_screen(void *, void *); 156 static int omfb_show_screen(void *, void *, int, 157 void (*) (void *, int, int), void *); 158 159 static const struct wsdisplay_accessops omfb_accessops = { 160 .ioctl = omfbioctl, 161 .mmap = omfbmmap, 162 .alloc_screen = omfb_alloc_screen, 163 .free_screen = omfb_free_screen, 164 .show_screen = omfb_show_screen, 165 .load_font = NULL, 166 .pollc = NULL, 167 .scroll = NULL 168 }; 169 170 static int omfbmatch(device_t, cfdata_t, void *); 171 static void omfbattach(device_t, device_t, void *); 172 173 CFATTACH_DECL_NEW(fb, sizeof(struct omfb_softc), 174 omfbmatch, omfbattach, NULL, NULL); 175 176 extern int hwplanemask; /* hardware planemask; retrieved at boot */ 177 178 int hwplanecount; /* for omrasops */ 179 180 static int omfb_console; 181 int omfb_cnattach(void); 182 183 static int 184 omfbmatch(device_t parent, cfdata_t cf, void *aux) 185 { 186 struct mainbus_attach_args *ma = aux; 187 188 if (strcmp(ma->ma_name, fb_cd.cd_name)) 189 return 0; 190 #if 0 /* XXX badaddr() bombs if no framebuffer is installed */ 191 if (badaddr((void *)ma->ma_addr, 4)) 192 return 0; 193 #else 194 if (hwplanemask == 0) 195 return 0; 196 #endif 197 return 1; 198 } 199 200 static void 201 omfbattach(device_t parent, device_t self, void *args) 202 { 203 struct omfb_softc *sc = device_private(self); 204 struct wsemuldisplaydev_attach_args waa; 205 206 sc->sc_dev = self; 207 208 if (omfb_console) { 209 sc->sc_dc = &omfb_console_dc; 210 sc->sc_nscreens = 1; 211 } else { 212 sc->sc_dc = kmem_zalloc(sizeof(struct om_hwdevconfig), 213 KM_SLEEP); 214 omfb_getdevconfig(OMFB_FB_WADDR, sc->sc_dc); 215 } 216 aprint_normal(": %d x %d, %dbpp\n", sc->sc_dc->dc_wid, sc->sc_dc->dc_ht, 217 sc->sc_dc->dc_depth); 218 219 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 220 waa.console = omfb_console; 221 waa.scrdata = &omfb_screenlist; 222 waa.accessops = &omfb_accessops; 223 waa.accesscookie = sc; 224 225 config_found(self, &waa, wsemuldisplaydevprint, CFARGS_NONE); 226 } 227 228 /* EXPORT */ int 229 omfb_cnattach(void) 230 { 231 struct om_hwdevconfig *dc = &omfb_console_dc; 232 struct rasops_info *ri = &dc->dc_ri; 233 long defattr; 234 235 omfb_getdevconfig(OMFB_FB_WADDR, dc); 236 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 237 wsdisplay_cnattach(&omfb_stdscreen, ri, 0, 0, defattr); 238 omfb_console = 1; 239 return 0; 240 } 241 242 static int 243 omfbioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 244 { 245 struct omfb_softc *sc = v; 246 struct om_hwdevconfig *dc = sc->sc_dc; 247 int new_mode; 248 249 switch (cmd) { 250 case WSDISPLAYIO_GTYPE: 251 *(u_int *)data = WSDISPLAY_TYPE_LUNA; 252 return 0; 253 254 case WSDISPLAYIO_GINFO: 255 #define wsd_fbip ((struct wsdisplay_fbinfo *)data) 256 wsd_fbip->height = dc->dc_ht; 257 wsd_fbip->width = dc->dc_wid; 258 wsd_fbip->depth = dc->dc_depth; 259 wsd_fbip->cmsize = dc->dc_cmsize; 260 #undef wsd_fbip 261 return 0; 262 263 case WSDISPLAYIO_LINEBYTES: 264 *(u_int *)data = dc->dc_rowbytes; 265 return 0; 266 267 case WSDISPLAYIO_GETCMAP: 268 return omgetcmap(sc, (struct wsdisplay_cmap *)data); 269 270 case WSDISPLAYIO_PUTCMAP: 271 return omsetcmap(sc, (struct wsdisplay_cmap *)data); 272 273 case WSDISPLAYIO_SMODE: 274 new_mode = *(int *)data; 275 if (new_mode != sc->sc_mode) { 276 sc->sc_mode = new_mode; 277 if (new_mode == WSDISPLAYIO_MODE_EMUL) 278 omfb_resetcmap(dc); 279 } 280 return 0; 281 282 case WSDISPLAYIO_SVIDEO: 283 case WSDISPLAYIO_GVIDEO: 284 case WSDISPLAYIO_GCURPOS: 285 case WSDISPLAYIO_SCURPOS: 286 case WSDISPLAYIO_GCURMAX: 287 case WSDISPLAYIO_GCURSOR: 288 case WSDISPLAYIO_SCURSOR: 289 break; 290 } 291 return EPASSTHROUGH; 292 } 293 294 /* 295 * Return the address that would map the given device at the given 296 * offset, allowing for the given protection, or return -1 for error. 297 */ 298 static paddr_t 299 omfbmmap(void *v, void *vs, off_t offset, int prot) 300 { 301 struct omfb_softc *sc = v; 302 struct om_hwdevconfig *dc = sc->sc_dc; 303 paddr_t cookie = -1; 304 305 switch (sc->sc_mode) { 306 #if 0 307 case WSDISPLAYIO_MODE_MAPPED: 308 if (offset >= 0 && offset < OMFB_SIZE) 309 cookie = m68k_btop(m68k_trunc_page(dc->dc_videobase) + 310 offset); 311 break; 312 #endif 313 case WSDISPLAYIO_MODE_DUMBFB: 314 if (offset >= 0 && 315 offset < m68k_page_offset(OMFB_FB_RADDR) + 316 dc->dc_rowbytes * dc->dc_ht * dc->dc_depth) 317 cookie = m68k_btop(m68k_trunc_page(OMFB_FB_RADDR) + 318 offset); 319 break; 320 } 321 322 return cookie; 323 } 324 325 static int 326 omgetcmap(struct omfb_softc *sc, struct wsdisplay_cmap *p) 327 { 328 u_int index = p->index, count = p->count; 329 u_int cmsize; 330 int error; 331 332 cmsize = sc->sc_dc->dc_cmsize; 333 if (index >= cmsize || count > cmsize - index) 334 return EINVAL; 335 336 error = copyout(&sc->sc_dc->dc_cmap.r[index], p->red, count); 337 if (error != 0) 338 return error; 339 error = copyout(&sc->sc_dc->dc_cmap.g[index], p->green, count); 340 if (error != 0) 341 return error; 342 error = copyout(&sc->sc_dc->dc_cmap.b[index], p->blue, count); 343 if (error != 0) 344 return error; 345 346 return 0; 347 } 348 349 static int 350 omsetcmap(struct omfb_softc *sc, struct wsdisplay_cmap *p) 351 { 352 struct hwcmap cmap; 353 u_int index = p->index, count = p->count; 354 u_int cmsize; 355 int i, error; 356 357 cmsize = sc->sc_dc->dc_cmsize; 358 359 if (index >= cmsize || count > cmsize - index) 360 return EINVAL; 361 362 error = copyin(p->red, &cmap.r[index], count); 363 if (error != 0) 364 return error; 365 error = copyin(p->green, &cmap.g[index], count); 366 if (error != 0) 367 return error; 368 error = copyin(p->blue, &cmap.b[index], count); 369 if (error != 0) 370 return error; 371 372 memcpy(&sc->sc_dc->dc_cmap.r[index], &cmap.r[index], count); 373 memcpy(&sc->sc_dc->dc_cmap.g[index], &cmap.g[index], count); 374 memcpy(&sc->sc_dc->dc_cmap.b[index], &cmap.b[index], count); 375 if (hwplanemask == 0x0f) { 376 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC; 377 odac->bt_addr = index; 378 for (i = index; i < index + count; i++) { 379 odac->bt_cmap = sc->sc_dc->dc_cmap.r[i]; 380 odac->bt_cmap = sc->sc_dc->dc_cmap.g[i]; 381 odac->bt_cmap = sc->sc_dc->dc_cmap.b[i]; 382 } 383 } else if (hwplanemask == 0xff) { 384 struct bt458 *ndac = (struct bt458 *)OMFB_RAMDAC; 385 ndac->bt_addr = index; 386 for (i = index; i < index + count; i++) { 387 ndac->bt_cmap = sc->sc_dc->dc_cmap.r[i]; 388 ndac->bt_cmap = sc->sc_dc->dc_cmap.g[i]; 389 ndac->bt_cmap = sc->sc_dc->dc_cmap.b[i]; 390 } 391 } 392 return 0; 393 } 394 395 static void 396 omfb_resetcmap(struct om_hwdevconfig *dc) 397 { 398 int i; 399 400 if (hwplanemask == 0x01) { 401 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC; 402 403 /* 404 * On 1bpp framebuffer, only plane P0 has framebuffer memory 405 * and other planes seems pulled up, i.e. always 1. 406 * Set white only for a palette (P0,P1,P2,P3) = (1,1,1,1). 407 */ 408 odac->bt_addr = 0; 409 for (i = 0; i < 15; i++) { 410 odac->bt_cmap = dc->dc_cmap.r[i] = 0; 411 odac->bt_cmap = dc->dc_cmap.g[i] = 0; 412 odac->bt_cmap = dc->dc_cmap.b[i] = 0; 413 } 414 /* 415 * The B/W video connector is connected to IOG of Bt454, 416 * and IOR and IOB are unused. 417 */ 418 odac->bt_cmap = dc->dc_cmap.r[15] = 0; 419 odac->bt_cmap = dc->dc_cmap.g[15] = 255; 420 odac->bt_cmap = dc->dc_cmap.b[15] = 0; 421 } else if (hwplanemask == 0x0f) { 422 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC; 423 424 odac->bt_addr = 0; 425 for (i = 0; i < 16; i++) { 426 odac->bt_cmap = dc->dc_cmap.r[i] = ansicmap[i].r; 427 odac->bt_cmap = dc->dc_cmap.g[i] = ansicmap[i].g; 428 odac->bt_cmap = dc->dc_cmap.b[i] = ansicmap[i].b; 429 } 430 } else if (hwplanemask == 0xff) { 431 struct bt458 *ndac = (struct bt458 *)OMFB_RAMDAC; 432 433 /* 434 * Initialize the Bt458. When we write to control registers, 435 * the address is not incremented automatically. So we specify 436 * it ourselves for each control register. 437 */ 438 ndac->bt_addr = 0x04; 439 ndac->bt_ctrl = 0xff; /* all planes will be read */ 440 ndac->bt_addr = 0x05; 441 ndac->bt_ctrl = 0x00; /* all planes have non-blink */ 442 ndac->bt_addr = 0x06; 443 ndac->bt_ctrl = 0x40; /* palette enabled, ovly plane disabled */ 444 ndac->bt_addr = 0x07; 445 ndac->bt_ctrl = 0x00; /* no test mode */ 446 447 /* 448 * Set ANSI 16 colors. We only supports 4bpp console right 449 * now, repeat 16 colors in 256 colormap. 450 */ 451 ndac->bt_addr = 0; 452 for (i = 0; i < 256; i++) { 453 ndac->bt_cmap = dc->dc_cmap.r[i] = ansicmap[i % 16].r; 454 ndac->bt_cmap = dc->dc_cmap.g[i] = ansicmap[i % 16].g; 455 ndac->bt_cmap = dc->dc_cmap.b[i] = ansicmap[i % 16].b; 456 } 457 } 458 } 459 460 static void 461 omfb_getdevconfig(paddr_t paddr, struct om_hwdevconfig *dc) 462 { 463 int i; 464 struct rasops_info *ri; 465 union { 466 struct { short h, v; } p; 467 uint32_t u; 468 } rfcnt; 469 470 switch (hwplanemask) { 471 case 0xff: 472 hwplanecount = 8; /* XXX check monochrome bit in DIPSW */ 473 break; 474 default: 475 case 0x0f: 476 hwplanecount = 4; /* XXX check monochrome bit in DIPSW */ 477 break; 478 case 1: 479 hwplanecount = 1; 480 break; 481 } 482 dc->dc_wid = 1280; 483 dc->dc_ht = 1024; 484 dc->dc_depth = hwplanecount; 485 dc->dc_rowbytes = 2048 / 8; 486 dc->dc_cmsize = (hwplanecount == 1) ? 0 : 1 << hwplanecount; 487 dc->dc_videobase = paddr; 488 489 omfb_resetcmap(dc); 490 491 /* adjust h/v origin on screen */ 492 rfcnt.p.h = 7; 493 rfcnt.p.v = -27; 494 /* single write of 0x007ffe6 */ 495 *(volatile uint32_t *)OMFB_RFCNT = rfcnt.u; 496 497 /* clear the screen */ 498 *(volatile uint32_t *)OMFB_PLANEMASK = 0xff; 499 ((volatile uint32_t *)OMFB_ROPFUNC)[5] = ~0; /* ROP copy */ 500 for (i = 0; i < dc->dc_ht * dc->dc_rowbytes / sizeof(uint32_t); i++) 501 *((volatile uint32_t *)dc->dc_videobase + i) = 0; 502 *(volatile uint32_t *)OMFB_PLANEMASK = 0x01; 503 504 /* initialize the raster */ 505 ri = &dc->dc_ri; 506 ri->ri_width = dc->dc_wid; 507 ri->ri_height = dc->dc_ht; 508 ri->ri_depth = dc->dc_depth; 509 ri->ri_stride = dc->dc_rowbytes; 510 ri->ri_bits = (void *)dc->dc_videobase; 511 ri->ri_flg = RI_CENTER; 512 if (dc == &omfb_console_dc) 513 ri->ri_flg |= RI_NO_AUTO; 514 ri->ri_hw = dc; 515 516 if (hwplanecount == 4 || hwplanecount == 8) 517 omrasops4_init(ri, 34, 80); 518 else 519 omrasops1_init(ri, 34, 80); 520 521 omfb_stdscreen.nrows = ri->ri_rows; 522 omfb_stdscreen.ncols = ri->ri_cols; 523 omfb_stdscreen.textops = &ri->ri_ops; 524 omfb_stdscreen.capabilities = ri->ri_caps; 525 omfb_stdscreen.fontwidth = ri->ri_font->fontwidth; 526 omfb_stdscreen.fontheight = ri->ri_font->fontheight; 527 } 528 529 static int 530 omfb_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep, 531 int *curxp, int *curyp, long *attrp) 532 { 533 struct omfb_softc *sc = v; 534 struct rasops_info *ri = &sc->sc_dc->dc_ri; 535 536 if (sc->sc_nscreens > 0) 537 return ENOMEM; 538 539 *cookiep = ri; 540 *curxp = 0; 541 *curyp = 0; 542 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, attrp); 543 sc->sc_nscreens++; 544 return 0; 545 } 546 547 static void 548 omfb_free_screen(void *v, void *cookie) 549 { 550 struct omfb_softc *sc = v; 551 552 if (sc->sc_dc == &omfb_console_dc) 553 panic("omfb_free_screen: console"); 554 555 sc->sc_nscreens--; 556 } 557 558 static int 559 omfb_show_screen(void *v, void *cookie, int waitok, 560 void (*cb)(void *, int, int), void *cbarg) 561 { 562 563 return 0; 564 } 565
Indexes created Mon Sep 29 03:10:08 GMT 2025