omrasopsvar.h revision 1.4 1 /* $NetBSD: omrasopsvar.h,v 1.4 2019/06/30 05:04:48 tsutsui Exp $ */
2 /*
3 * Copyright (c) 2013 Kenji Aoyama
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 /*
19 * Base addresses of LUNA's frame buffer
20 * XXX: We consider only 1bpp and 4bpp for now
21 */
22
23 #include <machine/board.h>
24
25 #define OMFB_PLANEMASK BMAP_BMSEL /* BMSEL register */
26 #define OMFB_FB_WADDR (BMAP_BMP + 8) /* common plane */
27 #define OMFB_FB_RADDR (BMAP_BMAP0 + 8)/* plane #0 */
28 #define OMFB_ROPFUNC BMAP_FN /* common ROP function */
29
30 /*
31 * Helper macros
32 */
33 #define W(addr) ((uint32_t *)(addr))
34 #define R(addr) ((uint32_t *)((uint8_t *)(addr) + 0x40000))
35 #define P0(addr) ((uint32_t *)((uint8_t *)(addr) + 0x40000))
36 #define P1(addr) ((uint32_t *)((uint8_t *)(addr) + 0x80000))
37 #define P2(addr) ((uint32_t *)((uint8_t *)(addr) + 0xC0000))
38 #define P3(addr) ((uint32_t *)((uint8_t *)(addr) + 0x100000))
39
40 /*
41 * ROP function
42 *
43 * LUNA's frame buffer uses Hitach HM53462 video RAM, which has raster
44 * (logic) operation, or ROP, function. To use ROP function on LUNA, write
45 * a 32bit `mask' value to the specified address corresponding to each ROP
46 * logic.
47 *
48 * D: the data writing to the video RAM
49 * M: the data already stored on the video RAM
50 */
51
52 /* operation index the video RAM contents will be */
53 #define ROP_ZERO 0 /* all 0 */
54 #define ROP_AND1 1 /* D & M */
55 #define ROP_AND2 2 /* ~D & M */
56 /* Not used on LUNA 3 */
57 #define ROP_AND3 4 /* D & ~M */
58 #define ROP_THROUGH 5 /* D */
59 #define ROP_EOR 6 /* (~D & M) | (D & ~M) */
60 #define ROP_OR1 7 /* D | M */
61 #define ROP_NOR 8 /* ~D | ~M */
62 #define ROP_ENOR 9 /* (D & M) | (~D & ~M) */
63 #define ROP_INV1 10 /* ~D */
64 #define ROP_OR2 11 /* ~D | M */
65 #define ROP_INV2 12 /* ~M */
66 #define ROP_OR3 13 /* D | ~M */
67 #define ROP_NAND 14 /* ~D | ~M */
68 #define ROP_ONE 15 /* all 1 */
69
70 int omrasops1_init(struct rasops_info *, int, int);
71 int omrasops4_init(struct rasops_info *, int, int);
72