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omrasopsvar.h revision 1.6 
      1 /* $NetBSD: omrasopsvar.h,v 1.6 2022/09/25 11:28:40 isaki Exp $ */
      2 /*
      3  * Copyright (c) 2013 Kenji Aoyama
      4  *
      5  * Permission to use, copy, modify, and distribute this software for any
      6  * purpose with or without fee is hereby granted, provided that the above
      7  * copyright notice and this permission notice appear in all copies.
      8  *
      9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     16  */
     17 
     18 #include <machine/board.h>
     19 
     20 /*
     21  * Base addresses of LUNA's frame buffer
     22  * XXX: We consider only 1bpp and 4bpp for now
     23  */
     24 
     25 #define OMFB_PLANEMASK		BMAP_BMSEL	/* BMSEL register */
     26 #define OMFB_ROP_COMMON		BMAP_FN		/* common ROP */
     27 #define OMFB_ROP_P0		BMAP_FN0
     28 
     29 /* will be merged in near future */
     30 #define OMFB_ROPFUNC		BMAP_FN		/* common ROP function */
     31 
     32 #define OMFB_MAX_PLANECOUNT	(8)
     33 #define OMFB_PLANEOFFS		(0x40000)	/* plane offset */
     34 #define OMFB_STRIDE		(2048/8)	/* stride [byte] */
     35 
     36 /* TODO: should be improved... */
     37 #define omfb_planecount hwplanecount
     38 extern int hwplanemask;
     39 extern int hwplanecount;
     40 
     41 /*
     42  * ROP function
     43  *
     44  * LUNA's frame buffer uses Hitachi HM53462 video RAM, which has raster
     45  * (logic) operation, or ROP, function.  To use ROP function on LUNA, write
     46  * a 32bit `mask' value to the specified address corresponding to each ROP
     47  * logic.
     48  *
     49  * D: the data writing to the video RAM
     50  * M: the data already stored on the video RAM
     51  */
     52 
     53 /* operation		index	the video RAM contents will be */
     54 #define ROP_ZERO	 0	/* all 0	*/
     55 #define ROP_AND1	 1	/* D & M	*/
     56 #define ROP_AND2	 2	/* ~D & M	*/
     57 /* Not used on LUNA	 3			*/
     58 #define ROP_AND3	 4	/* D & ~M	*/
     59 #define ROP_THROUGH	 5	/* D		*/
     60 #define ROP_EOR		 6	/* (~D & M) | (D & ~M)	*/
     61 #define ROP_OR1		 7	/* D | M	*/
     62 #define ROP_NOR		 8	/* ~D | ~M	*/
     63 #define ROP_ENOR	 9	/* (D & M) | (~D & ~M)	*/
     64 #define ROP_INV1	10	/* ~D		*/
     65 #define ROP_OR2		11	/* ~D | M	*/
     66 #define ROP_INV2	12	/* ~M		*/
     67 #define ROP_OR3		13	/* D | ~M	*/
     68 #define ROP_NAND	14	/* ~D | ~M	*/
     69 #define ROP_ONE		15	/* all 1	*/
     70 
     71 int omrasops1_init(struct rasops_info *, int, int);
     72 int omrasops4_init(struct rasops_info *, int, int);
     73