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      1  1.2  tsutsui /*	$NetBSD: board.h,v 1.2 2021/09/26 13:43:30 tsutsui Exp $	*/
      2  1.1  tsutsui /*	$OpenBSD: board.h,v 1.15 2017/11/03 06:55:08 aoyama Exp $	*/
      3  1.1  tsutsui /*
      4  1.1  tsutsui  * Mach Operating System
      5  1.1  tsutsui  * Copyright (c) 1993-1991 Carnegie Mellon University
      6  1.1  tsutsui  * Copyright (c) 1991 OMRON Corporation
      7  1.1  tsutsui  * All Rights Reserved.
      8  1.1  tsutsui  *
      9  1.1  tsutsui  * Permission to use, copy, modify and distribute this software and its
     10  1.1  tsutsui  * documentation is hereby granted, provided that both the copyright
     11  1.1  tsutsui  * notice and this permission notice appear in all copies of the
     12  1.1  tsutsui  * software, derivative works or modified versions, and any portions
     13  1.1  tsutsui  * thereof, and that both notices appear in supporting documentation.
     14  1.1  tsutsui  *
     15  1.1  tsutsui  * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  1.1  tsutsui  * CONDITION.  CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
     17  1.1  tsutsui  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  1.1  tsutsui  *
     19  1.1  tsutsui  * Carnegie Mellon requests users of this software to return to
     20  1.1  tsutsui  *
     21  1.1  tsutsui  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  1.1  tsutsui  *  School of Computer Science
     23  1.1  tsutsui  *  Carnegie Mellon University
     24  1.1  tsutsui  *  Pittsburgh PA 15213-3890
     25  1.1  tsutsui  *
     26  1.1  tsutsui  * any improvements or extensions that they make and grant Carnegie the
     27  1.1  tsutsui  * rights to redistribute these changes.
     28  1.1  tsutsui  */
     29  1.1  tsutsui 
     30  1.1  tsutsui #ifndef _MACHINE_BOARD_H_
     31  1.1  tsutsui #define _MACHINE_BOARD_H_
     32  1.1  tsutsui 
     33  1.1  tsutsui /*
     34  1.1  tsutsui  *      OMRON SX9100DT CPU board constants
     35  1.1  tsutsui  */
     36  1.1  tsutsui 
     37  1.1  tsutsui /*
     38  1.1  tsutsui  * Something to put append a 'U' to a long constant if it's C so that
     39  1.1  tsutsui  * it'll be unsigned in both ANSI and traditional.
     40  1.1  tsutsui  */
     41  1.1  tsutsui #if defined(_LOCORE)
     42  1.1  tsutsui #define U(num)  num
     43  1.1  tsutsui #elif defined(__STDC__)
     44  1.1  tsutsui #define U(num)  num ## U
     45  1.1  tsutsui #else
     46  1.1  tsutsui #define U(num)  num/**/U
     47  1.1  tsutsui #endif
     48  1.1  tsutsui 
     49  1.2  tsutsui #define PROM_ADDR	U(0x41000000)	/* PROM */
     50  1.2  tsutsui #define PROM_SPACE	U(0x00040000)
     51  1.2  tsutsui #define NVRAM_ADDR	U(0x45000000)	/* Non Volatile */
     52  1.2  tsutsui #define NVRAM_SPACE	U(0x00001FDC)
     53  1.2  tsutsui #define FUSE_ROM_ADDR	U(0x43000000)	/* FUSE_ROM */
     54  1.2  tsutsui #define FUSE_ROM_SPACE	        1024
     55  1.2  tsutsui #define OBIO_CLOCK_BASE	U(0x45000000)	/* Mostek or Dallas TimeKeeper */
     56  1.2  tsutsui #define OBIO_PIO0_BASE	U(0x49000000)	/* PIO-0 */
     57  1.2  tsutsui #define OBIO_PIO0_SPACE	U(0x00000004)
     58  1.2  tsutsui #define OBIO_PIO0A	U(0x49000000)	/* PIO-0 port A */
     59  1.2  tsutsui #define OBIO_PIO0B	U(0x49000001)	/* PIO-0 port B */
     60  1.2  tsutsui #define OBIO_PIO0C	U(0x49000002)	/* PIO-0 port C*/
     61  1.2  tsutsui #define OBIO_PIO0	U(0x49000003)	/* PIO-0 control */
     62  1.2  tsutsui #define OBIO_PIO1_BASE	U(0x4D000000)	/* PIO-1 */
     63  1.2  tsutsui #define OBIO_PIO1_SPACE U(0x00000004)
     64  1.2  tsutsui #define OBIO_PIO1A	U(0x4D000000)	/* PIO-1 port A */
     65  1.2  tsutsui #define OBIO_PIO1B	U(0x4D000001)	/* PIO-1 port B */
     66  1.2  tsutsui #define OBIO_PIO1C	U(0x4D000002)	/* PIO-1 port C*/
     67  1.2  tsutsui #define OBIO_PIO1	U(0x4D000003)	/* PIO-1 control */
     68  1.2  tsutsui #define OBIO_SIO	U(0x51000000)	/* SIO */
     69  1.2  tsutsui #define OBIO_TAS	U(0x61000000)	/* TAS register */
     70  1.2  tsutsui #define OBIO_CLOCK	U(0x63000000)	/* system clock */
     71  1.1  tsutsui 
     72  1.2  tsutsui #define TRI_PORT_RAM	U(0x71000000)	/* 3 port RAM */
     73  1.1  tsutsui #define TRI_PORT_RAM_SPACE	0x20000
     74  1.2  tsutsui #define EXT_A_ADDR	U(0x81000000)	/* extension board A */
     75  1.2  tsutsui #define EXT_A_SPACE	U(0x02000000)
     76  1.2  tsutsui #define EXT_B_ADDR	U(0x83000000)	/* extension board B */
     77  1.2  tsutsui #define EXT_B_SPACE	U(0x01000000)
     78  1.2  tsutsui #define PC_BASE		U(0x90000000)	/* pc-98 extension board */
     79  1.2  tsutsui #define PC_SPACE	U(0x02000000)
     80  1.1  tsutsui 
     81  1.2  tsutsui #define MROM_ADDR	U(0xA1000000)	/* Mask ROM address */
     82  1.1  tsutsui #define MROM_SPACE		0x400000
     83  1.2  tsutsui #define BMAP_START	U(0xB1000000)	/* Bitmap start address */
     84  1.2  tsutsui #define BMAP_SPACE	(BMAP_END - BMAP_START)
     85  1.2  tsutsui #define BMAP_RFCNT	U(0xB1000000)	/* RFCNT register */
     86  1.2  tsutsui #define BMAP_BMSEL	U(0xB1040000)	/* BMSEL register */
     87  1.2  tsutsui #define BMAP_BMP	U(0xB1080000)	/* common bitmap plane */
     88  1.2  tsutsui #define BMAP_BMAP0	U(0xB10C0000)	/* bitmap plane 0 */
     89  1.2  tsutsui #define BMAP_BMAP1	U(0xB1100000)	/* bitmap plane 1 */
     90  1.2  tsutsui #define BMAP_BMAP2	U(0xB1140000)	/* bitmap plane 2 */
     91  1.2  tsutsui #define BMAP_BMAP3	U(0xB1180000)	/* bitmap plane 3 */
     92  1.2  tsutsui #define BMAP_BMAP4	U(0xB11C0000)	/* bitmap plane 4 */
     93  1.2  tsutsui #define BMAP_BMAP5	U(0xB1200000)	/* bitmap plane 5 */
     94  1.2  tsutsui #define BMAP_BMAP6	U(0xB1240000)	/* bitmap plane 6 */
     95  1.2  tsutsui #define BMAP_BMAP7	U(0xB1280000)	/* bitmap plane 7 */
     96  1.2  tsutsui #define BMAP_FN		U(0xB12C0000)	/* common bitmap function */
     97  1.2  tsutsui #define BMAP_FN0	U(0xB1300000)	/* bitmap function 0 */
     98  1.2  tsutsui #define BMAP_FN1	U(0xB1340000)	/* bitmap function 1 */
     99  1.2  tsutsui #define BMAP_FN2	U(0xB1380000)	/* bitmap function 2 */
    100  1.2  tsutsui #define BMAP_FN3	U(0xB13C0000)	/* bitmap function 3 */
    101  1.2  tsutsui #define BMAP_FN4	U(0xB1400000)	/* bitmap function 4 */
    102  1.2  tsutsui #define BMAP_FN5	U(0xB1440000)	/* bitmap function 5 */
    103  1.2  tsutsui #define BMAP_FN6	U(0xB1480000)	/* bitmap function 6 */
    104  1.2  tsutsui #define BMAP_FN7	U(0xB14C0000)	/* bitmap function 7 */
    105  1.2  tsutsui #define BMAP_END	U(0xB1500000)
    106  1.1  tsutsui #define BMAP_END24P	U(0xB1800000)	/* end of 24p framemem */
    107  1.2  tsutsui #define BMAP_PALLET0	U(0xC0000000)	/* color pallet */
    108  1.2  tsutsui #define BMAP_PALLET1	U(0xC1000000)	/* color pallet */
    109  1.2  tsutsui #define BMAP_PALLET2	U(0xC1100000)	/* color pallet */
    110  1.2  tsutsui #define BOARD_CHECK_REG	U(0xD0000000)	/* board check register */
    111  1.2  tsutsui #define BMAP_CRTC	U(0xD1000000)	/* CRTC-II */
    112  1.1  tsutsui #define BMAP_IDENTROM	U(0xD1800000)	/* bitmap-board identify ROM */
    113  1.2  tsutsui #define SCSI_ADDR	U(0xE1000000)	/* SCSI address */
    114  1.2  tsutsui #define SCSI_2_ADDR	U(0xE1000040)	/* 2nd SCSI address */
    115  1.2  tsutsui #define LANCE_ADDR	U(0xF1000000)	/* LANCE */
    116  1.1  tsutsui 
    117  1.1  tsutsui #endif /* _MACHINE_BOARD_H_ */
    118