bus.h revision 1.14
1 /* $NetBSD: bus.h,v 1.14 2019/09/23 16:17:56 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (C) 1997 Scott Reynolds. All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 #ifndef _MACHINE_BUS_H_ 60 #define _MACHINE_BUS_H_ 61 62 /* 63 * Value for the luna68k bus space tag, not to be used directly by MI code. 64 */ 65 #define MACHINE_BUS_SPACE_MEM 0 /* space is mem space */ 66 67 /* 68 * Bus address and size types 69 */ 70 typedef u_long bus_addr_t; 71 typedef u_long bus_size_t; 72 73 #define PRIxBUSADDR "lx" 74 #define PRIxBUSSIZE "lx" 75 #define PRIuBUSSIZE "lu" 76 77 /* 78 * Access methods for bus resources and address space. 79 */ 80 typedef int bus_space_tag_t; 81 typedef u_long bus_space_handle_t; 82 83 #define PRIxBSH "lx" 84 85 /* 86 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 87 * bus_size_t size, int flags, bus_space_handle_t *bshp); 88 * 89 * Map a region of bus space. 90 */ 91 92 #define BUS_SPACE_MAP_CACHEABLE 0x01 93 #define BUS_SPACE_MAP_LINEAR 0x02 94 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 95 96 int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, 97 int, bus_space_handle_t *); 98 99 /* 100 * void bus_space_unmap(bus_space_tag_t t, 101 * bus_space_handle_t bsh, bus_size_t size); 102 * 103 * Unmap a region of bus space. 104 */ 105 106 void bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t); 107 108 /* 109 * int bus_space_subregion(bus_space_tag_t t, 110 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 111 * bus_space_handle_t *nbshp); 112 * 113 * Get a new handle for a subregion of an already-mapped area of bus space. 114 */ 115 116 int bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh, 117 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp); 118 119 /* 120 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart, 121 * bus_addr_t rend, bus_size_t size, bus_size_t align, 122 * bus_size_t boundary, int flags, bus_addr_t *addrp, 123 * bus_space_handle_t *bshp); 124 * 125 * Allocate a region of bus space. 126 */ 127 128 int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart, 129 bus_addr_t rend, bus_size_t size, bus_size_t align, 130 bus_size_t boundary, int cacheable, bus_addr_t *addrp, 131 bus_space_handle_t *bshp); 132 133 /* 134 * int bus_space_free(bus_space_tag_t t, 135 * bus_space_handle_t bsh, bus_size_t size); 136 * 137 * Free a region of bus space. 138 */ 139 140 void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh, 141 bus_size_t size); 142 143 /* 144 * u_intN_t bus_space_read_N(bus_space_tag_t tag, 145 * bus_space_handle_t bsh, bus_size_t offset); 146 * 147 * Read a 1, 2, 4, or 8 byte quantity from bus space 148 * described by tag/handle/offset. 149 */ 150 151 #define bus_space_read_1(t, h, o) \ 152 ((void) t, (*(volatile u_int8_t *)((h) + (o)*4))) 153 154 #define bus_space_read_2(t, h, o) \ 155 ((void) t, (*(volatile u_int16_t *)((h) + (o)*2))) 156 157 #define bus_space_read_4(t, h, o) \ 158 ((void) t, (*(volatile u_int32_t *)((h) + (o)))) 159 160 #if 0 /* Cause a link error for bus_space_read_8 */ 161 #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 162 #endif 163 164 /* 165 * void bus_space_read_multi_N(bus_space_tag_t tag, 166 * bus_space_handle_t bsh, bus_size_t offset, 167 * u_intN_t *addr, size_t count); 168 * 169 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 170 * described by tag/handle/offset and copy into buffer provided. 171 */ 172 173 #define bus_space_read_multi_1(t, h, o, a, c) do { \ 174 (void) t; \ 175 __asm volatile (" \ 176 movl %0,%%a0 ; \ 177 movl %1,%%a1 ; \ 178 movl %2,%%d0 ; \ 179 1: movb %%a0@,%%a1@+ ; \ 180 subql #1,%%d0 ; \ 181 jne 1b" : \ 182 : \ 183 "r" ((h) + (o)*4), "g" (a), "g" ((size_t)(c)) : \ 184 "a0","a1","d0"); \ 185 } while (0) 186 187 #define bus_space_read_multi_2(t, h, o, a, c) do { \ 188 (void) t; \ 189 __asm volatile (" \ 190 movl %0,%%a0 ; \ 191 movl %1,%%a1 ; \ 192 movl %2,%%d0 ; \ 193 1: movw %%a0@,%%a1@+ ; \ 194 subql #1,%%d0 ; \ 195 jne 1b" : \ 196 : \ 197 "r" ((h) + (o)*2), "g" (a), "g" ((size_t)(c)) : \ 198 "a0","a1","d0"); \ 199 } while (0) 200 201 #define bus_space_read_multi_4(t, h, o, a, c) do { \ 202 (void) t; \ 203 __asm volatile (" \ 204 movl %0,%%a0 ; \ 205 movl %1,%%a1 ; \ 206 movl %2,%%d0 ; \ 207 1: movl %%a0@,%%a1@+ ; \ 208 subql #1,%%d0 ; \ 209 jne 1b" : \ 210 : \ 211 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 212 "a0","a1","d0"); \ 213 } while (0) 214 215 #if 0 /* Cause a link error for bus_space_read_multi_8 */ 216 #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 217 #endif 218 219 /* 220 * void bus_space_read_region_N(bus_space_tag_t tag, 221 * bus_space_handle_t bsh, bus_size_t offset, 222 * u_intN_t *addr, size_t count); 223 * 224 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 225 * described by tag/handle and starting at `offset' and copy into 226 * buffer provided. 227 */ 228 229 #define bus_space_read_region_1(t, h, o, a, c) do { \ 230 (void) t; \ 231 __asm volatile (" \ 232 movl %0,%%a0 ; \ 233 movl %1,%%a1 ; \ 234 movl %2,%%d0 ; \ 235 1: movb %%a0@,%%a1@+ ; \ 236 addql #4,%%a0 ; \ 237 subql #1,%%d0 ; \ 238 jne 1b" : \ 239 : \ 240 "r" ((h) + (o)*4), "g" (a), "g" ((size_t)(c)) : \ 241 "a0","a1","d0"); \ 242 } while (0) 243 244 #define bus_space_read_region_2(t, h, o, a, c) do { \ 245 (void) t; \ 246 __asm volatile (" \ 247 movl %0,%%a0 ; \ 248 movl %1,%%a1 ; \ 249 movl %2,%%d0 ; \ 250 1: movw %%a0@,%%a1@+ ; \ 251 addql #4,%%a0 ; \ 252 subql #1,%%d0 ; \ 253 jne 1b" : \ 254 : \ 255 "r" ((h) + (o)*2), "g" (a), "g" ((size_t)(c)) : \ 256 "a0","a1","d0"); \ 257 } while (0) 258 259 #define bus_space_read_region_4(t, h, o, a, c) do { \ 260 (void) t; \ 261 __asm volatile (" \ 262 movl %0,%%a0 ; \ 263 movl %1,%%a1 ; \ 264 movl %2,%%d0 ; \ 265 1: movl %%a0@+,%%a1@+ ; \ 266 subql #1,%%d0 ; \ 267 jne 1b" : \ 268 : \ 269 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 270 "a0","a1","d0"); \ 271 } while (0) 272 273 #if 0 /* Cause a link error for bus_space_read_region_8 */ 274 #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!! 275 #endif 276 277 /* 278 * void bus_space_write_N(bus_space_tag_t tag, 279 * bus_space_handle_t bsh, bus_size_t offset, 280 * u_intN_t value); 281 * 282 * Write the 1, 2, 4, or 8 byte value `value' to bus space 283 * described by tag/handle/offset. 284 */ 285 286 #define bus_space_write_1(t, h, o, v) \ 287 ((void) t, ((void)(*(volatile u_int8_t *)((h) + (o)*4) = (v)))) 288 289 #define bus_space_write_2(t, h, o, v) \ 290 ((void) t, ((void)(*(volatile u_int16_t *)((h) + (o)*2) = (v)))) 291 292 #define bus_space_write_4(t, h, o, v) \ 293 ((void) t, ((void)(*(volatile u_int32_t *)((h) + (o)) = (v)))) 294 295 #if 0 /* Cause a link error for bus_space_write_8 */ 296 #define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 297 #endif 298 299 /* 300 * void bus_space_write_multi_N(bus_space_tag_t tag, 301 * bus_space_handle_t bsh, bus_size_t offset, 302 * const u_intN_t *addr, size_t count); 303 * 304 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 305 * provided to bus space described by tag/handle/offset. 306 */ 307 308 #define bus_space_write_multi_1(t, h, o, a, c) do { \ 309 (void) t; \ 310 __asm volatile (" \ 311 movl %0,%%a0 ; \ 312 movl %1,%%a1 ; \ 313 movl %2,%%d0 ; \ 314 1: movb %%a1@+,%%a0@ ; \ 315 subql #1,%%d0 ; \ 316 jne 1b" : \ 317 : \ 318 "r" ((h) + (o)*4), "g" (a), "g" ((size_t)(c)) : \ 319 "a0","a1","d0"); \ 320 } while (0) 321 322 #define bus_space_write_multi_2(t, h, o, a, c) do { \ 323 (void) t; \ 324 __asm volatile (" \ 325 movl %0,%%a0 ; \ 326 movl %1,%%a1 ; \ 327 movl %2,%%d0 ; \ 328 1: movw %%a1@+,%%a0@ ; \ 329 subql #1,%%d0 ; \ 330 jne 1b" : \ 331 : \ 332 "r" ((h) + (o)*2), "g" (a), "g" ((size_t)(c)) : \ 333 "a0","a1","d0"); \ 334 } while (0) 335 336 #define bus_space_write_multi_4(t, h, o, a, c) do { \ 337 (void) t; \ 338 __asm volatile (" \ 339 movl %0,%%a0 ; \ 340 movl %1,%%a1 ; \ 341 movl %2,%%d0 ; \ 342 1: movl %%a1@+,%%a0@ ; \ 343 subql #1,%%d0 ; \ 344 jne 1b" : \ 345 : \ 346 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 347 "a0","a1","d0"); \ 348 } while (0) 349 350 #if 0 /* Cause a link error for bus_space_write_8 */ 351 #define bus_space_write_multi_8(t, h, o, a, c) \ 352 !!! bus_space_write_multi_8 unimplimented !!! 353 #endif 354 355 /* 356 * void bus_space_write_region_N(bus_space_tag_t tag, 357 * bus_space_handle_t bsh, bus_size_t offset, 358 * const u_intN_t *addr, size_t count); 359 * 360 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 361 * to bus space described by tag/handle starting at `offset'. 362 */ 363 364 #define bus_space_write_region_1(t, h, o, a, c) do { \ 365 (void) t; \ 366 __asm volatile (" \ 367 movl %0,%%a0 ; \ 368 movl %1,%%a1 ; \ 369 movl %2,%%d0 ; \ 370 1: movb %%a1@+,%%a0@ ; \ 371 addql #4,%%a0 ; \ 372 subql #1,%%d0 ; \ 373 jne 1b" : \ 374 : \ 375 "r" ((h) + (o)*4), "g" (a), "g" ((size_t)(c)) : \ 376 "a0","a1","d0"); \ 377 } while (0) 378 379 #define bus_space_write_region_2(t, h, o, a, c) do { \ 380 (void) t; \ 381 __asm volatile (" \ 382 movl %0,%%a0 ; \ 383 movl %1,%%a1 ; \ 384 movl %2,%%d0 ; \ 385 1: movw %%a1@+,%%a0@ ; \ 386 addql #4,%%a0 ; \ 387 subql #1,%%d0 ; \ 388 jne 1b" : \ 389 : \ 390 "r" ((h) + (o)*2), "g" (a), "g" ((size_t)(c)) : \ 391 "a0","a1","d0"); \ 392 } while (0) 393 394 #define bus_space_write_region_4(t, h, o, a, c) do { \ 395 (void) t; \ 396 __asm volatile (" \ 397 movl %0,%%a0 ; \ 398 movl %1,%%a1 ; \ 399 movl %2,%%d0 ; \ 400 1: movl %%a1@+,%%a0@+ ; \ 401 subql #1,%%d0 ; \ 402 jne 1b" : \ 403 : \ 404 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 405 "a0","a1","d0"); \ 406 } while (0) 407 408 #if 0 /* Cause a link error for bus_space_write_region_8 */ 409 #define bus_space_write_region_8 \ 410 !!! bus_space_write_region_8 unimplemented !!! 411 #endif 412 413 /* 414 * void bus_space_set_multi_N(bus_space_tag_t tag, 415 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 416 * size_t count); 417 * 418 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 419 * by tag/handle/offset `count' times. 420 */ 421 422 #define bus_space_set_multi_1(t, h, o, val, c) do { \ 423 (void) t; \ 424 __asm volatile (" \ 425 movl %0,%%a0 ; \ 426 movl %1,%%d1 ; \ 427 movl %2,%%d0 ; \ 428 1: movb %%d1,%%a0@ ; \ 429 subql #1,%%d0 ; \ 430 jne 1b" : \ 431 : \ 432 "r" ((h)+(o)*4), "g" ((u_long)val), \ 433 "g" ((size_t)(c)) : \ 434 "a0","d0","d1"); \ 435 } while (0) 436 437 #define bus_space_set_multi_2(t, h, o, val, c) do { \ 438 (void) t; \ 439 __asm volatile (" \ 440 movl %0,%%a0 ; \ 441 movl %1,%%d1 ; \ 442 movl %2,%%d0 ; \ 443 1: movw %%d1,%%a0@ ; \ 444 subql #1,%%d0 ; \ 445 jne 1b" : \ 446 : \ 447 "r" ((h)+(o)*2), "g" ((u_long)val), \ 448 "g" ((size_t)(c)) : \ 449 "a0","d0","d1"); \ 450 } while (0) 451 452 #define bus_space_set_multi_4(t, h, o, val, c) do { \ 453 (void) t; \ 454 __asm volatile (" \ 455 movl %0,%%a0 ; \ 456 movl %1,%%d1 ; \ 457 movl %2,%%d0 ; \ 458 1: movl %%d1,%%a0@ ; \ 459 subql #1,%%d0 ; \ 460 jne 1b" : \ 461 : \ 462 "r" ((h)+(o)), "g" ((u_long)val), \ 463 "g" ((size_t)(c)) : \ 464 "a0","d0","d1"); \ 465 } while (0) 466 467 #if 0 /* Cause a link error for bus_space_set_multi_8 */ 468 #define bus_space_set_multi_8 \ 469 !!! bus_space_set_multi_8 unimplemented !!! 470 #endif 471 472 /* 473 * void bus_space_set_region_N(bus_space_tag_t tag, 474 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 475 * size_t count); 476 * 477 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 478 * by tag/handle starting at `offset'. 479 */ 480 481 #define bus_space_set_region_1(t, h, o, val, c) do { \ 482 (void) t; \ 483 __asm volatile (" \ 484 movl %0,%%a0 ; \ 485 movl %1,%%d1 ; \ 486 movl %2,%%d0 ; \ 487 1: movb %%d1,%%a0@ ; \ 488 addql #4,%%a0 ; \ 489 subql #1,%%d0 ; \ 490 jne 1b" : \ 491 : \ 492 "r" ((h)+(o)*4), "g" ((u_long)val), \ 493 "g" ((size_t)(c)) : \ 494 "a0","d0","d1"); \ 495 } while (0) 496 497 #define bus_space_set_region_2(t, h, o, val, c) do { \ 498 (void) t; \ 499 __asm volatile (" \ 500 movl %0,%%a0 ; \ 501 movl %1,%%d1 ; \ 502 movl %2,%%d0 ; \ 503 1: movw %%d1,%%a0@ ; \ 504 addql #4,%%a0 ; \ 505 subql #1,%%d0 ; \ 506 jne 1b" : \ 507 : \ 508 "r" ((h)+(o)*2), "g" ((u_long)val), \ 509 "g" ((size_t)(c)) : \ 510 "a0","d0","d1"); \ 511 } while (0) 512 513 #define bus_space_set_region_4(t, h, o, val, c) do { \ 514 (void) t; \ 515 __asm volatile (" \ 516 movl %0,%%a0 ; \ 517 movl %1,%%d1 ; \ 518 movl %2,%%d0 ; \ 519 1: movl %%d1,%%a0@+ ; \ 520 subql #1,%%d0 ; \ 521 jne 1b" : \ 522 : \ 523 "r" ((h)+(o)), "g" ((u_long)val), \ 524 "g" ((size_t)(c)) : \ 525 "a0","d0","d1"); \ 526 } while (0) 527 528 #if 0 /* Cause a link error for bus_space_set_region_8 */ 529 #define bus_space_set_region_8 \ 530 !!! bus_space_set_region_8 unimplemented !!! 531 #endif 532 533 /* 534 * void bus_space_copy_N(bus_space_tag_t tag, 535 * bus_space_handle_t bsh1, bus_size_t off1, 536 * bus_space_handle_t bsh2, bus_size_t off2, 537 * size_t count); 538 * 539 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 540 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 541 */ 542 543 #define __MACHINE_copy_region_N(BYTES) \ 544 static __inline void __CONCAT(bus_space_copy_region_,BYTES) \ 545 (bus_space_tag_t, \ 546 bus_space_handle_t bsh1, bus_size_t off1, \ 547 bus_space_handle_t bsh2, bus_size_t off2, \ 548 bus_size_t count); \ 549 \ 550 static __inline void \ 551 __CONCAT(bus_space_copy_region_,BYTES)( \ 552 bus_space_tag_t t, \ 553 bus_space_handle_t h1, \ 554 bus_size_t o1, \ 555 bus_space_handle_t h2, \ 556 bus_size_t o2, \ 557 bus_size_t c) \ 558 { \ 559 bus_size_t o; \ 560 \ 561 if ((h1 + o1) >= (h2 + o2)) { \ 562 /* src after dest: copy forward */ \ 563 for (o = 0; c != 0; c--, o += BYTES) \ 564 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 565 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 566 } else { \ 567 /* dest after src: copy backwards */ \ 568 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 569 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 570 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 571 } \ 572 } 573 __MACHINE_copy_region_N(1) 574 __MACHINE_copy_region_N(2) 575 __MACHINE_copy_region_N(4) 576 #if 0 /* Cause a link error for bus_space_copy_8 */ 577 #define bus_space_copy_8 \ 578 !!! bus_space_copy_8 unimplemented !!! 579 #endif 580 581 #undef __MACHINE_copy_region_N 582 583 /* 584 * Bus read/write barrier methods. 585 * 586 * void bus_space_barrier(bus_space_tag_t tag, 587 * bus_space_handle_t bsh, bus_size_t offset, 588 * bus_size_t len, int flags); 589 * 590 * Note: the 680x0 does not currently require barriers, but we must 591 * provide the flags to MI code. 592 */ 593 #define bus_space_barrier(t, h, o, l, f) \ 594 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) 595 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 596 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 597 598 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 599 600 /* 601 * There is no bus_dma(9)'fied bus drivers on this port. 602 */ 603 #define __HAVE_NO_BUS_DMA 604 605 #endif /* _MACHINE_BUS_H_ */ 606
Indexes created Tue Sep 30 10:09:55 GMT 2025