bus.h revision 1.2
1 /* $NetBSD: bus.h,v 1.2 2000/01/07 05:13:08 nisimura Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (C) 1997 Scott Reynolds. All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. The name of the author may not be used to endorse or promote products 52 * derived from this software without specific prior written permission 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 57 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 58 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 59 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 63 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 #ifndef _MACHINE_BUS_H_ 67 #define _MACHINE_BUS_H_ 68 69 /* 70 * Value for the luna68k bus space tag, not to be used directly by MI code. 71 */ 72 #define MACHINE_BUS_SPACE_MEM 0 /* space is mem space */ 73 74 /* 75 * Bus address and size types 76 */ 77 typedef u_long bus_addr_t; 78 typedef u_long bus_size_t; 79 80 /* 81 * Access methods for bus resources and address space. 82 */ 83 typedef int bus_space_tag_t; 84 typedef u_long bus_space_handle_t; 85 86 /* 87 * int bus_space_map __P((bus_space_tag_t t, bus_addr_t addr, 88 * bus_size_t size, int flags, bus_space_handle_t *bshp)); 89 * 90 * Map a region of bus space. 91 */ 92 93 #define BUS_SPACE_MAP_CACHEABLE 0x01 94 #define BUS_SPACE_MAP_LINEAR 0x02 95 96 int bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, 97 int, bus_space_handle_t *)); 98 99 /* 100 * void bus_space_unmap __P((bus_space_tag_t t, 101 * bus_space_handle_t bsh, bus_size_t size)); 102 * 103 * Unmap a region of bus space. 104 */ 105 106 void bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t)); 107 108 /* 109 * int bus_space_subregion __P((bus_space_tag_t t, 110 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 111 * bus_space_handle_t *nbshp)); 112 * 113 * Get a new handle for a subregion of an already-mapped area of bus space. 114 */ 115 116 int bus_space_subregion __P((bus_space_tag_t t, bus_space_handle_t bsh, 117 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)); 118 119 /* 120 * int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t, rstart, 121 * bus_addr_t rend, bus_size_t size, bus_size_t align, 122 * bus_size_t boundary, int flags, bus_addr_t *addrp, 123 * bus_space_handle_t *bshp)); 124 * 125 * Allocate a region of bus space. 126 */ 127 128 int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t rstart, 129 bus_addr_t rend, bus_size_t size, bus_size_t align, 130 bus_size_t boundary, int cacheable, bus_addr_t *addrp, 131 bus_space_handle_t *bshp)); 132 133 /* 134 * int bus_space_free __P((bus_space_tag_t t, 135 * bus_space_handle_t bsh, bus_size_t size)); 136 * 137 * Free a region of bus space. 138 */ 139 140 void bus_space_free __P((bus_space_tag_t t, bus_space_handle_t bsh, 141 bus_size_t size)); 142 143 /* 144 * u_intN_t bus_space_read_N __P((bus_space_tag_t tag, 145 * bus_space_handle_t bsh, bus_size_t offset)); 146 * 147 * Read a 1, 2, 4, or 8 byte quantity from bus space 148 * described by tag/handle/offset. 149 */ 150 151 #define bus_space_read_1(t, h, o) \ 152 ((void) t, (*(volatile u_int8_t *)((h) + 4*(o)))) 153 154 #define bus_space_read_2(t, h, o) \ 155 ((void) t, (*(volatile u_int16_t *)((h) + 4*(o)))) 156 157 #define bus_space_read_4(t, h, o) \ 158 ((void) t, (*(volatile u_int32_t *)((h) + 4*(o)))) 159 160 #if 0 /* Cause a link error for bus_space_read_8 */ 161 #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 162 #endif 163 164 /* 165 * void bus_space_read_multi_N __P((bus_space_tag_t tag, 166 * bus_space_handle_t bsh, bus_size_t offset, 167 * u_intN_t *addr, size_t count)); 168 * 169 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 170 * described by tag/handle/offset and copy into buffer provided. 171 */ 172 173 #define bus_space_read_multi_1(t, h, o, a, c) do { \ 174 (void) t; \ 175 __asm __volatile (" \ 176 movl %0,a0 ; \ 177 movl %1,a1 ; \ 178 movl %2,d0 ; \ 179 1: movb a0@,a1@+ ; \ 180 subql #1,d0 ; \ 181 jne 1b" : \ 182 : \ 183 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 184 "a0","a1","d0"); \ 185 } while (0) 186 187 #define bus_space_read_multi_2(t, h, o, a, c) do { \ 188 (void) t; \ 189 __asm __volatile (" \ 190 movl %0,a0 ; \ 191 movl %1,a1 ; \ 192 movl %2,d0 ; \ 193 1: movw a0@,a1@+ ; \ 194 subql #1,d0 ; \ 195 jne 1b" : \ 196 : \ 197 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 198 "a0","a1","d0"); \ 199 } while (0) 200 201 #define bus_space_read_multi_4(t, h, o, a, c) do { \ 202 (void) t; \ 203 __asm __volatile (" \ 204 movl %0,a0 ; \ 205 movl %1,a1 ; \ 206 movl %2,d0 ; \ 207 1: movl a0@,a1@+ ; \ 208 subql #1,d0 ; \ 209 jne 1b" : \ 210 : \ 211 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 212 "a0","a1","d0"); \ 213 } while (0) 214 215 #if 0 /* Cause a link error for bus_space_read_multi_8 */ 216 #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 217 #endif 218 219 /* 220 * void bus_space_read_region_N __P((bus_space_tag_t tag, 221 * bus_space_handle_t bsh, bus_size_t offset, 222 * u_intN_t *addr, size_t count)); 223 * 224 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 225 * described by tag/handle and starting at `offset' and copy into 226 * buffer provided. 227 */ 228 229 #define bus_space_read_region_1(t, h, o, a, c) do { \ 230 (void) t; \ 231 __asm __volatile (" \ 232 movl %0,a0 ; \ 233 movl %1,a1 ; \ 234 movl %2,d0 ; \ 235 1: movb a0@+,a1@+ ; \ 236 subql #1,d0 ; \ 237 jne 1b" : \ 238 : \ 239 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 240 "a0","a1","d0"); \ 241 } while (0) 242 243 #define bus_space_read_region_2(t, h, o, a, c) do { \ 244 (void) t; \ 245 __asm __volatile (" \ 246 movl %0,a0 ; \ 247 movl %1,a1 ; \ 248 movl %2,d0 ; \ 249 1: movw a0@+,a1@+ ; \ 250 subql #1,d0 ; \ 251 jne 1b" : \ 252 : \ 253 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 254 "a0","a1","d0"); \ 255 } while (0) 256 257 #define bus_space_read_region_4(t, h, o, a, c) do { \ 258 (void) t; \ 259 __asm __volatile (" \ 260 movl %0,a0 ; \ 261 movl %1,a1 ; \ 262 movl %2,d0 ; \ 263 1: movl a0@+,a1@+ ; \ 264 subql #1,d0 ; \ 265 jne 1b" : \ 266 : \ 267 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 268 "a0","a1","d0"); \ 269 } while (0) 270 271 #if 0 /* Cause a link error for bus_space_read_region_8 */ 272 #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!! 273 #endif 274 275 /* 276 * void bus_space_write_N __P((bus_space_tag_t tag, 277 * bus_space_handle_t bsh, bus_size_t offset, 278 * u_intN_t value)); 279 * 280 * Write the 1, 2, 4, or 8 byte value `value' to bus space 281 * described by tag/handle/offset. 282 */ 283 284 #define bus_space_write_1(t, h, o, v) \ 285 ((void) t, ((void)(*(volatile u_int8_t *)((h) + 4*(o)) = (v)))) 286 287 #define bus_space_write_2(t, h, o, v) \ 288 ((void) t, ((void)(*(volatile u_int16_t *)((h) + 4*(o)) = (v)))) 289 290 #define bus_space_write_4(t, h, o, v) \ 291 ((void) t, ((void)(*(volatile u_int32_t *)((h) + 4*(o)) = (v)))) 292 293 #if 0 /* Cause a link error for bus_space_write_8 */ 294 #define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 295 #endif 296 297 /* 298 * void bus_space_write_multi_N __P((bus_space_tag_t tag, 299 * bus_space_handle_t bsh, bus_size_t offset, 300 * const u_intN_t *addr, size_t count)); 301 * 302 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 303 * provided to bus space described by tag/handle/offset. 304 */ 305 306 #define bus_space_write_multi_1(t, h, o, a, c) do { \ 307 (void) t; \ 308 __asm __volatile (" \ 309 movl %0,a0 ; \ 310 movl %1,a1 ; \ 311 movl %2,d0 ; \ 312 1: movb a1@+,a0@ ; \ 313 subql #1,d0 ; \ 314 jne 1b" : \ 315 : \ 316 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 317 "a0","a1","d0"); \ 318 } while (0) 319 320 #define bus_space_write_multi_2(t, h, o, a, c) do { \ 321 (void) t; \ 322 __asm __volatile (" \ 323 movl %0,a0 ; \ 324 movl %1,a1 ; \ 325 movl %2,d0 ; \ 326 1: movw a1@+,a0@ ; \ 327 subql #1,d0 ; \ 328 jne 1b" : \ 329 : \ 330 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 331 "a0","a1","d0"); \ 332 } while (0) 333 334 #define bus_space_write_multi_4(t, h, o, a, c) do { \ 335 (void) t; \ 336 __asm __volatile (" \ 337 movl %0,a0 ; \ 338 movl %1,a1 ; \ 339 movl %2,d0 ; \ 340 1: movl a1@+,a0@ ; \ 341 subql #1,d0 ; \ 342 jne 1b" : \ 343 : \ 344 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 345 "a0","a1","d0"); \ 346 } while (0) 347 348 #if 0 /* Cause a link error for bus_space_write_8 */ 349 #define bus_space_write_multi_8(t, h, o, a, c) \ 350 !!! bus_space_write_multi_8 unimplimented !!! 351 #endif 352 353 /* 354 * void bus_space_write_region_N __P((bus_space_tag_t tag, 355 * bus_space_handle_t bsh, bus_size_t offset, 356 * const u_intN_t *addr, size_t count)); 357 * 358 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 359 * to bus space described by tag/handle starting at `offset'. 360 */ 361 362 #define bus_space_write_region_1(t, h, o, a, c) do { \ 363 (void) t; \ 364 __asm __volatile (" \ 365 movl %0,a0 ; \ 366 movl %1,a1 ; \ 367 movl %2,d0 ; \ 368 1: movb a1@+,a0@+ ; \ 369 subql #1,d0 ; \ 370 jne 1b" : \ 371 : \ 372 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 373 "a0","a1","d0"); \ 374 } while (0) 375 376 #define bus_space_write_region_2(t, h, o, a, c) do { \ 377 (void) t; \ 378 __asm __volatile (" \ 379 movl %0,a0 ; \ 380 movl %1,a1 ; \ 381 movl %2,d0 ; \ 382 1: movw a1@+,a0@+ ; \ 383 subql #1,d0 ; \ 384 jne 1b" : \ 385 : \ 386 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 387 "a0","a1","d0"); \ 388 } while (0) 389 390 #define bus_space_write_region_4(t, h, o, a, c) do { \ 391 (void) t; \ 392 __asm __volatile (" \ 393 movl %0,a0 ; \ 394 movl %1,a1 ; \ 395 movl %2,d0 ; \ 396 1: movl a1@+,a0@+ ; \ 397 subql #1,d0 ; \ 398 jne 1b" : \ 399 : \ 400 "r" ((h) + (o)), "g" (a), "g" ((size_t)(c)) : \ 401 "a0","a1","d0"); \ 402 } while (0) 403 404 #if 0 /* Cause a link error for bus_space_write_region_8 */ 405 #define bus_space_write_region_8 \ 406 !!! bus_space_write_region_8 unimplemented !!! 407 #endif 408 409 /* 410 * void bus_space_set_multi_N __P((bus_space_tag_t tag, 411 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 412 * size_t count)); 413 * 414 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 415 * by tag/handle/offset `count' times. 416 */ 417 418 #define bus_space_set_multi_1(t, h, o, val, c) do { \ 419 (void) t; \ 420 __asm __volatile (" \ 421 movl %0,a0 ; \ 422 movl %1,d1 ; \ 423 movl %2,d0 ; \ 424 1: movb d1,a0@ ; \ 425 subql #1,d0 ; \ 426 jne 1b" : \ 427 : \ 428 "r" ((h)+(o)), "g" ((u_long)val), \ 429 "g" ((size_t)(c)) : \ 430 "a0","d0","d1"); \ 431 } while (0) 432 433 #define bus_space_set_multi_2(t, h, o, val, c) do { \ 434 (void) t; \ 435 __asm __volatile (" \ 436 movl %0,a0 ; \ 437 movl %1,d1 ; \ 438 movl %2,d0 ; \ 439 1: movw d1,a0@ ; \ 440 subql #1,d0 ; \ 441 jne 1b" : \ 442 : \ 443 "r" ((h)+(o)), "g" ((u_long)val), \ 444 "g" ((size_t)(c)) : \ 445 "a0","d0","d1"); \ 446 } while (0) 447 448 #define bus_space_set_multi_4(t, h, o, val, c) do { \ 449 (void) t; \ 450 __asm __volatile (" \ 451 movl %0,a0 ; \ 452 movl %1,d1 ; \ 453 movl %2,d0 ; \ 454 1: movl d1,a0@ ; \ 455 subql #1,d0 ; \ 456 jne 1b" : \ 457 : \ 458 "r" ((h)+(o)), "g" ((u_long)val), \ 459 "g" ((size_t)(c)) : \ 460 "a0","d0","d1"); \ 461 } while (0) 462 463 #if 0 /* Cause a link error for bus_space_set_multi_8 */ 464 #define bus_space_set_multi_8 \ 465 !!! bus_space_set_multi_8 unimplemented !!! 466 #endif 467 468 /* 469 * void bus_space_set_region_N __P((bus_space_tag_t tag, 470 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 471 * size_t count)); 472 * 473 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 474 * by tag/handle starting at `offset'. 475 */ 476 477 #define bus_space_set_region_1(t, h, o, val, c) do { \ 478 (void) t; \ 479 __asm __volatile (" \ 480 movl %0,a0 ; \ 481 movl %1,d1 ; \ 482 movl %2,d0 ; \ 483 1: movb d1,a0@+ ; \ 484 subql #1,d0 ; \ 485 jne 1b" : \ 486 : \ 487 "r" ((h)+(o)), "g" ((u_long)val), \ 488 "g" ((size_t)(c)) : \ 489 "a0","d0","d1"); \ 490 } while (0) 491 492 #define bus_space_set_region_2(t, h, o, val, c) do { \ 493 (void) t; \ 494 __asm __volatile (" \ 495 movl %0,a0 ; \ 496 movl %1,d1 ; \ 497 movl %2,d0 ; \ 498 1: movw d1,a0@+ ; \ 499 subql #1,d0 ; \ 500 jne 1b" : \ 501 : \ 502 "r" ((h)+(o)), "g" ((u_long)val), \ 503 "g" ((size_t)(c)) : \ 504 "a0","d0","d1"); \ 505 } while (0) 506 507 #define bus_space_set_region_4(t, h, o, val, c) do { \ 508 (void) t; \ 509 __asm __volatile (" \ 510 movl %0,a0 ; \ 511 movl %1,d1 ; \ 512 movl %2,d0 ; \ 513 1: movl d1,a0@+ ; \ 514 subql #1,d0 ; \ 515 jne 1b" : \ 516 : \ 517 "r" ((h)+(o)), "g" ((u_long)val), \ 518 "g" ((size_t)(c)) : \ 519 "a0","d0","d1"); \ 520 } while (0) 521 522 #if 0 /* Cause a link error for bus_space_set_region_8 */ 523 #define bus_space_set_region_8 \ 524 !!! bus_space_set_region_8 unimplemented !!! 525 #endif 526 527 /* 528 * void bus_space_copy_N __P((bus_space_tag_t tag, 529 * bus_space_handle_t bsh1, bus_size_t off1, 530 * bus_space_handle_t bsh2, bus_size_t off2, 531 * size_t count)); 532 * 533 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 534 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 535 */ 536 537 #define __MACHINE_copy_region_N(BYTES) \ 538 static __inline void __CONCAT(bus_space_copy_region_,BYTES) \ 539 __P((bus_space_tag_t, \ 540 bus_space_handle_t bsh1, bus_size_t off1, \ 541 bus_space_handle_t bsh2, bus_size_t off2, \ 542 bus_size_t count)); \ 543 \ 544 static __inline void \ 545 __CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c) \ 546 bus_space_tag_t t; \ 547 bus_space_handle_t h1, h2; \ 548 bus_size_t o1, o2, c; \ 549 { \ 550 bus_size_t o; \ 551 \ 552 if ((h1 + o1) >= (h2 + o2)) { \ 553 /* src after dest: copy forward */ \ 554 for (o = 0; c != 0; c--, o += BYTES) \ 555 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 556 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 557 } else { \ 558 /* dest after src: copy backwards */ \ 559 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 560 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 561 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 562 } \ 563 } 564 __MACHINE_copy_region_N(1) 565 __MACHINE_copy_region_N(2) 566 __MACHINE_copy_region_N(4) 567 #if 0 /* Cause a link error for bus_space_copy_8 */ 568 #define bus_space_copy_8 \ 569 !!! bus_space_copy_8 unimplemented !!! 570 #endif 571 572 #undef __MACHINE_copy_region_N 573 574 /* 575 * Bus read/write barrier methods. 576 * 577 * void bus_space_barrier __P((bus_space_tag_t tag, 578 * bus_space_handle_t bsh, bus_size_t offset, 579 * bus_size_t len, int flags)); 580 * 581 * Note: the 680x0 does not currently require barriers, but we must 582 * provide the flags to MI code. 583 */ 584 #define bus_space_barrier(t, h, o, l, f) \ 585 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) 586 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 587 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 588 589 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 590 591 #endif /* _MACHINE_BUS_H_ */ 592
Indexes created Tue Sep 30 11:09:46 GMT 2025