init_main.c revision 1.2 1 /* $NetBSD: init_main.c,v 1.2 2013/01/12 07:11:59 tsutsui Exp $ */
2
3 /*
4 * Copyright (c) 1992 OMRON Corporation.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * OMRON Corporation.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * @(#)init_main.c 8.2 (Berkeley) 8/15/93
38 */
39 /*
40 * Copyright (c) 1992, 1993
41 * The Regents of the University of California. All rights reserved.
42 *
43 * This code is derived from software contributed to Berkeley by
44 * OMRON Corporation.
45 *
46 * Redistribution and use in source and binary forms, with or without
47 * modification, are permitted provided that the following conditions
48 * are met:
49 * 1. Redistributions of source code must retain the above copyright
50 * notice, this list of conditions and the following disclaimer.
51 * 2. Redistributions in binary form must reproduce the above copyright
52 * notice, this list of conditions and the following disclaimer in the
53 * documentation and/or other materials provided with the distribution.
54 * 3. Neither the name of the University nor the names of its contributors
55 * may be used to endorse or promote products derived from this software
56 * without specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
59 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
60 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
61 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
62 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
63 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
64 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
66 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
67 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68 * SUCH DAMAGE.
69 *
70 * @(#)init_main.c 8.2 (Berkeley) 8/15/93
71 */
72
73 #include <sys/param.h>
74 #include <sys/systm.h>
75 #include <machine/cpu.h>
76 #include <luna68k/stand/boot/samachdep.h>
77 #include <luna68k/stand/boot/stinger.h>
78 #include <luna68k/stand/boot/romvec.h>
79 #include <luna68k/stand/boot/status.h>
80 #include <lib/libsa/loadfile.h>
81
82 static int get_plane_numbers(void);
83 static int reorder_dipsw(int);
84
85 int cpuspeed; /* for DELAY() macro */
86 int machtype;
87
88 #define VERS_LOCAL "Phase-31"
89
90 int nplane;
91
92 /* KIFF */
93
94 struct KernInter KIFF;
95 struct KernInter *kiff = &KIFF;
96
97 /* for command parser */
98
99 #define BUFFSIZE 100
100 #define MAXARGS 30
101
102 char buffer[BUFFSIZE];
103
104 int argc;
105 char *argv[MAXARGS];
106
107 char prompt[16] = "boot> ";
108
109 void
110 main(void)
111 {
112 int i, status = 0;
113 const char *machstr;
114
115 /*
116 * Initialize the console before we print anything out.
117 */
118 if (cputype == CPU_68030) {
119 machtype = LUNA_I;
120 machstr = "LUNA-I";
121 cpuspeed = MHZ_25;
122 } else {
123 machtype = LUNA_II;
124 machstr = "LUNA-II";
125 cpuspeed = MHZ_25 * 2; /* XXX */
126 }
127
128 nplane = get_plane_numbers();
129
130 cninit();
131
132 printf("\n");
133 printf(">> %s, Revision %s\n", bootprog_name, bootprog_rev);
134 printf(">> (based on Stinger ver 0.0 [%s])\n", VERS_LOCAL);
135 printf("\n");
136
137 kiff->maxaddr = (void *) (ROM_memsize -1);
138 kiff->dipsw = ~((dipsw2 << 8) | dipsw1) & 0xFFFF;
139 kiff->plane = nplane;
140
141 i = (int) kiff->maxaddr + 1;
142 printf("Machine model = %s\n", machstr);
143 printf("Physical Memory = 0x%x ", i);
144 i >>= 20;
145 printf("(%d MB)\n", i);
146 printf("\n");
147
148 /*
149 * IO configuration
150 */
151
152 find_devs();
153 configure();
154 printf("\n");
155
156 howto = reorder_dipsw(dipsw2);
157
158 if ((howto & 0xFE) == 0) {
159 printf("auto-boot %s\n", default_file);
160 bootnetbsd(default_file);
161 }
162
163 /*
164 * Main Loop
165 */
166
167 do {
168 memset(buffer, 0, BUFFSIZE);
169 if (getline(prompt, buffer) > 0) {
170 argc = getargs(buffer, argv, sizeof(argv)/sizeof(char *));
171
172 status = parse(argc, argv);
173 if (status == ST_NOTFOUND)
174 printf("Command \"%s\" is not found !!\n", argv[0]);
175 }
176 } while(status != ST_EXIT);
177
178 exit(0);
179 }
180
181 int
182 get_plane_numbers(void)
183 {
184 int r = ROM_plane;
185 int n = 0;
186
187 for (; r ; r >>= 1)
188 if (r & 0x1)
189 n++;
190
191 return(n);
192 }
193
194 int
195 reorder_dipsw(int dipsw)
196 {
197 int i, sw = 0;
198
199 for (i = 0; i < 8; i++) {
200 if ((dipsw & 0x01) == 0)
201 sw += 1;
202
203 if (i == 7)
204 break;
205
206 sw <<= 1;
207 dipsw >>= 1;
208 }
209
210 return(sw);
211 }
212