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      1  1.5  scw /*
      2  1.1   is #
      3  1.5  scw # $NetBSD: fnetbsd.S,v 1.5 2000/11/30 21:00:51 scw Exp $
      4  1.1   is #
      5  1.1   is #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      6  1.1   is # MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
      7  1.1   is # M68000 Hi-Performance Microprocessor Division
      8  1.1   is # M68060 Software Package Production Release
      9  1.1   is #
     10  1.1   is # M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc.
     11  1.1   is # All rights reserved.
     12  1.1   is #
     13  1.1   is # THE SOFTWARE is provided on an "AS IS" basis and without warranty.
     14  1.1   is # To the maximum extent permitted by applicable law,
     15  1.1   is # MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
     16  1.1   is # INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
     17  1.1   is # FOR A PARTICULAR PURPOSE and any warranty against infringement with
     18  1.1   is # regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
     19  1.1   is # and any accompanying written materials.
     20  1.1   is #
     21  1.1   is # To the maximum extent permitted by applicable law,
     22  1.1   is # IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
     23  1.1   is # (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
     24  1.1   is # BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
     25  1.1   is # ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
     26  1.1   is #
     27  1.1   is # Motorola assumes no responsibility for the maintenance and support
     28  1.1   is # of the SOFTWARE.
     29  1.1   is #
     30  1.1   is # You are hereby granted a copyright license to use, modify, and distribute the
     31  1.1   is # SOFTWARE so long as this entire notice is retained without alteration
     32  1.1   is # in any modified and/or redistributed versions, and that such modified
     33  1.1   is # versions are clearly identified as such.
     34  1.1   is # No licenses are granted by implication, estoppel or otherwise under any
     35  1.1   is # patents or trademarks of Motorola, Inc.
     36  1.1   is #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     37  1.1   is #
     38  1.1   is # Derived from:
     39  1.1   is # fskeleton.s
     40  1.1   is #
     41  1.1   is # This file contains:
     42  1.1   is #	(1) example "Call-out"s
     43  1.1   is #	(2) example package entry code
     44  1.1   is #	(3) example "Call-out" table
     45  1.1   is #
     46  1.1   is 
     47  1.1   is 
     48  1.1   is #################################
     49  1.1   is # (1) EXAMPLE CALL-OUTS		#
     50  1.1   is #				#
     51  1.1   is # _060_fpsp_done()		#
     52  1.1   is # _060_real_ovfl()		#
     53  1.1   is # _060_real_unfl()		#
     54  1.1   is # _060_real_operr()		#
     55  1.1   is # _060_real_snan()		#
     56  1.1   is # _060_real_dz()		#
     57  1.1   is # _060_real_inex()		#
     58  1.1   is # _060_real_bsun()		#
     59  1.1   is # _060_real_fline()		#
     60  1.1   is # _060_real_fpu_disabled()	#
     61  1.1   is # _060_real_trap()		#
     62  1.1   is #################################
     63  1.5  scw */
     64  1.1   is 
     65  1.5  scw /*
     66  1.1   is #
     67  1.1   is # _060_fpsp_done():
     68  1.1   is #
     69  1.1   is # This is the main exit point for the 68060 Floating-Point
     70  1.1   is # Software Package. For a normal exit, all 060FPSP routines call this
     71  1.1   is # routine. The operating system can do system dependent clean-up or
     72  1.1   is # simply execute an "rte" as with the sample code below.
     73  1.1   is #
     74  1.5  scw */
     75  1.5  scw ASENTRY_NOPROFILE(_060_fpsp_done)
     76  1.1   is 	rte
     77  1.1   is 
     78  1.5  scw /*
     79  1.1   is #
     80  1.1   is # _060_real_ovfl():
     81  1.1   is #
     82  1.1   is # This is the exit point for the 060FPSP when an enabled overflow exception
     83  1.1   is # is present. The routine below should point to the operating system handler
     84  1.1   is # for enabled overflow conditions. The exception stack frame is an overflow
     85  1.1   is # stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
     86  1.1   is #
     87  1.1   is # The sample routine below simply clears the exception status bit and
     88  1.1   is # does an "rte".
     89  1.1   is #
     90  1.5  scw */
     91  1.5  scw ASENTRY_NOPROFILE(_060_real_ovfl)
     92  1.5  scw 	fsave	%sp@-
     93  1.5  scw 	movew	#0x6000,%sp@(0x2)
     94  1.5  scw 	frestore	%sp@+
     95  1.5  scw 	jmp	_C_LABEL(fpfault)
     96  1.1   is 
     97  1.5  scw /*
     98  1.1   is #
     99  1.1   is # _060_real_unfl():
    100  1.1   is #
    101  1.1   is # This is the exit point for the 060FPSP when an enabled underflow exception
    102  1.1   is # is present. The routine below should point to the operating system handler
    103  1.1   is # for enabled underflow conditions. The exception stack frame is an underflow
    104  1.1   is # stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
    105  1.1   is #
    106  1.1   is # The sample routine below simply clears the exception status bit and
    107  1.1   is # does an "rte".
    108  1.1   is #
    109  1.5  scw */
    110  1.5  scw ASENTRY_NOPROFILE(_060_real_unfl)
    111  1.5  scw 	fsave	%sp@-
    112  1.5  scw 	movew	#0x6000,%sp@(0x2)
    113  1.5  scw 	frestore	%sp@+
    114  1.5  scw 	jmp	_C_LABEL(fpfault)
    115  1.1   is 
    116  1.5  scw /*
    117  1.1   is #
    118  1.1   is # _060_real_operr():
    119  1.1   is #
    120  1.1   is # This is the exit point for the 060FPSP when an enabled operand error exception
    121  1.1   is # is present. The routine below should point to the operating system handler
    122  1.1   is # for enabled operand error exceptions. The exception stack frame is an operand error
    123  1.1   is # stack frame. The FP state frame holds the source operand of the faulting
    124  1.1   is # instruction.
    125  1.1   is #
    126  1.1   is # The sample routine below simply clears the exception status bit and
    127  1.1   is # does an "rte".
    128  1.1   is #
    129  1.5  scw */
    130  1.5  scw ASENTRY_NOPROFILE(_060_real_operr)
    131  1.5  scw 	fsave	%sp@-
    132  1.5  scw 	movew	#0x6000,%sp@(0x2)
    133  1.5  scw 	frestore	%sp@+
    134  1.5  scw 	jmp	_C_LABEL(fpfault)
    135  1.1   is 
    136  1.5  scw /*
    137  1.1   is #
    138  1.1   is # _060_real_snan():
    139  1.1   is #
    140  1.1   is # This is the exit point for the 060FPSP when an enabled signalling NaN exception
    141  1.1   is # is present. The routine below should point to the operating system handler
    142  1.1   is # for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN
    143  1.1   is # stack frame. The FP state frame holds the source operand of the faulting
    144  1.1   is # instruction.
    145  1.1   is #
    146  1.1   is # The sample routine below simply clears the exception status bit and
    147  1.1   is # does an "rte".
    148  1.1   is #
    149  1.5  scw */
    150  1.5  scw ASENTRY_NOPROFILE(_060_real_snan)
    151  1.5  scw 	fsave	%sp@-
    152  1.5  scw 	movew	#0x6000,%sp@(0x2)
    153  1.5  scw 	frestore	%sp@+
    154  1.5  scw 	jmp	_C_LABEL(fpfault)
    155  1.1   is 
    156  1.5  scw /*
    157  1.1   is #
    158  1.1   is # _060_real_dz():
    159  1.1   is #
    160  1.1   is # This is the exit point for the 060FPSP when an enabled divide-by-zero exception
    161  1.1   is # is present. The routine below should point to the operating system handler
    162  1.1   is # for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero
    163  1.1   is # stack frame. The FP state frame holds the source operand of the faulting
    164  1.1   is # instruction.
    165  1.1   is #
    166  1.1   is # The sample routine below simply clears the exception status bit and
    167  1.1   is # does an "rte".
    168  1.1   is #
    169  1.5  scw */
    170  1.5  scw ASENTRY_NOPROFILE(_060_real_dz)
    171  1.5  scw 	fsave	%sp@-
    172  1.5  scw 	movew	#0x6000,%sp@(0x2)
    173  1.5  scw 	frestore	%sp@+
    174  1.5  scw 	jmp	_C_LABEL(fpfault)
    175  1.1   is 
    176  1.5  scw /*
    177  1.1   is #
    178  1.1   is # _060_real_inex():
    179  1.1   is #
    180  1.1   is # This is the exit point for the 060FPSP when an enabled inexact exception
    181  1.1   is # is present. The routine below should point to the operating system handler
    182  1.1   is # for enabled inexact exceptions. The exception stack frame is an inexact
    183  1.1   is # stack frame. The FP state frame holds the source operand of the faulting
    184  1.1   is # instruction.
    185  1.1   is #
    186  1.1   is # The sample routine below simply clears the exception status bit and
    187  1.1   is # does an "rte".
    188  1.1   is #
    189  1.5  scw */
    190  1.5  scw ASENTRY_NOPROFILE(_060_real_inex)
    191  1.5  scw 	fsave	%sp@-
    192  1.5  scw 	movew	#0x6000,%sp@(0x2)
    193  1.5  scw 	frestore	%sp@+
    194  1.5  scw 	jmp	_C_LABEL(fpfault)
    195  1.1   is 
    196  1.5  scw /*
    197  1.1   is #
    198  1.1   is # _060_real_bsun():
    199  1.1   is #
    200  1.1   is # This is the exit point for the 060FPSP when an enabled bsun exception
    201  1.1   is # is present. The routine below should point to the operating system handler
    202  1.1   is # for enabled bsun exceptions. The exception stack frame is a bsun
    203  1.1   is # stack frame.
    204  1.1   is #
    205  1.1   is # The sample routine below clears the exception status bit, clears the NaN
    206  1.1   is # bit in the FPSR, and does an "rte". The instruction that caused the
    207  1.1   is # bsun will now be re-executed but with the NaN FPSR bit cleared.
    208  1.1   is #
    209  1.5  scw */
    210  1.5  scw ASENTRY_NOPROFILE(_060_real_bsun)
    211  1.5  scw 	fsave	%sp@-
    212  1.5  scw 
    213  1.5  scw 	fmovel	%fpsr,%sp@-
    214  1.5  scw 	andib	#0xfe,%sp@
    215  1.5  scw 	fmovel	%sp@+,%fpsr
    216  1.1   is 
    217  1.5  scw 	addl	#0xc,%sp
    218  1.5  scw 	jmp	_C_LABEL(fpfault)
    219  1.1   is 
    220  1.5  scw /*
    221  1.1   is #
    222  1.1   is # _060_real_fline():
    223  1.1   is #
    224  1.1   is # This is the exit point for the 060FPSP when an F-Line Illegal exception is
    225  1.1   is # encountered. Three different types of exceptions can enter the F-Line exception
    226  1.1   is # vector number 11: FP Unimplemented Instructions, FP implemented instructions when
    227  1.1   is # the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
    228  1.1   is # _fpsp_fline() distinguishes between the three and acts appropriately. F-Line
    229  1.1   is # Illegals branch here.
    230  1.1   is #
    231  1.5  scw */
    232  1.5  scw ASENTRY_NOPROFILE(_060_real_fline)
    233  1.5  scw 	jmp	_C_LABEL(fpfault)
    234  1.1   is 
    235  1.5  scw /*
    236  1.1   is #
    237  1.1   is # _060_real_fpu_disabled():
    238  1.1   is #
    239  1.1   is # This is the exit point for the 060FPSP when an FPU disabled exception is
    240  1.1   is # encountered. Three different types of exceptions can enter the F-Line exception
    241  1.1   is # vector number 11: FP Unimplemented Instructions, FP implemented instructions when
    242  1.1   is # the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
    243  1.1   is # _fpsp_fline() distinguishes between the three and acts appropriately. FPU disabled
    244  1.1   is # exceptions branch here.
    245  1.1   is #
    246  1.1   is # The sample code below enables the FPU, sets the PC field in the exception stack
    247  1.1   is # frame to the PC of the instruction causing the exception, and does an "rte".
    248  1.1   is # The execution of the instruction then proceeds with an enabled floating-point
    249  1.1   is # unit.
    250  1.1   is #
    251  1.5  scw */
    252  1.5  scw ASENTRY_NOPROFILE(_060_real_fpu_disabled)
    253  1.5  scw 	movel	%d0,%sp@-		|# enabled the fpu
    254  1.1   is 
    255  1.1   is 	.short	0x4e7a,0x0808		|* movec.l pcr,d0
    256  1.5  scw 	bclr	#0x1,%d0
    257  1.1   is 	.short	0x4e7b,0x0808		|* movec.l d0,pcr
    258  1.5  scw 	movel	%sp@+,%d0
    259  1.1   is 
    260  1.5  scw 	movel	%sp@(0xc),%sp@(0x2)	|# set "Current PC"
    261  1.1   is 	rte
    262  1.1   is 
    263  1.5  scw /*
    264  1.1   is #
    265  1.1   is # _060_real_trap():
    266  1.1   is #
    267  1.1   is # This is the exit point for the 060FPSP when an emulated "ftrapcc" instruction
    268  1.1   is # discovers that the trap condition is true and it should branch to the operating
    269  1.1   is # system handler for the trap exception vector number 7.
    270  1.1   is #
    271  1.1   is # The sample code below simply executes an "rte".
    272  1.1   is #
    273  1.5  scw */
    274  1.5  scw ASENTRY_NOPROFILE(_060_real_trap)
    275  1.1   is 	rte
    276  1.1   is 
    277  1.5  scw /*
    278  1.1   is #############################################################################
    279  1.1   is 
    280  1.1   is ##################################
    281  1.1   is # (2) EXAMPLE PACKAGE ENTRY CODE #
    282  1.1   is ##################################
    283  1.5  scw */
    284  1.5  scw ASENTRY_NOPROFILE(_060_fpsp_snan)
    285  1.5  scw 	bral	_C_LABEL(FP_CALL_TOP)+0x80+0x00
    286  1.1   is 
    287  1.5  scw ASENTRY_NOPROFILE(_060_fpsp_operr)
    288  1.5  scw 	bral	_C_LABEL(FP_CALL_TOP)+0x80+0x08
    289  1.1   is 
    290  1.5  scw ASENTRY_NOPROFILE(_060_fpsp_ovfl)
    291  1.5  scw 	bral	_C_LABEL(FP_CALL_TOP)+0x80+0x10
    292  1.5  scw 
    293  1.5  scw ASENTRY_NOPROFILE(_060_fpsp_unfl)
    294  1.5  scw 	bral	_C_LABEL(FP_CALL_TOP)+0x80+0x18
    295  1.5  scw 
    296  1.5  scw ASENTRY_NOPROFILE(_060_fpsp_dz)
    297  1.5  scw 	bral	_C_LABEL(FP_CALL_TOP)+0x80+0x20
    298  1.5  scw 
    299  1.5  scw ASENTRY_NOPROFILE(_060_fpsp_inex)
    300  1.5  scw 	bral	_C_LABEL(FP_CALL_TOP)+0x80+0x28
    301  1.5  scw 
    302  1.5  scw ASENTRY_NOPROFILE(_060_fpsp_fline)
    303  1.5  scw 	bral	_C_LABEL(FP_CALL_TOP)+0x80+0x30
    304  1.5  scw 
    305  1.5  scw ASENTRY_NOPROFILE(_060_fpsp_unsupp)
    306  1.5  scw 	bral	_C_LABEL(FP_CALL_TOP)+0x80+0x38
    307  1.5  scw 
    308  1.5  scw ASENTRY_NOPROFILE(_060_fpsp_effadd)
    309  1.5  scw 	bral	_C_LABEL(FP_CALL_TOP)+0x80+0x40
    310  1.5  scw 
    311  1.5  scw /*
    312  1.1   is #############################################################################
    313  1.1   is 
    314  1.1   is ################################
    315  1.1   is # (3) EXAMPLE CALL-OUT SECTION #
    316  1.1   is ################################
    317  1.1   is 
    318  1.1   is # The size of this section MUST be 128 bytes!!!
    319  1.5  scw */
    320  1.5  scw GLOBAL(FP_CALL_TOP)
    321  1.5  scw 	.long	_ASM_LABEL(_060_real_bsun)-_C_LABEL(FP_CALL_TOP)
    322  1.5  scw 	.long	_ASM_LABEL(_060_real_snan)-_C_LABEL(FP_CALL_TOP)
    323  1.5  scw 	.long	_ASM_LABEL(_060_real_operr)-_C_LABEL(FP_CALL_TOP)
    324  1.5  scw 	.long	_ASM_LABEL(_060_real_ovfl)-_C_LABEL(FP_CALL_TOP)
    325  1.5  scw 	.long	_ASM_LABEL(_060_real_unfl)-_C_LABEL(FP_CALL_TOP)
    326  1.5  scw 	.long	_ASM_LABEL(_060_real_dz)-_C_LABEL(FP_CALL_TOP)
    327  1.5  scw 	.long	_ASM_LABEL(_060_real_inex)-_C_LABEL(FP_CALL_TOP)
    328  1.5  scw 	.long	_ASM_LABEL(_060_real_fline)-_C_LABEL(FP_CALL_TOP)
    329  1.5  scw 	.long	_ASM_LABEL(_060_real_fpu_disabled)-_C_LABEL(FP_CALL_TOP)
    330  1.5  scw 	.long	_ASM_LABEL(_060_real_trap)-_C_LABEL(FP_CALL_TOP)
    331  1.5  scw 	.long	_ASM_LABEL(_060_real_trace)-_C_LABEL(FP_CALL_TOP)
    332  1.5  scw 	.long	_ASM_LABEL(_060_real_access)-_C_LABEL(FP_CALL_TOP)
    333  1.5  scw 	.long	_ASM_LABEL(_060_fpsp_done)-_C_LABEL(FP_CALL_TOP)
    334  1.1   is 
    335  1.1   is 	.long	0x00000000,0x00000000,0x00000000
    336  1.1   is 
    337  1.5  scw 	.long	_ASM_LABEL(_060_imem_read)-_C_LABEL(FP_CALL_TOP)
    338  1.5  scw 	.long	_ASM_LABEL(_060_dmem_read)-_C_LABEL(FP_CALL_TOP)
    339  1.5  scw 	.long	_ASM_LABEL(_060_dmem_write)-_C_LABEL(FP_CALL_TOP)
    340  1.5  scw 	.long	_ASM_LABEL(_060_imem_read_word)-_C_LABEL(FP_CALL_TOP)
    341  1.5  scw 	.long	_ASM_LABEL(_060_imem_read_long)-_C_LABEL(FP_CALL_TOP)
    342  1.5  scw 	.long	_ASM_LABEL(_060_dmem_read_byte)-_C_LABEL(FP_CALL_TOP)
    343  1.5  scw 	.long	_ASM_LABEL(_060_dmem_read_word)-_C_LABEL(FP_CALL_TOP)
    344  1.5  scw 	.long	_ASM_LABEL(_060_dmem_read_long)-_C_LABEL(FP_CALL_TOP)
    345  1.5  scw 	.long	_ASM_LABEL(_060_dmem_write_byte)-_C_LABEL(FP_CALL_TOP)
    346  1.5  scw 	.long	_ASM_LABEL(_060_dmem_write_word)-_C_LABEL(FP_CALL_TOP)
    347  1.5  scw 	.long	_ASM_LABEL(_060_dmem_write_long)-_C_LABEL(FP_CALL_TOP)
    348  1.1   is 
    349  1.1   is 	.long	0x00000000
    350  1.1   is 
    351  1.1   is 	.long	0x00000000,0x00000000,0x00000000,0x00000000
    352  1.1   is 
    353  1.5  scw /*
    354  1.1   is #############################################################################
    355  1.1   is 
    356  1.1   is # 060 FPSP KERNEL PACKAGE NEEDS TO GO HERE!!!
    357  1.5  scw */
    358  1.1   is 
    359  1.5  scw #include "fpsp.S"
    360