fnetbsd.S revision 1.1 1 1.1 is #
2 1.1 is # $NetBSD: fnetbsd.S,v 1.1 1996/05/15 21:06:22 is Exp $
3 1.1 is #
4 1.1 is #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5 1.1 is # MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
6 1.1 is # M68000 Hi-Performance Microprocessor Division
7 1.1 is # M68060 Software Package Production Release
8 1.1 is #
9 1.1 is # M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc.
10 1.1 is # All rights reserved.
11 1.1 is #
12 1.1 is # THE SOFTWARE is provided on an "AS IS" basis and without warranty.
13 1.1 is # To the maximum extent permitted by applicable law,
14 1.1 is # MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
15 1.1 is # INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
16 1.1 is # FOR A PARTICULAR PURPOSE and any warranty against infringement with
17 1.1 is # regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
18 1.1 is # and any accompanying written materials.
19 1.1 is #
20 1.1 is # To the maximum extent permitted by applicable law,
21 1.1 is # IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
22 1.1 is # (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
23 1.1 is # BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
24 1.1 is # ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
25 1.1 is #
26 1.1 is # Motorola assumes no responsibility for the maintenance and support
27 1.1 is # of the SOFTWARE.
28 1.1 is #
29 1.1 is # You are hereby granted a copyright license to use, modify, and distribute the
30 1.1 is # SOFTWARE so long as this entire notice is retained without alteration
31 1.1 is # in any modified and/or redistributed versions, and that such modified
32 1.1 is # versions are clearly identified as such.
33 1.1 is # No licenses are granted by implication, estoppel or otherwise under any
34 1.1 is # patents or trademarks of Motorola, Inc.
35 1.1 is #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
36 1.1 is #
37 1.1 is # Derived from:
38 1.1 is # fskeleton.s
39 1.1 is #
40 1.1 is # This file contains:
41 1.1 is # (1) example "Call-out"s
42 1.1 is # (2) example package entry code
43 1.1 is # (3) example "Call-out" table
44 1.1 is #
45 1.1 is
46 1.1 is
47 1.1 is #################################
48 1.1 is # (1) EXAMPLE CALL-OUTS #
49 1.1 is # #
50 1.1 is # _060_fpsp_done() #
51 1.1 is # _060_real_ovfl() #
52 1.1 is # _060_real_unfl() #
53 1.1 is # _060_real_operr() #
54 1.1 is # _060_real_snan() #
55 1.1 is # _060_real_dz() #
56 1.1 is # _060_real_inex() #
57 1.1 is # _060_real_bsun() #
58 1.1 is # _060_real_fline() #
59 1.1 is # _060_real_fpu_disabled() #
60 1.1 is # _060_real_trap() #
61 1.1 is #################################
62 1.1 is
63 1.1 is #
64 1.1 is # _060_fpsp_done():
65 1.1 is #
66 1.1 is # This is the main exit point for the 68060 Floating-Point
67 1.1 is # Software Package. For a normal exit, all 060FPSP routines call this
68 1.1 is # routine. The operating system can do system dependent clean-up or
69 1.1 is # simply execute an "rte" as with the sample code below.
70 1.1 is #
71 1.1 is .global _060_fpsp_done
72 1.1 is _060_fpsp_done:
73 1.1 is rte
74 1.1 is
75 1.1 is #
76 1.1 is # _060_real_ovfl():
77 1.1 is #
78 1.1 is # This is the exit point for the 060FPSP when an enabled overflow exception
79 1.1 is # is present. The routine below should point to the operating system handler
80 1.1 is # for enabled overflow conditions. The exception stack frame is an overflow
81 1.1 is # stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
82 1.1 is #
83 1.1 is # The sample routine below simply clears the exception status bit and
84 1.1 is # does an "rte".
85 1.1 is #
86 1.1 is .global _060_real_ovfl
87 1.1 is _060_real_ovfl:
88 1.1 is fsave sp@-
89 1.1 is movew #0x6000,sp@(0x2)
90 1.1 is frestore sp@+
91 1.1 is jmp _fpfault
92 1.1 is
93 1.1 is #
94 1.1 is # _060_real_unfl():
95 1.1 is #
96 1.1 is # This is the exit point for the 060FPSP when an enabled underflow exception
97 1.1 is # is present. The routine below should point to the operating system handler
98 1.1 is # for enabled underflow conditions. The exception stack frame is an underflow
99 1.1 is # stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
100 1.1 is #
101 1.1 is # The sample routine below simply clears the exception status bit and
102 1.1 is # does an "rte".
103 1.1 is #
104 1.1 is .global _060_real_unfl
105 1.1 is _060_real_unfl:
106 1.1 is fsave sp@-
107 1.1 is movew #0x6000,sp@(0x2)
108 1.1 is frestore sp@+
109 1.1 is jmp _fpfault
110 1.1 is
111 1.1 is #
112 1.1 is # _060_real_operr():
113 1.1 is #
114 1.1 is # This is the exit point for the 060FPSP when an enabled operand error exception
115 1.1 is # is present. The routine below should point to the operating system handler
116 1.1 is # for enabled operand error exceptions. The exception stack frame is an operand error
117 1.1 is # stack frame. The FP state frame holds the source operand of the faulting
118 1.1 is # instruction.
119 1.1 is #
120 1.1 is # The sample routine below simply clears the exception status bit and
121 1.1 is # does an "rte".
122 1.1 is #
123 1.1 is .global _060_real_operr
124 1.1 is _060_real_operr:
125 1.1 is fsave sp@-
126 1.1 is movew #0x6000,sp@(0x2)
127 1.1 is frestore sp@+
128 1.1 is jmp _fpfault
129 1.1 is
130 1.1 is #
131 1.1 is # _060_real_snan():
132 1.1 is #
133 1.1 is # This is the exit point for the 060FPSP when an enabled signalling NaN exception
134 1.1 is # is present. The routine below should point to the operating system handler
135 1.1 is # for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN
136 1.1 is # stack frame. The FP state frame holds the source operand of the faulting
137 1.1 is # instruction.
138 1.1 is #
139 1.1 is # The sample routine below simply clears the exception status bit and
140 1.1 is # does an "rte".
141 1.1 is #
142 1.1 is .global _060_real_snan
143 1.1 is _060_real_snan:
144 1.1 is fsave sp@-
145 1.1 is movew #0x6000,sp@(0x2)
146 1.1 is frestore sp@+
147 1.1 is jmp _fpfault
148 1.1 is
149 1.1 is #
150 1.1 is # _060_real_dz():
151 1.1 is #
152 1.1 is # This is the exit point for the 060FPSP when an enabled divide-by-zero exception
153 1.1 is # is present. The routine below should point to the operating system handler
154 1.1 is # for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero
155 1.1 is # stack frame. The FP state frame holds the source operand of the faulting
156 1.1 is # instruction.
157 1.1 is #
158 1.1 is # The sample routine below simply clears the exception status bit and
159 1.1 is # does an "rte".
160 1.1 is #
161 1.1 is .global _060_real_dz
162 1.1 is _060_real_dz:
163 1.1 is fsave sp@-
164 1.1 is movew #0x6000,sp@(0x2)
165 1.1 is frestore sp@+
166 1.1 is jmp _fpfault
167 1.1 is
168 1.1 is #
169 1.1 is # _060_real_inex():
170 1.1 is #
171 1.1 is # This is the exit point for the 060FPSP when an enabled inexact exception
172 1.1 is # is present. The routine below should point to the operating system handler
173 1.1 is # for enabled inexact exceptions. The exception stack frame is an inexact
174 1.1 is # stack frame. The FP state frame holds the source operand of the faulting
175 1.1 is # instruction.
176 1.1 is #
177 1.1 is # The sample routine below simply clears the exception status bit and
178 1.1 is # does an "rte".
179 1.1 is #
180 1.1 is .global _060_real_inex
181 1.1 is _060_real_inex:
182 1.1 is fsave sp@-
183 1.1 is movew #0x6000,sp@(0x2)
184 1.1 is frestore sp@+
185 1.1 is jmp _fpfault
186 1.1 is
187 1.1 is #
188 1.1 is # _060_real_bsun():
189 1.1 is #
190 1.1 is # This is the exit point for the 060FPSP when an enabled bsun exception
191 1.1 is # is present. The routine below should point to the operating system handler
192 1.1 is # for enabled bsun exceptions. The exception stack frame is a bsun
193 1.1 is # stack frame.
194 1.1 is #
195 1.1 is # The sample routine below clears the exception status bit, clears the NaN
196 1.1 is # bit in the FPSR, and does an "rte". The instruction that caused the
197 1.1 is # bsun will now be re-executed but with the NaN FPSR bit cleared.
198 1.1 is #
199 1.1 is .global _060_real_bsun
200 1.1 is _060_real_bsun:
201 1.1 is fsave sp@-
202 1.1 is
203 1.1 is fmovel fpsr,sp@-
204 1.1 is andib #0xfe,sp@
205 1.1 is fmovel sp@+,fpsr
206 1.1 is
207 1.1 is addl #0xc,sp
208 1.1 is jmp _fpfault
209 1.1 is
210 1.1 is #
211 1.1 is # _060_real_fline():
212 1.1 is #
213 1.1 is # This is the exit point for the 060FPSP when an F-Line Illegal exception is
214 1.1 is # encountered. Three different types of exceptions can enter the F-Line exception
215 1.1 is # vector number 11: FP Unimplemented Instructions, FP implemented instructions when
216 1.1 is # the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
217 1.1 is # _fpsp_fline() distinguishes between the three and acts appropriately. F-Line
218 1.1 is # Illegals branch here.
219 1.1 is #
220 1.1 is .global _060_real_fline
221 1.1 is _060_real_fline:
222 1.1 is jmp _fpfault
223 1.1 is
224 1.1 is #
225 1.1 is # _060_real_fpu_disabled():
226 1.1 is #
227 1.1 is # This is the exit point for the 060FPSP when an FPU disabled exception is
228 1.1 is # encountered. Three different types of exceptions can enter the F-Line exception
229 1.1 is # vector number 11: FP Unimplemented Instructions, FP implemented instructions when
230 1.1 is # the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
231 1.1 is # _fpsp_fline() distinguishes between the three and acts appropriately. FPU disabled
232 1.1 is # exceptions branch here.
233 1.1 is #
234 1.1 is # The sample code below enables the FPU, sets the PC field in the exception stack
235 1.1 is # frame to the PC of the instruction causing the exception, and does an "rte".
236 1.1 is # The execution of the instruction then proceeds with an enabled floating-point
237 1.1 is # unit.
238 1.1 is #
239 1.1 is .global _060_real_fpu_disabled
240 1.1 is _060_real_fpu_disabled:
241 1.1 is movel d0,sp@- |# enabled the fpu
242 1.1 is
243 1.1 is .short 0x4e7a,0x0808 |* movec.l pcr,d0
244 1.1 is bclr #0x1,d0
245 1.1 is .short 0x4e7b,0x0808 |* movec.l d0,pcr
246 1.1 is movel sp@+,d0
247 1.1 is
248 1.1 is movel sp@(0xc),sp@(0x2) |# set "Current PC"
249 1.1 is rte
250 1.1 is
251 1.1 is #
252 1.1 is # _060_real_trap():
253 1.1 is #
254 1.1 is # This is the exit point for the 060FPSP when an emulated "ftrapcc" instruction
255 1.1 is # discovers that the trap condition is true and it should branch to the operating
256 1.1 is # system handler for the trap exception vector number 7.
257 1.1 is #
258 1.1 is # The sample code below simply executes an "rte".
259 1.1 is #
260 1.1 is .global _060_real_trap
261 1.1 is _060_real_trap:
262 1.1 is rte
263 1.1 is
264 1.1 is #############################################################################
265 1.1 is
266 1.1 is ##################################
267 1.1 is # (2) EXAMPLE PACKAGE ENTRY CODE #
268 1.1 is ##################################
269 1.1 is
270 1.1 is .global _060_fpsp_snan
271 1.1 is _060_fpsp_snan:
272 1.1 is bral _FP_CALL_TOP+0x80+0x00
273 1.1 is
274 1.1 is .global _060_fpsp_operr
275 1.1 is _060_fpsp_operr:
276 1.1 is bral _FP_CALL_TOP+0x80+0x08
277 1.1 is
278 1.1 is .global _060_fpsp_ovfl
279 1.1 is _060_fpsp_ovfl:
280 1.1 is bral _FP_CALL_TOP+0x80+0x10
281 1.1 is
282 1.1 is .global _060_fpsp_unfl
283 1.1 is _060_fpsp_unfl:
284 1.1 is bral _FP_CALL_TOP+0x80+0x18
285 1.1 is
286 1.1 is .global _060_fpsp_dz
287 1.1 is _060_fpsp_dz:
288 1.1 is bral _FP_CALL_TOP+0x80+0x20
289 1.1 is
290 1.1 is .global _060_fpsp_inex
291 1.1 is _060_fpsp_inex:
292 1.1 is bral _FP_CALL_TOP+0x80+0x28
293 1.1 is
294 1.1 is .global _060_fpsp_fline
295 1.1 is _060_fpsp_fline:
296 1.1 is bral _FP_CALL_TOP+0x80+0x30
297 1.1 is
298 1.1 is .global _060_fpsp_unsupp
299 1.1 is _060_fpsp_unsupp:
300 1.1 is bral _FP_CALL_TOP+0x80+0x38
301 1.1 is
302 1.1 is .global _060_fpsp_effadd
303 1.1 is _060_fpsp_effadd:
304 1.1 is bral _FP_CALL_TOP+0x80+0x40
305 1.1 is
306 1.1 is #############################################################################
307 1.1 is
308 1.1 is ################################
309 1.1 is # (3) EXAMPLE CALL-OUT SECTION #
310 1.1 is ################################
311 1.1 is
312 1.1 is # The size of this section MUST be 128 bytes!!!
313 1.1 is
314 1.1 is .global _FP_CALL_TOP
315 1.1 is _FP_CALL_TOP:
316 1.1 is .long _060_real_bsun-_FP_CALL_TOP
317 1.1 is .long _060_real_snan-_FP_CALL_TOP
318 1.1 is .long _060_real_operr-_FP_CALL_TOP
319 1.1 is .long _060_real_ovfl-_FP_CALL_TOP
320 1.1 is .long _060_real_unfl-_FP_CALL_TOP
321 1.1 is .long _060_real_dz-_FP_CALL_TOP
322 1.1 is .long _060_real_inex-_FP_CALL_TOP
323 1.1 is .long _060_real_fline-_FP_CALL_TOP
324 1.1 is .long _060_real_fpu_disabled-_FP_CALL_TOP
325 1.1 is .long _060_real_trap-_FP_CALL_TOP
326 1.1 is .long _060_real_trace-_FP_CALL_TOP
327 1.1 is .long _060_real_access-_FP_CALL_TOP
328 1.1 is .long _060_fpsp_done-_FP_CALL_TOP
329 1.1 is
330 1.1 is .long 0x00000000,0x00000000,0x00000000
331 1.1 is
332 1.1 is .long _060_imem_read-_FP_CALL_TOP
333 1.1 is .long _060_dmem_read-_FP_CALL_TOP
334 1.1 is .long _060_dmem_write-_FP_CALL_TOP
335 1.1 is .long _060_imem_read_word-_FP_CALL_TOP
336 1.1 is .long _060_imem_read_long-_FP_CALL_TOP
337 1.1 is .long _060_dmem_read_byte-_FP_CALL_TOP
338 1.1 is .long _060_dmem_read_word-_FP_CALL_TOP
339 1.1 is .long _060_dmem_read_long-_FP_CALL_TOP
340 1.1 is .long _060_dmem_write_byte-_FP_CALL_TOP
341 1.1 is .long _060_dmem_write_word-_FP_CALL_TOP
342 1.1 is .long _060_dmem_write_long-_FP_CALL_TOP
343 1.1 is
344 1.1 is .long 0x00000000
345 1.1 is
346 1.1 is .long 0x00000000,0x00000000,0x00000000,0x00000000
347 1.1 is
348 1.1 is #############################################################################
349 1.1 is
350 1.1 is # 060 FPSP KERNEL PACKAGE NEEDS TO GO HERE!!!
351 1.1 is
352 1.1 is .include "fpsp.s"
353 1.1 is
354